Texas Instruments
TM4C1231E6PZ
2024.06.02
ARM Cortex-M4 Tiva TM4C Device
CM4
r1p2
little
true
3
false
8
32
ADC0
Register map for ADC0 peripheral
ADC
0x0
0x0
0x1000
registers
n
ADC0SS0
14
ADC0SS1
15
ADC0SS2
16
ADC0SS3
17
ACTSS
ADC Active Sample Sequencer
0x0
-1
read-write
n
0x0
0x0
ADC_ACTSS_ASEN0
ADC SS0 Enable
0
1
ADC_ACTSS_ASEN1
ADC SS1 Enable
1
2
ADC_ACTSS_ASEN2
ADC SS2 Enable
2
3
ADC_ACTSS_ASEN3
ADC SS3 Enable
3
4
ADC_ACTSS_BUSY
ADC Busy
16
17
ADC0ACTSS
ADC Active Sample Sequencer
0x0
read-write
n
0x0
0x0
ADC_ACTSS_ASEN0
ADC SS0 Enable
0
1
ADC_ACTSS_ASEN1
ADC SS1 Enable
1
2
ADC_ACTSS_ASEN2
ADC SS2 Enable
2
3
ADC_ACTSS_ASEN3
ADC SS3 Enable
3
4
ADC_ACTSS_BUSY
ADC Busy
16
17
ADC0CC
ADC Clock Configuration
0xFC8
read-write
n
0x0
0x0
ADC_CC_CS
ADC Clock Source
0
4
ADC_CC_CS_SYSPLL
PLL VCO divided by CLKDIV
0x0
ADC_CC_CS_PIOSC
PIOSC
0x1
ADC0CTL
ADC Control
0x38
read-write
n
0x0
0x0
ADC_CTL_DITHER
Dither Mode Enable
6
7
ADC_CTL_VREF
Voltage Reference Select
0
1
ADC_CTL_VREF_INTERNAL
VDDA and GNDA are the voltage references
0x0
ADC_CTL_VREF_EXT_3V
The external VREFA+ and VREFA- inputs are the voltage references
0x1
ADC0DCCMP0
ADC Digital Comparator Range 0
0xE40
read-write
n
0x0
0x0
ADC_DCCMP0_COMP0
Compare 0
0
12
ADC_DCCMP0_COMP1
Compare 1
16
28
ADC0DCCMP1
ADC Digital Comparator Range 1
0xE44
read-write
n
0x0
0x0
ADC_DCCMP1_COMP0
Compare 0
0
12
ADC_DCCMP1_COMP1
Compare 1
16
28
ADC0DCCMP2
ADC Digital Comparator Range 2
0xE48
read-write
n
0x0
0x0
ADC_DCCMP2_COMP0
Compare 0
0
12
ADC_DCCMP2_COMP1
Compare 1
16
28
ADC0DCCMP3
ADC Digital Comparator Range 3
0xE4C
read-write
n
0x0
0x0
ADC_DCCMP3_COMP0
Compare 0
0
12
ADC_DCCMP3_COMP1
Compare 1
16
28
ADC0DCCMP4
ADC Digital Comparator Range 4
0xE50
read-write
n
0x0
0x0
ADC_DCCMP4_COMP0
Compare 0
0
12
ADC_DCCMP4_COMP1
Compare 1
16
28
ADC0DCCMP5
ADC Digital Comparator Range 5
0xE54
read-write
n
0x0
0x0
ADC_DCCMP5_COMP0
Compare 0
0
12
ADC_DCCMP5_COMP1
Compare 1
16
28
ADC0DCCMP6
ADC Digital Comparator Range 6
0xE58
read-write
n
0x0
0x0
ADC_DCCMP6_COMP0
Compare 0
0
12
ADC_DCCMP6_COMP1
Compare 1
16
28
ADC0DCCMP7
ADC Digital Comparator Range 7
0xE5C
read-write
n
0x0
0x0
ADC_DCCMP7_COMP0
Compare 0
0
12
ADC_DCCMP7_COMP1
Compare 1
16
28
ADC0DCCTL0
ADC Digital Comparator Control 0
0xE00
read-write
n
0x0
0x0
ADC_DCCTL0_CIC
Comparison Interrupt Condition
2
4
ADC_DCCTL0_CIC_LOW
Low Band
0x0
ADC_DCCTL0_CIC_MID
Mid Band
0x1
ADC_DCCTL0_CIC_HIGH
High Band
0x3
ADC_DCCTL0_CIE
Comparison Interrupt Enable
4
5
ADC_DCCTL0_CIM
Comparison Interrupt Mode
0
2
ADC_DCCTL0_CIM_ALWAYS
Always
0x0
ADC_DCCTL0_CIM_ONCE
Once
0x1
ADC_DCCTL0_CIM_HALWAYS
Hysteresis Always
0x2
ADC_DCCTL0_CIM_HONCE
Hysteresis Once
0x3
ADC0DCCTL1
ADC Digital Comparator Control 1
0xE04
read-write
n
0x0
0x0
ADC_DCCTL1_CIC
Comparison Interrupt Condition
2
4
ADC_DCCTL1_CIC_LOW
Low Band
0x0
ADC_DCCTL1_CIC_MID
Mid Band
0x1
ADC_DCCTL1_CIC_HIGH
High Band
0x3
ADC_DCCTL1_CIE
Comparison Interrupt Enable
4
5
ADC_DCCTL1_CIM
Comparison Interrupt Mode
0
2
ADC_DCCTL1_CIM_ALWAYS
Always
0x0
ADC_DCCTL1_CIM_ONCE
Once
0x1
ADC_DCCTL1_CIM_HALWAYS
Hysteresis Always
0x2
ADC_DCCTL1_CIM_HONCE
Hysteresis Once
0x3
ADC0DCCTL2
ADC Digital Comparator Control 2
0xE08
read-write
n
0x0
0x0
ADC_DCCTL2_CIC
Comparison Interrupt Condition
2
4
ADC_DCCTL2_CIC_LOW
Low Band
0x0
ADC_DCCTL2_CIC_MID
Mid Band
0x1
ADC_DCCTL2_CIC_HIGH
High Band
0x3
ADC_DCCTL2_CIE
Comparison Interrupt Enable
4
5
ADC_DCCTL2_CIM
Comparison Interrupt Mode
0
2
ADC_DCCTL2_CIM_ALWAYS
Always
0x0
ADC_DCCTL2_CIM_ONCE
Once
0x1
ADC_DCCTL2_CIM_HALWAYS
Hysteresis Always
0x2
ADC_DCCTL2_CIM_HONCE
Hysteresis Once
0x3
ADC0DCCTL3
ADC Digital Comparator Control 3
0xE0C
read-write
n
0x0
0x0
ADC_DCCTL3_CIC
Comparison Interrupt Condition
2
4
ADC_DCCTL3_CIC_LOW
Low Band
0x0
ADC_DCCTL3_CIC_MID
Mid Band
0x1
ADC_DCCTL3_CIC_HIGH
High Band
0x3
ADC_DCCTL3_CIE
Comparison Interrupt Enable
4
5
ADC_DCCTL3_CIM
Comparison Interrupt Mode
0
2
ADC_DCCTL3_CIM_ALWAYS
Always
0x0
ADC_DCCTL3_CIM_ONCE
Once
0x1
ADC_DCCTL3_CIM_HALWAYS
Hysteresis Always
0x2
ADC_DCCTL3_CIM_HONCE
Hysteresis Once
0x3
ADC0DCCTL4
ADC Digital Comparator Control 4
0xE10
read-write
n
0x0
0x0
ADC_DCCTL4_CIC
Comparison Interrupt Condition
2
4
ADC_DCCTL4_CIC_LOW
Low Band
0x0
ADC_DCCTL4_CIC_MID
Mid Band
0x1
ADC_DCCTL4_CIC_HIGH
High Band
0x3
ADC_DCCTL4_CIE
Comparison Interrupt Enable
4
5
ADC_DCCTL4_CIM
Comparison Interrupt Mode
0
2
ADC_DCCTL4_CIM_ALWAYS
Always
0x0
ADC_DCCTL4_CIM_ONCE
Once
0x1
ADC_DCCTL4_CIM_HALWAYS
Hysteresis Always
0x2
ADC_DCCTL4_CIM_HONCE
Hysteresis Once
0x3
ADC0DCCTL5
ADC Digital Comparator Control 5
0xE14
read-write
n
0x0
0x0
ADC_DCCTL5_CIC
Comparison Interrupt Condition
2
4
ADC_DCCTL5_CIC_LOW
Low Band
0x0
ADC_DCCTL5_CIC_MID
Mid Band
0x1
ADC_DCCTL5_CIC_HIGH
High Band
0x3
ADC_DCCTL5_CIE
Comparison Interrupt Enable
4
5
ADC_DCCTL5_CIM
Comparison Interrupt Mode
0
2
ADC_DCCTL5_CIM_ALWAYS
Always
0x0
ADC_DCCTL5_CIM_ONCE
Once
0x1
ADC_DCCTL5_CIM_HALWAYS
Hysteresis Always
0x2
ADC_DCCTL5_CIM_HONCE
Hysteresis Once
0x3
ADC0DCCTL6
ADC Digital Comparator Control 6
0xE18
read-write
n
0x0
0x0
ADC_DCCTL6_CIC
Comparison Interrupt Condition
2
4
ADC_DCCTL6_CIC_LOW
Low Band
0x0
ADC_DCCTL6_CIC_MID
Mid Band
0x1
ADC_DCCTL6_CIC_HIGH
High Band
0x3
ADC_DCCTL6_CIE
Comparison Interrupt Enable
4
5
ADC_DCCTL6_CIM
Comparison Interrupt Mode
0
2
ADC_DCCTL6_CIM_ALWAYS
Always
0x0
ADC_DCCTL6_CIM_ONCE
Once
0x1
ADC_DCCTL6_CIM_HALWAYS
Hysteresis Always
0x2
ADC_DCCTL6_CIM_HONCE
Hysteresis Once
0x3
ADC0DCCTL7
ADC Digital Comparator Control 7
0xE1C
read-write
n
0x0
0x0
ADC_DCCTL7_CIC
Comparison Interrupt Condition
2
4
ADC_DCCTL7_CIC_LOW
Low Band
0x0
ADC_DCCTL7_CIC_MID
Mid Band
0x1
ADC_DCCTL7_CIC_HIGH
High Band
0x3
ADC_DCCTL7_CIE
Comparison Interrupt Enable
4
5
ADC_DCCTL7_CIM
Comparison Interrupt Mode
0
2
ADC_DCCTL7_CIM_ALWAYS
Always
0x0
ADC_DCCTL7_CIM_ONCE
Once
0x1
ADC_DCCTL7_CIM_HALWAYS
Hysteresis Always
0x2
ADC_DCCTL7_CIM_HONCE
Hysteresis Once
0x3
ADC0DCISC
ADC Digital Comparator Interrupt Status and Clear
0x34
read-write
n
0x0
0x0
ADC_DCISC_DCINT0
Digital Comparator 0 Interrupt Status and Clear
0
1
ADC_DCISC_DCINT1
Digital Comparator 1 Interrupt Status and Clear
1
2
ADC_DCISC_DCINT2
Digital Comparator 2 Interrupt Status and Clear
2
3
ADC_DCISC_DCINT3
Digital Comparator 3 Interrupt Status and Clear
3
4
ADC_DCISC_DCINT4
Digital Comparator 4 Interrupt Status and Clear
4
5
ADC_DCISC_DCINT5
Digital Comparator 5 Interrupt Status and Clear
5
6
ADC_DCISC_DCINT6
Digital Comparator 6 Interrupt Status and Clear
6
7
ADC_DCISC_DCINT7
Digital Comparator 7 Interrupt Status and Clear
7
8
ADC0DCRIC
ADC Digital Comparator Reset Initial Conditions
0xD00
write-only
n
0x0
0x0
ADC_DCRIC_DCINT0
Digital Comparator Interrupt 0
0
1
write-only
ADC_DCRIC_DCINT1
Digital Comparator Interrupt 1
1
2
write-only
ADC_DCRIC_DCINT2
Digital Comparator Interrupt 2
2
3
write-only
ADC_DCRIC_DCINT3
Digital Comparator Interrupt 3
3
4
write-only
ADC_DCRIC_DCINT4
Digital Comparator Interrupt 4
4
5
write-only
ADC_DCRIC_DCINT5
Digital Comparator Interrupt 5
5
6
write-only
ADC_DCRIC_DCINT6
Digital Comparator Interrupt 6
6
7
write-only
ADC_DCRIC_DCINT7
Digital Comparator Interrupt 7
7
8
write-only
ADC_DCRIC_DCTRIG0
Digital Comparator Trigger 0
16
17
write-only
ADC_DCRIC_DCTRIG1
Digital Comparator Trigger 1
17
18
write-only
ADC_DCRIC_DCTRIG2
Digital Comparator Trigger 2
18
19
write-only
ADC_DCRIC_DCTRIG3
Digital Comparator Trigger 3
19
20
write-only
ADC_DCRIC_DCTRIG4
Digital Comparator Trigger 4
20
21
write-only
ADC_DCRIC_DCTRIG5
Digital Comparator Trigger 5
21
22
write-only
ADC_DCRIC_DCTRIG6
Digital Comparator Trigger 6
22
23
write-only
ADC_DCRIC_DCTRIG7
Digital Comparator Trigger 7
23
24
write-only
ADC0EMUX
ADC Event Multiplexer Select
0x14
read-write
n
0x0
0x0
ADC_EMUX_EM0
SS0 Trigger Select
0
4
ADC_EMUX_EM0_PROCESSOR
Processor (default)
0x0
ADC_EMUX_EM0_COMP0
Analog Comparator 0
0x1
ADC_EMUX_EM0_COMP1
Analog Comparator 1
0x2
ADC_EMUX_EM0_COMP2
Analog Comparator 2
0x3
ADC_EMUX_EM0_EXTERNAL
External (GPIO Pins)
0x4
ADC_EMUX_EM0_TIMER
Timer
0x5
ADC_EMUX_EM0_ALWAYS
Always (continuously sample)
0xf
ADC_EMUX_EM1
SS1 Trigger Select
4
8
ADC_EMUX_EM1_PROCESSOR
Processor (default)
0x0
ADC_EMUX_EM1_COMP0
Analog Comparator 0
0x1
ADC_EMUX_EM1_COMP1
Analog Comparator 1
0x2
ADC_EMUX_EM1_COMP2
Analog Comparator 2
0x3
ADC_EMUX_EM1_EXTERNAL
External (GPIO Pins)
0x4
ADC_EMUX_EM1_TIMER
Timer
0x5
ADC_EMUX_EM1_ALWAYS
Always (continuously sample)
0xf
ADC_EMUX_EM2
SS2 Trigger Select
8
12
ADC_EMUX_EM2_PROCESSOR
Processor (default)
0x0
ADC_EMUX_EM2_COMP0
Analog Comparator 0
0x1
ADC_EMUX_EM2_COMP1
Analog Comparator 1
0x2
ADC_EMUX_EM2_COMP2
Analog Comparator 2
0x3
ADC_EMUX_EM2_EXTERNAL
External (GPIO Pins)
0x4
ADC_EMUX_EM2_TIMER
Timer
0x5
ADC_EMUX_EM2_ALWAYS
Always (continuously sample)
0xf
ADC_EMUX_EM3
SS3 Trigger Select
12
16
ADC_EMUX_EM3_PROCESSOR
Processor (default)
0x0
ADC_EMUX_EM3_COMP0
Analog Comparator 0
0x1
ADC_EMUX_EM3_COMP1
Analog Comparator 1
0x2
ADC_EMUX_EM3_COMP2
Analog Comparator 2
0x3
ADC_EMUX_EM3_EXTERNAL
External (GPIO Pins)
0x4
ADC_EMUX_EM3_TIMER
Timer
0x5
ADC_EMUX_EM3_ALWAYS
Always (continuously sample)
0xf
ADC0IM
ADC Interrupt Mask
0x8
read-write
n
0x0
0x0
ADC_IM_DCONSS0
Digital Comparator Interrupt on SS0
16
17
ADC_IM_DCONSS1
Digital Comparator Interrupt on SS1
17
18
ADC_IM_DCONSS2
Digital Comparator Interrupt on SS2
18
19
ADC_IM_DCONSS3
Digital Comparator Interrupt on SS3
19
20
ADC_IM_MASK0
SS0 Interrupt Mask
0
1
ADC_IM_MASK1
SS1 Interrupt Mask
1
2
ADC_IM_MASK2
SS2 Interrupt Mask
2
3
ADC_IM_MASK3
SS3 Interrupt Mask
3
4
ADC0ISC
ADC Interrupt Status and Clear
0xC
read-write
n
0x0
0x0
ADC_ISC_DCINSS0
Digital Comparator Interrupt Status on SS0
16
17
ADC_ISC_DCINSS1
Digital Comparator Interrupt Status on SS1
17
18
ADC_ISC_DCINSS2
Digital Comparator Interrupt Status on SS2
18
19
ADC_ISC_DCINSS3
Digital Comparator Interrupt Status on SS3
19
20
ADC_ISC_IN0
SS0 Interrupt Status and Clear
0
1
ADC_ISC_IN1
SS1 Interrupt Status and Clear
1
2
ADC_ISC_IN2
SS2 Interrupt Status and Clear
2
3
ADC_ISC_IN3
SS3 Interrupt Status and Clear
3
4
ADC0OSTAT
ADC Overflow Status
0x10
read-write
n
0x0
0x0
ADC_OSTAT_OV0
SS0 FIFO Overflow
0
1
ADC_OSTAT_OV1
SS1 FIFO Overflow
1
2
ADC_OSTAT_OV2
SS2 FIFO Overflow
2
3
ADC_OSTAT_OV3
SS3 FIFO Overflow
3
4
ADC0PC
ADC Peripheral Configuration
0xFC4
read-write
n
0x0
0x0
ADC_PC_SR
ADC Sample Rate
0
4
ADC_PC_SR_125K
125 ksps
0x1
ADC_PC_SR_250K
250 ksps
0x3
ADC_PC_SR_500K
500 ksps
0x5
ADC_PC_SR_1M
1 Msps
0x7
ADC0PP
ADC Peripheral Properties
0xFC0
read-write
n
0x0
0x0
ADC_PP_CH
ADC Channel Count
4
10
ADC_PP_DC
Digital Comparator Count
10
16
ADC_PP_MSR
Maximum ADC Sample Rate
0
4
ADC_PP_MSR_125K
125 ksps
0x1
ADC_PP_MSR_250K
250 ksps
0x3
ADC_PP_MSR_500K
500 ksps
0x5
ADC_PP_MSR_1M
1 Msps
0x7
ADC_PP_RSL
Resolution
18
23
ADC_PP_TS
Temperature Sensor
23
24
ADC_PP_TYPE
ADC Architecture
16
18
ADC_PP_TYPE_SAR
SAR
0x0
ADC0PSSI
ADC Processor Sample Sequence Initiate
0x28
read-write
n
0x0
0x0
ADC_PSSI_GSYNC
Global Synchronize
31
32
ADC_PSSI_SS0
SS0 Initiate
0
1
ADC_PSSI_SS1
SS1 Initiate
1
2
ADC_PSSI_SS2
SS2 Initiate
2
3
ADC_PSSI_SS3
SS3 Initiate
3
4
ADC_PSSI_SYNCWAIT
Synchronize Wait
27
28
ADC0RIS
ADC Raw Interrupt Status
0x4
read-write
n
0x0
0x0
ADC_RIS_INR0
SS0 Raw Interrupt Status
0
1
ADC_RIS_INR1
SS1 Raw Interrupt Status
1
2
ADC_RIS_INR2
SS2 Raw Interrupt Status
2
3
ADC_RIS_INR3
SS3 Raw Interrupt Status
3
4
ADC_RIS_INRDC
Digital Comparator Raw Interrupt Status
16
17
ADC0SAC
ADC Sample Averaging Control
0x30
read-write
n
0x0
0x0
ADC_SAC_AVG
Hardware Averaging Control
0
3
ADC_SAC_AVG_OFF
No hardware oversampling
0x0
ADC_SAC_AVG_2X
2x hardware oversampling
0x1
ADC_SAC_AVG_4X
4x hardware oversampling
0x2
ADC_SAC_AVG_8X
8x hardware oversampling
0x3
ADC_SAC_AVG_16X
16x hardware oversampling
0x4
ADC_SAC_AVG_32X
32x hardware oversampling
0x5
ADC_SAC_AVG_64X
64x hardware oversampling
0x6
ADC0SPC
ADC Sample Phase Control
0x24
read-write
n
0x0
0x0
ADC_SPC_PHASE
Phase Difference
0
4
ADC_SPC_PHASE_0
ADC sample lags by 0.0
0x0
ADC_SPC_PHASE_22_5
ADC sample lags by 22.5
0x1
ADC_SPC_PHASE_45
ADC sample lags by 45.0
0x2
ADC_SPC_PHASE_67_5
ADC sample lags by 67.5
0x3
ADC_SPC_PHASE_90
ADC sample lags by 90.0
0x4
ADC_SPC_PHASE_112_5
ADC sample lags by 112.5
0x5
ADC_SPC_PHASE_135
ADC sample lags by 135.0
0x6
ADC_SPC_PHASE_157_5
ADC sample lags by 157.5
0x7
ADC_SPC_PHASE_180
ADC sample lags by 180.0
0x8
ADC_SPC_PHASE_202_5
ADC sample lags by 202.5
0x9
ADC_SPC_PHASE_225
ADC sample lags by 225.0
0xa
ADC_SPC_PHASE_247_5
ADC sample lags by 247.5
0xb
ADC_SPC_PHASE_270
ADC sample lags by 270.0
0xc
ADC_SPC_PHASE_292_5
ADC sample lags by 292.5
0xd
ADC_SPC_PHASE_315
ADC sample lags by 315.0
0xe
ADC_SPC_PHASE_337_5
ADC sample lags by 337.5
0xf
ADC0SSCTL0
ADC Sample Sequence Control 0
0x44
read-write
n
0x0
0x0
ADC_SSCTL0_D0
1st Sample Differential Input Select
0
1
ADC_SSCTL0_D1
2nd Sample Differential Input Select
4
5
ADC_SSCTL0_D2
3rd Sample Differential Input Select
8
9
ADC_SSCTL0_D3
4th Sample Differential Input Select
12
13
ADC_SSCTL0_D4
5th Sample Differential Input Select
16
17
ADC_SSCTL0_D5
6th Sample Differential Input Select
20
21
ADC_SSCTL0_D6
7th Sample Differential Input Select
24
25
ADC_SSCTL0_D7
8th Sample Differential Input Select
28
29
ADC_SSCTL0_END0
1st Sample is End of Sequence
1
2
ADC_SSCTL0_END1
2nd Sample is End of Sequence
5
6
ADC_SSCTL0_END2
3rd Sample is End of Sequence
9
10
ADC_SSCTL0_END3
4th Sample is End of Sequence
13
14
ADC_SSCTL0_END4
5th Sample is End of Sequence
17
18
ADC_SSCTL0_END5
6th Sample is End of Sequence
21
22
ADC_SSCTL0_END6
7th Sample is End of Sequence
25
26
ADC_SSCTL0_END7
8th Sample is End of Sequence
29
30
ADC_SSCTL0_IE0
1st Sample Interrupt Enable
2
3
ADC_SSCTL0_IE1
2nd Sample Interrupt Enable
6
7
ADC_SSCTL0_IE2
3rd Sample Interrupt Enable
10
11
ADC_SSCTL0_IE3
4th Sample Interrupt Enable
14
15
ADC_SSCTL0_IE4
5th Sample Interrupt Enable
18
19
ADC_SSCTL0_IE5
6th Sample Interrupt Enable
22
23
ADC_SSCTL0_IE6
7th Sample Interrupt Enable
26
27
ADC_SSCTL0_IE7
8th Sample Interrupt Enable
30
31
ADC_SSCTL0_TS0
1st Sample Temp Sensor Select
3
4
ADC_SSCTL0_TS1
2nd Sample Temp Sensor Select
7
8
ADC_SSCTL0_TS2
3rd Sample Temp Sensor Select
11
12
ADC_SSCTL0_TS3
4th Sample Temp Sensor Select
15
16
ADC_SSCTL0_TS4
5th Sample Temp Sensor Select
19
20
ADC_SSCTL0_TS5
6th Sample Temp Sensor Select
23
24
ADC_SSCTL0_TS6
7th Sample Temp Sensor Select
27
28
ADC_SSCTL0_TS7
8th Sample Temp Sensor Select
31
32
ADC0SSCTL1
ADC Sample Sequence Control 1
0x64
read-write
n
0x0
0x0
ADC_SSCTL1_D0
1st Sample Differential Input Select
0
1
ADC_SSCTL1_D1
2nd Sample Differential Input Select
4
5
ADC_SSCTL1_D2
3rd Sample Differential Input Select
8
9
ADC_SSCTL1_D3
4th Sample Differential Input Select
12
13
ADC_SSCTL1_END0
1st Sample is End of Sequence
1
2
ADC_SSCTL1_END1
2nd Sample is End of Sequence
5
6
ADC_SSCTL1_END2
3rd Sample is End of Sequence
9
10
ADC_SSCTL1_END3
4th Sample is End of Sequence
13
14
ADC_SSCTL1_IE0
1st Sample Interrupt Enable
2
3
ADC_SSCTL1_IE1
2nd Sample Interrupt Enable
6
7
ADC_SSCTL1_IE2
3rd Sample Interrupt Enable
10
11
ADC_SSCTL1_IE3
4th Sample Interrupt Enable
14
15
ADC_SSCTL1_TS0
1st Sample Temp Sensor Select
3
4
ADC_SSCTL1_TS1
2nd Sample Temp Sensor Select
7
8
ADC_SSCTL1_TS2
3rd Sample Temp Sensor Select
11
12
ADC_SSCTL1_TS3
4th Sample Temp Sensor Select
15
16
ADC0SSCTL2
ADC Sample Sequence Control 2
0x84
read-write
n
0x0
0x0
ADC_SSCTL2_D0
1st Sample Differential Input Select
0
1
ADC_SSCTL2_D1
2nd Sample Differential Input Select
4
5
ADC_SSCTL2_D2
3rd Sample Differential Input Select
8
9
ADC_SSCTL2_D3
4th Sample Differential Input Select
12
13
ADC_SSCTL2_END0
1st Sample is End of Sequence
1
2
ADC_SSCTL2_END1
2nd Sample is End of Sequence
5
6
ADC_SSCTL2_END2
3rd Sample is End of Sequence
9
10
ADC_SSCTL2_END3
4th Sample is End of Sequence
13
14
ADC_SSCTL2_IE0
1st Sample Interrupt Enable
2
3
ADC_SSCTL2_IE1
2nd Sample Interrupt Enable
6
7
ADC_SSCTL2_IE2
3rd Sample Interrupt Enable
10
11
ADC_SSCTL2_IE3
4th Sample Interrupt Enable
14
15
ADC_SSCTL2_TS0
1st Sample Temp Sensor Select
3
4
ADC_SSCTL2_TS1
2nd Sample Temp Sensor Select
7
8
ADC_SSCTL2_TS2
3rd Sample Temp Sensor Select
11
12
ADC_SSCTL2_TS3
4th Sample Temp Sensor Select
15
16
ADC0SSCTL3
ADC Sample Sequence Control 3
0xA4
read-write
n
0x0
0x0
ADC_SSCTL3_D0
Sample Differential Input Select
0
1
ADC_SSCTL3_END0
End of Sequence
1
2
ADC_SSCTL3_IE0
Sample Interrupt Enable
2
3
ADC_SSCTL3_TS0
1st Sample Temp Sensor Select
3
4
ADC0SSDC0
ADC Sample Sequence 0 Digital Comparator Select
0x54
read-write
n
0x0
0x0
ADC_SSDC0_S0DCSEL
Sample 0 Digital Comparator Select
0
4
ADC_SSDC0_S1DCSEL
Sample 1 Digital Comparator Select
4
8
ADC_SSDC0_S2DCSEL
Sample 2 Digital Comparator Select
8
12
ADC_SSDC0_S3DCSEL
Sample 3 Digital Comparator Select
12
16
ADC_SSDC0_S4DCSEL
Sample 4 Digital Comparator Select
16
20
ADC_SSDC0_S5DCSEL
Sample 5 Digital Comparator Select
20
24
ADC_SSDC0_S6DCSEL
Sample 6 Digital Comparator Select
24
28
ADC_SSDC0_S7DCSEL
Sample 7 Digital Comparator Select
28
32
ADC0SSDC1
ADC Sample Sequence 1 Digital Comparator Select
0x74
read-write
n
0x0
0x0
ADC_SSDC1_S0DCSEL
Sample 0 Digital Comparator Select
0
4
ADC_SSDC1_S1DCSEL
Sample 1 Digital Comparator Select
4
8
ADC_SSDC1_S2DCSEL
Sample 2 Digital Comparator Select
8
12
ADC_SSDC1_S3DCSEL
Sample 3 Digital Comparator Select
12
16
ADC0SSDC2
ADC Sample Sequence 2 Digital Comparator Select
0x94
read-write
n
0x0
0x0
ADC_SSDC2_S0DCSEL
Sample 0 Digital Comparator Select
0
4
ADC_SSDC2_S1DCSEL
Sample 1 Digital Comparator Select
4
8
ADC_SSDC2_S2DCSEL
Sample 2 Digital Comparator Select
8
12
ADC_SSDC2_S3DCSEL
Sample 3 Digital Comparator Select
12
16
ADC0SSDC3
ADC Sample Sequence 3 Digital Comparator Select
0xB4
read-write
n
0x0
0x0
ADC_SSDC3_S0DCSEL
Sample 0 Digital Comparator Select
0
4
ADC0SSEMUX0
ADC Sample Sequence Extended Input Multiplexer Select 0
0x58
read-write
n
0x0
0x0
ADC_SSEMUX0_EMUX0
1st Sample Input Select (Upper Bit)
0
1
ADC_SSEMUX0_EMUX1
2th Sample Input Select (Upper Bit)
4
5
ADC_SSEMUX0_EMUX2
3rd Sample Input Select (Upper Bit)
8
9
ADC_SSEMUX0_EMUX3
4th Sample Input Select (Upper Bit)
12
13
ADC_SSEMUX0_EMUX4
5th Sample Input Select (Upper Bit)
16
17
ADC_SSEMUX0_EMUX5
6th Sample Input Select (Upper Bit)
20
21
ADC_SSEMUX0_EMUX6
7th Sample Input Select (Upper Bit)
24
25
ADC_SSEMUX0_EMUX7
8th Sample Input Select (Upper Bit)
28
29
ADC0SSEMUX1
ADC Sample Sequence Extended Input Multiplexer Select 1
0x78
read-write
n
0x0
0x0
ADC_SSEMUX1_EMUX0
1st Sample Input Select (Upper Bit)
0
1
ADC_SSEMUX1_EMUX1
2th Sample Input Select (Upper Bit)
4
5
ADC_SSEMUX1_EMUX2
3rd Sample Input Select (Upper Bit)
8
9
ADC_SSEMUX1_EMUX3
4th Sample Input Select (Upper Bit)
12
13
ADC0SSEMUX2
ADC Sample Sequence Extended Input Multiplexer Select 2
0x98
read-write
n
0x0
0x0
ADC_SSEMUX2_EMUX0
1st Sample Input Select (Upper Bit)
0
1
ADC_SSEMUX2_EMUX1
2th Sample Input Select (Upper Bit)
4
5
ADC_SSEMUX2_EMUX2
3rd Sample Input Select (Upper Bit)
8
9
ADC_SSEMUX2_EMUX3
4th Sample Input Select (Upper Bit)
12
13
ADC0SSEMUX3
ADC Sample Sequence Extended Input Multiplexer Select 3
0xB8
read-write
n
0x0
0x0
ADC_SSEMUX3_EMUX0
1st Sample Input Select (Upper Bit)
0
1
ADC0SSFIFO0
ADC Sample Sequence Result FIFO 0
0x48
read-write
n
0x0
0x0
ADC_SSFIFO0_DATA
Conversion Result Data
0
12
ADC0SSFIFO1
ADC Sample Sequence Result FIFO 1
0x68
read-write
n
0x0
0x0
ADC_SSFIFO1_DATA
Conversion Result Data
0
12
ADC0SSFIFO2
ADC Sample Sequence Result FIFO 2
0x88
read-write
n
0x0
0x0
ADC_SSFIFO2_DATA
Conversion Result Data
0
12
ADC0SSFIFO3
ADC Sample Sequence Result FIFO 3
0xA8
read-write
n
0x0
0x0
ADC_SSFIFO3_DATA
Conversion Result Data
0
12
ADC0SSFSTAT0
ADC Sample Sequence FIFO 0 Status
0x4C
read-write
n
0x0
0x0
ADC_SSFSTAT0_EMPTY
FIFO Empty
8
9
ADC_SSFSTAT0_FULL
FIFO Full
12
13
ADC_SSFSTAT0_HPTR
FIFO Head Pointer
4
8
ADC_SSFSTAT0_TPTR
FIFO Tail Pointer
0
4
ADC0SSFSTAT1
ADC Sample Sequence FIFO 1 Status
0x6C
read-write
n
0x0
0x0
ADC_SSFSTAT1_EMPTY
FIFO Empty
8
9
ADC_SSFSTAT1_FULL
FIFO Full
12
13
ADC_SSFSTAT1_HPTR
FIFO Head Pointer
4
8
ADC_SSFSTAT1_TPTR
FIFO Tail Pointer
0
4
ADC0SSFSTAT2
ADC Sample Sequence FIFO 2 Status
0x8C
read-write
n
0x0
0x0
ADC_SSFSTAT2_EMPTY
FIFO Empty
8
9
ADC_SSFSTAT2_FULL
FIFO Full
12
13
ADC_SSFSTAT2_HPTR
FIFO Head Pointer
4
8
ADC_SSFSTAT2_TPTR
FIFO Tail Pointer
0
4
ADC0SSFSTAT3
ADC Sample Sequence FIFO 3 Status
0xAC
read-write
n
0x0
0x0
ADC_SSFSTAT3_EMPTY
FIFO Empty
8
9
ADC_SSFSTAT3_FULL
FIFO Full
12
13
ADC_SSFSTAT3_HPTR
FIFO Head Pointer
4
8
ADC_SSFSTAT3_TPTR
FIFO Tail Pointer
0
4
ADC0SSMUX0
ADC Sample Sequence Input Multiplexer Select 0
0x40
read-write
n
0x0
0x0
ADC_SSMUX0_MUX0
1st Sample Input Select
0
4
ADC_SSMUX0_MUX1
2nd Sample Input Select
4
8
ADC_SSMUX0_MUX2
3rd Sample Input Select
8
12
ADC_SSMUX0_MUX3
4th Sample Input Select
12
16
ADC_SSMUX0_MUX4
5th Sample Input Select
16
20
ADC_SSMUX0_MUX5
6th Sample Input Select
20
24
ADC_SSMUX0_MUX6
7th Sample Input Select
24
28
ADC_SSMUX0_MUX7
8th Sample Input Select
28
32
ADC0SSMUX1
ADC Sample Sequence Input Multiplexer Select 1
0x60
read-write
n
0x0
0x0
ADC_SSMUX1_MUX0
1st Sample Input Select
0
4
ADC_SSMUX1_MUX1
2nd Sample Input Select
4
8
ADC_SSMUX1_MUX2
3rd Sample Input Select
8
12
ADC_SSMUX1_MUX3
4th Sample Input Select
12
16
ADC0SSMUX2
ADC Sample Sequence Input Multiplexer Select 2
0x80
read-write
n
0x0
0x0
ADC_SSMUX2_MUX0
1st Sample Input Select
0
4
ADC_SSMUX2_MUX1
2nd Sample Input Select
4
8
ADC_SSMUX2_MUX2
3rd Sample Input Select
8
12
ADC_SSMUX2_MUX3
4th Sample Input Select
12
16
ADC0SSMUX3
ADC Sample Sequence Input Multiplexer Select 3
0xA0
read-write
n
0x0
0x0
ADC_SSMUX3_MUX0
1st Sample Input Select
0
4
ADC0SSOP0
ADC Sample Sequence 0 Operation
0x50
read-write
n
0x0
0x0
ADC_SSOP0_S0DCOP
Sample 0 Digital Comparator Operation
0
1
ADC_SSOP0_S1DCOP
Sample 1 Digital Comparator Operation
4
5
ADC_SSOP0_S2DCOP
Sample 2 Digital Comparator Operation
8
9
ADC_SSOP0_S3DCOP
Sample 3 Digital Comparator Operation
12
13
ADC_SSOP0_S4DCOP
Sample 4 Digital Comparator Operation
16
17
ADC_SSOP0_S5DCOP
Sample 5 Digital Comparator Operation
20
21
ADC_SSOP0_S6DCOP
Sample 6 Digital Comparator Operation
24
25
ADC_SSOP0_S7DCOP
Sample 7 Digital Comparator Operation
28
29
ADC0SSOP1
ADC Sample Sequence 1 Operation
0x70
read-write
n
0x0
0x0
ADC_SSOP1_S0DCOP
Sample 0 Digital Comparator Operation
0
1
ADC_SSOP1_S1DCOP
Sample 1 Digital Comparator Operation
4
5
ADC_SSOP1_S2DCOP
Sample 2 Digital Comparator Operation
8
9
ADC_SSOP1_S3DCOP
Sample 3 Digital Comparator Operation
12
13
ADC0SSOP2
ADC Sample Sequence 2 Operation
0x90
read-write
n
0x0
0x0
ADC_SSOP2_S0DCOP
Sample 0 Digital Comparator Operation
0
1
ADC_SSOP2_S1DCOP
Sample 1 Digital Comparator Operation
4
5
ADC_SSOP2_S2DCOP
Sample 2 Digital Comparator Operation
8
9
ADC_SSOP2_S3DCOP
Sample 3 Digital Comparator Operation
12
13
ADC0SSOP3
ADC Sample Sequence 3 Operation
0xB0
read-write
n
0x0
0x0
ADC_SSOP3_S0DCOP
Sample 0 Digital Comparator Operation
0
1
ADC0SSPRI
ADC Sample Sequencer Priority
0x20
read-write
n
0x0
0x0
ADC_SSPRI_SS0
SS0 Priority
0
2
ADC_SSPRI_SS1
SS1 Priority
4
6
ADC_SSPRI_SS2
SS2 Priority
8
10
ADC_SSPRI_SS3
SS3 Priority
12
14
ADC0USTAT
ADC Underflow Status
0x18
read-write
n
0x0
0x0
ADC_USTAT_UV0
SS0 FIFO Underflow
0
1
ADC_USTAT_UV1
SS1 FIFO Underflow
1
2
ADC_USTAT_UV2
SS2 FIFO Underflow
2
3
ADC_USTAT_UV3
SS3 FIFO Underflow
3
4
CC
ADC Clock Configuration
0xFC8
-1
read-write
n
0x0
0x0
ADC_CC_CS
ADC Clock Source
0
4
ADC_CC_CS_SYSPLL
PLL VCO divided by CLKDIV
0x0
ADC_CC_CS_PIOSC
PIOSC
0x1
CTL
ADC Control
0x38
-1
read-write
n
0x0
0x0
ADC_CTL_DITHER
Dither Mode Enable
6
7
ADC_CTL_VREF
Voltage Reference Select
0
1
ADC_CTL_VREF_INTERNAL
VDDA and GNDA are the voltage references
0x0
ADC_CTL_VREF_EXT_3V
The external VREFA+ and VREFA- inputs are the voltage references
0x1
DCCMP0
ADC Digital Comparator Range 0
0xE40
-1
read-write
n
0x0
0x0
ADC_DCCMP0_COMP0
Compare 0
0
12
ADC_DCCMP0_COMP1
Compare 1
16
28
DCCMP1
ADC Digital Comparator Range 1
0xE44
-1
read-write
n
0x0
0x0
ADC_DCCMP1_COMP0
Compare 0
0
12
ADC_DCCMP1_COMP1
Compare 1
16
28
DCCMP2
ADC Digital Comparator Range 2
0xE48
-1
read-write
n
0x0
0x0
ADC_DCCMP2_COMP0
Compare 0
0
12
ADC_DCCMP2_COMP1
Compare 1
16
28
DCCMP3
ADC Digital Comparator Range 3
0xE4C
-1
read-write
n
0x0
0x0
ADC_DCCMP3_COMP0
Compare 0
0
12
ADC_DCCMP3_COMP1
Compare 1
16
28
DCCMP4
ADC Digital Comparator Range 4
0xE50
-1
read-write
n
0x0
0x0
ADC_DCCMP4_COMP0
Compare 0
0
12
ADC_DCCMP4_COMP1
Compare 1
16
28
DCCMP5
ADC Digital Comparator Range 5
0xE54
-1
read-write
n
0x0
0x0
ADC_DCCMP5_COMP0
Compare 0
0
12
ADC_DCCMP5_COMP1
Compare 1
16
28
DCCMP6
ADC Digital Comparator Range 6
0xE58
-1
read-write
n
0x0
0x0
ADC_DCCMP6_COMP0
Compare 0
0
12
ADC_DCCMP6_COMP1
Compare 1
16
28
DCCMP7
ADC Digital Comparator Range 7
0xE5C
-1
read-write
n
0x0
0x0
ADC_DCCMP7_COMP0
Compare 0
0
12
ADC_DCCMP7_COMP1
Compare 1
16
28
DCCTL0
ADC Digital Comparator Control 0
0xE00
-1
read-write
n
0x0
0x0
ADC_DCCTL0_CIC
Comparison Interrupt Condition
2
4
ADC_DCCTL0_CIC_LOW
Low Band
0x0
ADC_DCCTL0_CIC_MID
Mid Band
0x1
ADC_DCCTL0_CIC_HIGH
High Band
0x3
ADC_DCCTL0_CIE
Comparison Interrupt Enable
4
5
ADC_DCCTL0_CIM
Comparison Interrupt Mode
0
2
ADC_DCCTL0_CIM_ALWAYS
Always
0x0
ADC_DCCTL0_CIM_ONCE
Once
0x1
ADC_DCCTL0_CIM_HALWAYS
Hysteresis Always
0x2
ADC_DCCTL0_CIM_HONCE
Hysteresis Once
0x3
DCCTL1
ADC Digital Comparator Control 1
0xE04
-1
read-write
n
0x0
0x0
ADC_DCCTL1_CIC
Comparison Interrupt Condition
2
4
ADC_DCCTL1_CIC_LOW
Low Band
0x0
ADC_DCCTL1_CIC_MID
Mid Band
0x1
ADC_DCCTL1_CIC_HIGH
High Band
0x3
ADC_DCCTL1_CIE
Comparison Interrupt Enable
4
5
ADC_DCCTL1_CIM
Comparison Interrupt Mode
0
2
ADC_DCCTL1_CIM_ALWAYS
Always
0x0
ADC_DCCTL1_CIM_ONCE
Once
0x1
ADC_DCCTL1_CIM_HALWAYS
Hysteresis Always
0x2
ADC_DCCTL1_CIM_HONCE
Hysteresis Once
0x3
DCCTL2
ADC Digital Comparator Control 2
0xE08
-1
read-write
n
0x0
0x0
ADC_DCCTL2_CIC
Comparison Interrupt Condition
2
4
ADC_DCCTL2_CIC_LOW
Low Band
0x0
ADC_DCCTL2_CIC_MID
Mid Band
0x1
ADC_DCCTL2_CIC_HIGH
High Band
0x3
ADC_DCCTL2_CIE
Comparison Interrupt Enable
4
5
ADC_DCCTL2_CIM
Comparison Interrupt Mode
0
2
ADC_DCCTL2_CIM_ALWAYS
Always
0x0
ADC_DCCTL2_CIM_ONCE
Once
0x1
ADC_DCCTL2_CIM_HALWAYS
Hysteresis Always
0x2
ADC_DCCTL2_CIM_HONCE
Hysteresis Once
0x3
DCCTL3
ADC Digital Comparator Control 3
0xE0C
-1
read-write
n
0x0
0x0
ADC_DCCTL3_CIC
Comparison Interrupt Condition
2
4
ADC_DCCTL3_CIC_LOW
Low Band
0x0
ADC_DCCTL3_CIC_MID
Mid Band
0x1
ADC_DCCTL3_CIC_HIGH
High Band
0x3
ADC_DCCTL3_CIE
Comparison Interrupt Enable
4
5
ADC_DCCTL3_CIM
Comparison Interrupt Mode
0
2
ADC_DCCTL3_CIM_ALWAYS
Always
0x0
ADC_DCCTL3_CIM_ONCE
Once
0x1
ADC_DCCTL3_CIM_HALWAYS
Hysteresis Always
0x2
ADC_DCCTL3_CIM_HONCE
Hysteresis Once
0x3
DCCTL4
ADC Digital Comparator Control 4
0xE10
-1
read-write
n
0x0
0x0
ADC_DCCTL4_CIC
Comparison Interrupt Condition
2
4
ADC_DCCTL4_CIC_LOW
Low Band
0x0
ADC_DCCTL4_CIC_MID
Mid Band
0x1
ADC_DCCTL4_CIC_HIGH
High Band
0x3
ADC_DCCTL4_CIE
Comparison Interrupt Enable
4
5
ADC_DCCTL4_CIM
Comparison Interrupt Mode
0
2
ADC_DCCTL4_CIM_ALWAYS
Always
0x0
ADC_DCCTL4_CIM_ONCE
Once
0x1
ADC_DCCTL4_CIM_HALWAYS
Hysteresis Always
0x2
ADC_DCCTL4_CIM_HONCE
Hysteresis Once
0x3
DCCTL5
ADC Digital Comparator Control 5
0xE14
-1
read-write
n
0x0
0x0
ADC_DCCTL5_CIC
Comparison Interrupt Condition
2
4
ADC_DCCTL5_CIC_LOW
Low Band
0x0
ADC_DCCTL5_CIC_MID
Mid Band
0x1
ADC_DCCTL5_CIC_HIGH
High Band
0x3
ADC_DCCTL5_CIE
Comparison Interrupt Enable
4
5
ADC_DCCTL5_CIM
Comparison Interrupt Mode
0
2
ADC_DCCTL5_CIM_ALWAYS
Always
0x0
ADC_DCCTL5_CIM_ONCE
Once
0x1
ADC_DCCTL5_CIM_HALWAYS
Hysteresis Always
0x2
ADC_DCCTL5_CIM_HONCE
Hysteresis Once
0x3
DCCTL6
ADC Digital Comparator Control 6
0xE18
-1
read-write
n
0x0
0x0
ADC_DCCTL6_CIC
Comparison Interrupt Condition
2
4
ADC_DCCTL6_CIC_LOW
Low Band
0x0
ADC_DCCTL6_CIC_MID
Mid Band
0x1
ADC_DCCTL6_CIC_HIGH
High Band
0x3
ADC_DCCTL6_CIE
Comparison Interrupt Enable
4
5
ADC_DCCTL6_CIM
Comparison Interrupt Mode
0
2
ADC_DCCTL6_CIM_ALWAYS
Always
0x0
ADC_DCCTL6_CIM_ONCE
Once
0x1
ADC_DCCTL6_CIM_HALWAYS
Hysteresis Always
0x2
ADC_DCCTL6_CIM_HONCE
Hysteresis Once
0x3
DCCTL7
ADC Digital Comparator Control 7
0xE1C
-1
read-write
n
0x0
0x0
ADC_DCCTL7_CIC
Comparison Interrupt Condition
2
4
ADC_DCCTL7_CIC_LOW
Low Band
0x0
ADC_DCCTL7_CIC_MID
Mid Band
0x1
ADC_DCCTL7_CIC_HIGH
High Band
0x3
ADC_DCCTL7_CIE
Comparison Interrupt Enable
4
5
ADC_DCCTL7_CIM
Comparison Interrupt Mode
0
2
ADC_DCCTL7_CIM_ALWAYS
Always
0x0
ADC_DCCTL7_CIM_ONCE
Once
0x1
ADC_DCCTL7_CIM_HALWAYS
Hysteresis Always
0x2
ADC_DCCTL7_CIM_HONCE
Hysteresis Once
0x3
DCISC
ADC Digital Comparator Interrupt Status and Clear
0x34
-1
read-write
n
0x0
0x0
ADC_DCISC_DCINT0
Digital Comparator 0 Interrupt Status and Clear
0
1
ADC_DCISC_DCINT1
Digital Comparator 1 Interrupt Status and Clear
1
2
ADC_DCISC_DCINT2
Digital Comparator 2 Interrupt Status and Clear
2
3
ADC_DCISC_DCINT3
Digital Comparator 3 Interrupt Status and Clear
3
4
ADC_DCISC_DCINT4
Digital Comparator 4 Interrupt Status and Clear
4
5
ADC_DCISC_DCINT5
Digital Comparator 5 Interrupt Status and Clear
5
6
ADC_DCISC_DCINT6
Digital Comparator 6 Interrupt Status and Clear
6
7
ADC_DCISC_DCINT7
Digital Comparator 7 Interrupt Status and Clear
7
8
DCRIC
ADC Digital Comparator Reset Initial Conditions
0xD00
-1
write-only
n
0x0
0x0
ADC_DCRIC_DCINT0
Digital Comparator Interrupt 0
0
1
write-only
ADC_DCRIC_DCINT1
Digital Comparator Interrupt 1
1
2
write-only
ADC_DCRIC_DCINT2
Digital Comparator Interrupt 2
2
3
write-only
ADC_DCRIC_DCINT3
Digital Comparator Interrupt 3
3
4
write-only
ADC_DCRIC_DCINT4
Digital Comparator Interrupt 4
4
5
write-only
ADC_DCRIC_DCINT5
Digital Comparator Interrupt 5
5
6
write-only
ADC_DCRIC_DCINT6
Digital Comparator Interrupt 6
6
7
write-only
ADC_DCRIC_DCINT7
Digital Comparator Interrupt 7
7
8
write-only
ADC_DCRIC_DCTRIG0
Digital Comparator Trigger 0
16
17
write-only
ADC_DCRIC_DCTRIG1
Digital Comparator Trigger 1
17
18
write-only
ADC_DCRIC_DCTRIG2
Digital Comparator Trigger 2
18
19
write-only
ADC_DCRIC_DCTRIG3
Digital Comparator Trigger 3
19
20
write-only
ADC_DCRIC_DCTRIG4
Digital Comparator Trigger 4
20
21
write-only
ADC_DCRIC_DCTRIG5
Digital Comparator Trigger 5
21
22
write-only
ADC_DCRIC_DCTRIG6
Digital Comparator Trigger 6
22
23
write-only
ADC_DCRIC_DCTRIG7
Digital Comparator Trigger 7
23
24
write-only
EMUX
ADC Event Multiplexer Select
0x14
-1
read-write
n
0x0
0x0
ADC_EMUX_EM0
SS0 Trigger Select
0
4
ADC_EMUX_EM0_PROCESSOR
Processor (default)
0x0
ADC_EMUX_EM0_COMP0
Analog Comparator 0
0x1
ADC_EMUX_EM0_COMP1
Analog Comparator 1
0x2
ADC_EMUX_EM0_COMP2
Analog Comparator 2
0x3
ADC_EMUX_EM0_EXTERNAL
External (GPIO Pins)
0x4
ADC_EMUX_EM0_TIMER
Timer
0x5
ADC_EMUX_EM0_ALWAYS
Always (continuously sample)
0xf
ADC_EMUX_EM1
SS1 Trigger Select
4
8
ADC_EMUX_EM1_PROCESSOR
Processor (default)
0x0
ADC_EMUX_EM1_COMP0
Analog Comparator 0
0x1
ADC_EMUX_EM1_COMP1
Analog Comparator 1
0x2
ADC_EMUX_EM1_COMP2
Analog Comparator 2
0x3
ADC_EMUX_EM1_EXTERNAL
External (GPIO Pins)
0x4
ADC_EMUX_EM1_TIMER
Timer
0x5
ADC_EMUX_EM1_ALWAYS
Always (continuously sample)
0xf
ADC_EMUX_EM2
SS2 Trigger Select
8
12
ADC_EMUX_EM2_PROCESSOR
Processor (default)
0x0
ADC_EMUX_EM2_COMP0
Analog Comparator 0
0x1
ADC_EMUX_EM2_COMP1
Analog Comparator 1
0x2
ADC_EMUX_EM2_COMP2
Analog Comparator 2
0x3
ADC_EMUX_EM2_EXTERNAL
External (GPIO Pins)
0x4
ADC_EMUX_EM2_TIMER
Timer
0x5
ADC_EMUX_EM2_ALWAYS
Always (continuously sample)
0xf
ADC_EMUX_EM3
SS3 Trigger Select
12
16
ADC_EMUX_EM3_PROCESSOR
Processor (default)
0x0
ADC_EMUX_EM3_COMP0
Analog Comparator 0
0x1
ADC_EMUX_EM3_COMP1
Analog Comparator 1
0x2
ADC_EMUX_EM3_COMP2
Analog Comparator 2
0x3
ADC_EMUX_EM3_EXTERNAL
External (GPIO Pins)
0x4
ADC_EMUX_EM3_TIMER
Timer
0x5
ADC_EMUX_EM3_ALWAYS
Always (continuously sample)
0xf
IM
ADC Interrupt Mask
0x8
-1
read-write
n
0x0
0x0
ADC_IM_DCONSS0
Digital Comparator Interrupt on SS0
16
17
ADC_IM_DCONSS1
Digital Comparator Interrupt on SS1
17
18
ADC_IM_DCONSS2
Digital Comparator Interrupt on SS2
18
19
ADC_IM_DCONSS3
Digital Comparator Interrupt on SS3
19
20
ADC_IM_MASK0
SS0 Interrupt Mask
0
1
ADC_IM_MASK1
SS1 Interrupt Mask
1
2
ADC_IM_MASK2
SS2 Interrupt Mask
2
3
ADC_IM_MASK3
SS3 Interrupt Mask
3
4
ISC
ADC Interrupt Status and Clear
0xC
-1
read-write
n
0x0
0x0
ADC_ISC_DCINSS0
Digital Comparator Interrupt Status on SS0
16
17
ADC_ISC_DCINSS1
Digital Comparator Interrupt Status on SS1
17
18
ADC_ISC_DCINSS2
Digital Comparator Interrupt Status on SS2
18
19
ADC_ISC_DCINSS3
Digital Comparator Interrupt Status on SS3
19
20
ADC_ISC_IN0
SS0 Interrupt Status and Clear
0
1
ADC_ISC_IN1
SS1 Interrupt Status and Clear
1
2
ADC_ISC_IN2
SS2 Interrupt Status and Clear
2
3
ADC_ISC_IN3
SS3 Interrupt Status and Clear
3
4
OSTAT
ADC Overflow Status
0x10
-1
read-write
n
0x0
0x0
ADC_OSTAT_OV0
SS0 FIFO Overflow
0
1
ADC_OSTAT_OV1
SS1 FIFO Overflow
1
2
ADC_OSTAT_OV2
SS2 FIFO Overflow
2
3
ADC_OSTAT_OV3
SS3 FIFO Overflow
3
4
PC
ADC Peripheral Configuration
0xFC4
-1
read-write
n
0x0
0x0
ADC_PC_SR
ADC Sample Rate
0
4
ADC_PC_SR_125K
125 ksps
0x1
ADC_PC_SR_250K
250 ksps
0x3
ADC_PC_SR_500K
500 ksps
0x5
ADC_PC_SR_1M
1 Msps
0x7
PP
ADC Peripheral Properties
0xFC0
-1
read-write
n
0x0
0x0
ADC_PP_CH
ADC Channel Count
4
10
ADC_PP_DC
Digital Comparator Count
10
16
ADC_PP_MSR
Maximum ADC Sample Rate
0
4
ADC_PP_MSR_125K
125 ksps
0x1
ADC_PP_MSR_250K
250 ksps
0x3
ADC_PP_MSR_500K
500 ksps
0x5
ADC_PP_MSR_1M
1 Msps
0x7
ADC_PP_RSL
Resolution
18
23
ADC_PP_TS
Temperature Sensor
23
24
ADC_PP_TYPE
ADC Architecture
16
18
ADC_PP_TYPE_SAR
SAR
0x0
PSSI
ADC Processor Sample Sequence Initiate
0x28
-1
read-write
n
0x0
0x0
ADC_PSSI_GSYNC
Global Synchronize
31
32
ADC_PSSI_SS0
SS0 Initiate
0
1
ADC_PSSI_SS1
SS1 Initiate
1
2
ADC_PSSI_SS2
SS2 Initiate
2
3
ADC_PSSI_SS3
SS3 Initiate
3
4
ADC_PSSI_SYNCWAIT
Synchronize Wait
27
28
RIS
ADC Raw Interrupt Status
0x4
-1
read-write
n
0x0
0x0
ADC_RIS_INR0
SS0 Raw Interrupt Status
0
1
ADC_RIS_INR1
SS1 Raw Interrupt Status
1
2
ADC_RIS_INR2
SS2 Raw Interrupt Status
2
3
ADC_RIS_INR3
SS3 Raw Interrupt Status
3
4
ADC_RIS_INRDC
Digital Comparator Raw Interrupt Status
16
17
SAC
ADC Sample Averaging Control
0x30
-1
read-write
n
0x0
0x0
ADC_SAC_AVG
Hardware Averaging Control
0
3
ADC_SAC_AVG_OFF
No hardware oversampling
0x0
ADC_SAC_AVG_2X
2x hardware oversampling
0x1
ADC_SAC_AVG_4X
4x hardware oversampling
0x2
ADC_SAC_AVG_8X
8x hardware oversampling
0x3
ADC_SAC_AVG_16X
16x hardware oversampling
0x4
ADC_SAC_AVG_32X
32x hardware oversampling
0x5
ADC_SAC_AVG_64X
64x hardware oversampling
0x6
SPC
ADC Sample Phase Control
0x24
-1
read-write
n
0x0
0x0
ADC_SPC_PHASE
Phase Difference
0
4
ADC_SPC_PHASE_0
ADC sample lags by 0.0
0x0
ADC_SPC_PHASE_22_5
ADC sample lags by 22.5
0x1
ADC_SPC_PHASE_45
ADC sample lags by 45.0
0x2
ADC_SPC_PHASE_67_5
ADC sample lags by 67.5
0x3
ADC_SPC_PHASE_90
ADC sample lags by 90.0
0x4
ADC_SPC_PHASE_112_5
ADC sample lags by 112.5
0x5
ADC_SPC_PHASE_135
ADC sample lags by 135.0
0x6
ADC_SPC_PHASE_157_5
ADC sample lags by 157.5
0x7
ADC_SPC_PHASE_180
ADC sample lags by 180.0
0x8
ADC_SPC_PHASE_202_5
ADC sample lags by 202.5
0x9
ADC_SPC_PHASE_225
ADC sample lags by 225.0
0xa
ADC_SPC_PHASE_247_5
ADC sample lags by 247.5
0xb
ADC_SPC_PHASE_270
ADC sample lags by 270.0
0xc
ADC_SPC_PHASE_292_5
ADC sample lags by 292.5
0xd
ADC_SPC_PHASE_315
ADC sample lags by 315.0
0xe
ADC_SPC_PHASE_337_5
ADC sample lags by 337.5
0xf
SSCTL0
ADC Sample Sequence Control 0
0x44
-1
read-write
n
0x0
0x0
ADC_SSCTL0_D0
1st Sample Differential Input Select
0
1
ADC_SSCTL0_D1
2nd Sample Differential Input Select
4
5
ADC_SSCTL0_D2
3rd Sample Differential Input Select
8
9
ADC_SSCTL0_D3
4th Sample Differential Input Select
12
13
ADC_SSCTL0_D4
5th Sample Differential Input Select
16
17
ADC_SSCTL0_D5
6th Sample Differential Input Select
20
21
ADC_SSCTL0_D6
7th Sample Differential Input Select
24
25
ADC_SSCTL0_D7
8th Sample Differential Input Select
28
29
ADC_SSCTL0_END0
1st Sample is End of Sequence
1
2
ADC_SSCTL0_END1
2nd Sample is End of Sequence
5
6
ADC_SSCTL0_END2
3rd Sample is End of Sequence
9
10
ADC_SSCTL0_END3
4th Sample is End of Sequence
13
14
ADC_SSCTL0_END4
5th Sample is End of Sequence
17
18
ADC_SSCTL0_END5
6th Sample is End of Sequence
21
22
ADC_SSCTL0_END6
7th Sample is End of Sequence
25
26
ADC_SSCTL0_END7
8th Sample is End of Sequence
29
30
ADC_SSCTL0_IE0
1st Sample Interrupt Enable
2
3
ADC_SSCTL0_IE1
2nd Sample Interrupt Enable
6
7
ADC_SSCTL0_IE2
3rd Sample Interrupt Enable
10
11
ADC_SSCTL0_IE3
4th Sample Interrupt Enable
14
15
ADC_SSCTL0_IE4
5th Sample Interrupt Enable
18
19
ADC_SSCTL0_IE5
6th Sample Interrupt Enable
22
23
ADC_SSCTL0_IE6
7th Sample Interrupt Enable
26
27
ADC_SSCTL0_IE7
8th Sample Interrupt Enable
30
31
ADC_SSCTL0_TS0
1st Sample Temp Sensor Select
3
4
ADC_SSCTL0_TS1
2nd Sample Temp Sensor Select
7
8
ADC_SSCTL0_TS2
3rd Sample Temp Sensor Select
11
12
ADC_SSCTL0_TS3
4th Sample Temp Sensor Select
15
16
ADC_SSCTL0_TS4
5th Sample Temp Sensor Select
19
20
ADC_SSCTL0_TS5
6th Sample Temp Sensor Select
23
24
ADC_SSCTL0_TS6
7th Sample Temp Sensor Select
27
28
ADC_SSCTL0_TS7
8th Sample Temp Sensor Select
31
32
SSCTL1
ADC Sample Sequence Control 1
0x64
-1
read-write
n
0x0
0x0
ADC_SSCTL1_D0
1st Sample Differential Input Select
0
1
ADC_SSCTL1_D1
2nd Sample Differential Input Select
4
5
ADC_SSCTL1_D2
3rd Sample Differential Input Select
8
9
ADC_SSCTL1_D3
4th Sample Differential Input Select
12
13
ADC_SSCTL1_END0
1st Sample is End of Sequence
1
2
ADC_SSCTL1_END1
2nd Sample is End of Sequence
5
6
ADC_SSCTL1_END2
3rd Sample is End of Sequence
9
10
ADC_SSCTL1_END3
4th Sample is End of Sequence
13
14
ADC_SSCTL1_IE0
1st Sample Interrupt Enable
2
3
ADC_SSCTL1_IE1
2nd Sample Interrupt Enable
6
7
ADC_SSCTL1_IE2
3rd Sample Interrupt Enable
10
11
ADC_SSCTL1_IE3
4th Sample Interrupt Enable
14
15
ADC_SSCTL1_TS0
1st Sample Temp Sensor Select
3
4
ADC_SSCTL1_TS1
2nd Sample Temp Sensor Select
7
8
ADC_SSCTL1_TS2
3rd Sample Temp Sensor Select
11
12
ADC_SSCTL1_TS3
4th Sample Temp Sensor Select
15
16
SSCTL2
ADC Sample Sequence Control 2
0x84
-1
read-write
n
0x0
0x0
ADC_SSCTL2_D0
1st Sample Differential Input Select
0
1
ADC_SSCTL2_D1
2nd Sample Differential Input Select
4
5
ADC_SSCTL2_D2
3rd Sample Differential Input Select
8
9
ADC_SSCTL2_D3
4th Sample Differential Input Select
12
13
ADC_SSCTL2_END0
1st Sample is End of Sequence
1
2
ADC_SSCTL2_END1
2nd Sample is End of Sequence
5
6
ADC_SSCTL2_END2
3rd Sample is End of Sequence
9
10
ADC_SSCTL2_END3
4th Sample is End of Sequence
13
14
ADC_SSCTL2_IE0
1st Sample Interrupt Enable
2
3
ADC_SSCTL2_IE1
2nd Sample Interrupt Enable
6
7
ADC_SSCTL2_IE2
3rd Sample Interrupt Enable
10
11
ADC_SSCTL2_IE3
4th Sample Interrupt Enable
14
15
ADC_SSCTL2_TS0
1st Sample Temp Sensor Select
3
4
ADC_SSCTL2_TS1
2nd Sample Temp Sensor Select
7
8
ADC_SSCTL2_TS2
3rd Sample Temp Sensor Select
11
12
ADC_SSCTL2_TS3
4th Sample Temp Sensor Select
15
16
SSCTL3
ADC Sample Sequence Control 3
0xA4
-1
read-write
n
0x0
0x0
ADC_SSCTL3_D0
Sample Differential Input Select
0
1
ADC_SSCTL3_END0
End of Sequence
1
2
ADC_SSCTL3_IE0
Sample Interrupt Enable
2
3
ADC_SSCTL3_TS0
1st Sample Temp Sensor Select
3
4
SSDC0
ADC Sample Sequence 0 Digital Comparator Select
0x54
-1
read-write
n
0x0
0x0
ADC_SSDC0_S0DCSEL
Sample 0 Digital Comparator Select
0
4
ADC_SSDC0_S1DCSEL
Sample 1 Digital Comparator Select
4
8
ADC_SSDC0_S2DCSEL
Sample 2 Digital Comparator Select
8
12
ADC_SSDC0_S3DCSEL
Sample 3 Digital Comparator Select
12
16
ADC_SSDC0_S4DCSEL
Sample 4 Digital Comparator Select
16
20
ADC_SSDC0_S5DCSEL
Sample 5 Digital Comparator Select
20
24
ADC_SSDC0_S6DCSEL
Sample 6 Digital Comparator Select
24
28
ADC_SSDC0_S7DCSEL
Sample 7 Digital Comparator Select
28
32
SSDC1
ADC Sample Sequence 1 Digital Comparator Select
0x74
-1
read-write
n
0x0
0x0
ADC_SSDC1_S0DCSEL
Sample 0 Digital Comparator Select
0
4
ADC_SSDC1_S1DCSEL
Sample 1 Digital Comparator Select
4
8
ADC_SSDC1_S2DCSEL
Sample 2 Digital Comparator Select
8
12
ADC_SSDC1_S3DCSEL
Sample 3 Digital Comparator Select
12
16
SSDC2
ADC Sample Sequence 2 Digital Comparator Select
0x94
-1
read-write
n
0x0
0x0
ADC_SSDC2_S0DCSEL
Sample 0 Digital Comparator Select
0
4
ADC_SSDC2_S1DCSEL
Sample 1 Digital Comparator Select
4
8
ADC_SSDC2_S2DCSEL
Sample 2 Digital Comparator Select
8
12
ADC_SSDC2_S3DCSEL
Sample 3 Digital Comparator Select
12
16
SSDC3
ADC Sample Sequence 3 Digital Comparator Select
0xB4
-1
read-write
n
0x0
0x0
ADC_SSDC3_S0DCSEL
Sample 0 Digital Comparator Select
0
4
SSEMUX0
ADC Sample Sequence Extended Input Multiplexer Select 0
0x58
-1
read-write
n
0x0
0x0
ADC_SSEMUX0_EMUX0
1st Sample Input Select (Upper Bit)
0
1
ADC_SSEMUX0_EMUX1
2th Sample Input Select (Upper Bit)
4
5
ADC_SSEMUX0_EMUX2
3rd Sample Input Select (Upper Bit)
8
9
ADC_SSEMUX0_EMUX3
4th Sample Input Select (Upper Bit)
12
13
ADC_SSEMUX0_EMUX4
5th Sample Input Select (Upper Bit)
16
17
ADC_SSEMUX0_EMUX5
6th Sample Input Select (Upper Bit)
20
21
ADC_SSEMUX0_EMUX6
7th Sample Input Select (Upper Bit)
24
25
ADC_SSEMUX0_EMUX7
8th Sample Input Select (Upper Bit)
28
29
SSEMUX1
ADC Sample Sequence Extended Input Multiplexer Select 1
0x78
-1
read-write
n
0x0
0x0
ADC_SSEMUX1_EMUX0
1st Sample Input Select (Upper Bit)
0
1
ADC_SSEMUX1_EMUX1
2th Sample Input Select (Upper Bit)
4
5
ADC_SSEMUX1_EMUX2
3rd Sample Input Select (Upper Bit)
8
9
ADC_SSEMUX1_EMUX3
4th Sample Input Select (Upper Bit)
12
13
SSEMUX2
ADC Sample Sequence Extended Input Multiplexer Select 2
0x98
-1
read-write
n
0x0
0x0
ADC_SSEMUX2_EMUX0
1st Sample Input Select (Upper Bit)
0
1
ADC_SSEMUX2_EMUX1
2th Sample Input Select (Upper Bit)
4
5
ADC_SSEMUX2_EMUX2
3rd Sample Input Select (Upper Bit)
8
9
ADC_SSEMUX2_EMUX3
4th Sample Input Select (Upper Bit)
12
13
SSEMUX3
ADC Sample Sequence Extended Input Multiplexer Select 3
0xB8
-1
read-write
n
0x0
0x0
ADC_SSEMUX3_EMUX0
1st Sample Input Select (Upper Bit)
0
1
SSFIFO0
ADC Sample Sequence Result FIFO 0
0x48
-1
read-write
n
0x0
0x0
ADC_SSFIFO0_DATA
Conversion Result Data
0
12
SSFIFO1
ADC Sample Sequence Result FIFO 1
0x68
-1
read-write
n
0x0
0x0
ADC_SSFIFO1_DATA
Conversion Result Data
0
12
SSFIFO2
ADC Sample Sequence Result FIFO 2
0x88
-1
read-write
n
0x0
0x0
ADC_SSFIFO2_DATA
Conversion Result Data
0
12
SSFIFO3
ADC Sample Sequence Result FIFO 3
0xA8
-1
read-write
n
0x0
0x0
ADC_SSFIFO3_DATA
Conversion Result Data
0
12
SSFSTAT0
ADC Sample Sequence FIFO 0 Status
0x4C
-1
read-write
n
0x0
0x0
ADC_SSFSTAT0_EMPTY
FIFO Empty
8
9
ADC_SSFSTAT0_FULL
FIFO Full
12
13
ADC_SSFSTAT0_HPTR
FIFO Head Pointer
4
8
ADC_SSFSTAT0_TPTR
FIFO Tail Pointer
0
4
SSFSTAT1
ADC Sample Sequence FIFO 1 Status
0x6C
-1
read-write
n
0x0
0x0
ADC_SSFSTAT1_EMPTY
FIFO Empty
8
9
ADC_SSFSTAT1_FULL
FIFO Full
12
13
ADC_SSFSTAT1_HPTR
FIFO Head Pointer
4
8
ADC_SSFSTAT1_TPTR
FIFO Tail Pointer
0
4
SSFSTAT2
ADC Sample Sequence FIFO 2 Status
0x8C
-1
read-write
n
0x0
0x0
ADC_SSFSTAT2_EMPTY
FIFO Empty
8
9
ADC_SSFSTAT2_FULL
FIFO Full
12
13
ADC_SSFSTAT2_HPTR
FIFO Head Pointer
4
8
ADC_SSFSTAT2_TPTR
FIFO Tail Pointer
0
4
SSFSTAT3
ADC Sample Sequence FIFO 3 Status
0xAC
-1
read-write
n
0x0
0x0
ADC_SSFSTAT3_EMPTY
FIFO Empty
8
9
ADC_SSFSTAT3_FULL
FIFO Full
12
13
ADC_SSFSTAT3_HPTR
FIFO Head Pointer
4
8
ADC_SSFSTAT3_TPTR
FIFO Tail Pointer
0
4
SSMUX0
ADC Sample Sequence Input Multiplexer Select 0
0x40
-1
read-write
n
0x0
0x0
ADC_SSMUX0_MUX0
1st Sample Input Select
0
4
ADC_SSMUX0_MUX1
2nd Sample Input Select
4
8
ADC_SSMUX0_MUX2
3rd Sample Input Select
8
12
ADC_SSMUX0_MUX3
4th Sample Input Select
12
16
ADC_SSMUX0_MUX4
5th Sample Input Select
16
20
ADC_SSMUX0_MUX5
6th Sample Input Select
20
24
ADC_SSMUX0_MUX6
7th Sample Input Select
24
28
ADC_SSMUX0_MUX7
8th Sample Input Select
28
32
SSMUX1
ADC Sample Sequence Input Multiplexer Select 1
0x60
-1
read-write
n
0x0
0x0
ADC_SSMUX1_MUX0
1st Sample Input Select
0
4
ADC_SSMUX1_MUX1
2nd Sample Input Select
4
8
ADC_SSMUX1_MUX2
3rd Sample Input Select
8
12
ADC_SSMUX1_MUX3
4th Sample Input Select
12
16
SSMUX2
ADC Sample Sequence Input Multiplexer Select 2
0x80
-1
read-write
n
0x0
0x0
ADC_SSMUX2_MUX0
1st Sample Input Select
0
4
ADC_SSMUX2_MUX1
2nd Sample Input Select
4
8
ADC_SSMUX2_MUX2
3rd Sample Input Select
8
12
ADC_SSMUX2_MUX3
4th Sample Input Select
12
16
SSMUX3
ADC Sample Sequence Input Multiplexer Select 3
0xA0
-1
read-write
n
0x0
0x0
ADC_SSMUX3_MUX0
1st Sample Input Select
0
4
SSOP0
ADC Sample Sequence 0 Operation
0x50
-1
read-write
n
0x0
0x0
ADC_SSOP0_S0DCOP
Sample 0 Digital Comparator Operation
0
1
ADC_SSOP0_S1DCOP
Sample 1 Digital Comparator Operation
4
5
ADC_SSOP0_S2DCOP
Sample 2 Digital Comparator Operation
8
9
ADC_SSOP0_S3DCOP
Sample 3 Digital Comparator Operation
12
13
ADC_SSOP0_S4DCOP
Sample 4 Digital Comparator Operation
16
17
ADC_SSOP0_S5DCOP
Sample 5 Digital Comparator Operation
20
21
ADC_SSOP0_S6DCOP
Sample 6 Digital Comparator Operation
24
25
ADC_SSOP0_S7DCOP
Sample 7 Digital Comparator Operation
28
29
SSOP1
ADC Sample Sequence 1 Operation
0x70
-1
read-write
n
0x0
0x0
ADC_SSOP1_S0DCOP
Sample 0 Digital Comparator Operation
0
1
ADC_SSOP1_S1DCOP
Sample 1 Digital Comparator Operation
4
5
ADC_SSOP1_S2DCOP
Sample 2 Digital Comparator Operation
8
9
ADC_SSOP1_S3DCOP
Sample 3 Digital Comparator Operation
12
13
SSOP2
ADC Sample Sequence 2 Operation
0x90
-1
read-write
n
0x0
0x0
ADC_SSOP2_S0DCOP
Sample 0 Digital Comparator Operation
0
1
ADC_SSOP2_S1DCOP
Sample 1 Digital Comparator Operation
4
5
ADC_SSOP2_S2DCOP
Sample 2 Digital Comparator Operation
8
9
ADC_SSOP2_S3DCOP
Sample 3 Digital Comparator Operation
12
13
SSOP3
ADC Sample Sequence 3 Operation
0xB0
-1
read-write
n
0x0
0x0
ADC_SSOP3_S0DCOP
Sample 0 Digital Comparator Operation
0
1
SSPRI
ADC Sample Sequencer Priority
0x20
-1
read-write
n
0x0
0x0
ADC_SSPRI_SS0
SS0 Priority
0
2
ADC_SSPRI_SS1
SS1 Priority
4
6
ADC_SSPRI_SS2
SS2 Priority
8
10
ADC_SSPRI_SS3
SS3 Priority
12
14
USTAT
ADC Underflow Status
0x18
-1
read-write
n
0x0
0x0
ADC_USTAT_UV0
SS0 FIFO Underflow
0
1
ADC_USTAT_UV1
SS1 FIFO Underflow
1
2
ADC_USTAT_UV2
SS2 FIFO Underflow
2
3
ADC_USTAT_UV3
SS3 FIFO Underflow
3
4
ADC1
Register map for ADC0 peripheral
ADC
0x0
0x0
0x1000
registers
n
ADC1SS0
48
ADC1SS1
49
ADC1SS2
50
ADC1SS3
51
ACTSS
ADC Active Sample Sequencer
0x0
-1
read-write
n
0x0
0x0
ADC_ACTSS_ASEN0
ADC SS0 Enable
0
1
ADC_ACTSS_ASEN1
ADC SS1 Enable
1
2
ADC_ACTSS_ASEN2
ADC SS2 Enable
2
3
ADC_ACTSS_ASEN3
ADC SS3 Enable
3
4
ADC_ACTSS_BUSY
ADC Busy
16
17
ADC0ACTSS
ADC Active Sample Sequencer
0x0
read-write
n
0x0
0x0
ADC_ACTSS_ASEN0
ADC SS0 Enable
0
1
ADC_ACTSS_ASEN1
ADC SS1 Enable
1
2
ADC_ACTSS_ASEN2
ADC SS2 Enable
2
3
ADC_ACTSS_ASEN3
ADC SS3 Enable
3
4
ADC_ACTSS_BUSY
ADC Busy
16
17
ADC0CC
ADC Clock Configuration
0xFC8
read-write
n
0x0
0x0
ADC_CC_CS
ADC Clock Source
0
4
ADC_CC_CS_SYSPLL
PLL VCO divided by CLKDIV
0x0
ADC_CC_CS_PIOSC
PIOSC
0x1
ADC0CTL
ADC Control
0x38
read-write
n
0x0
0x0
ADC_CTL_DITHER
Dither Mode Enable
6
7
ADC_CTL_VREF
Voltage Reference Select
0
1
ADC_CTL_VREF_INTERNAL
VDDA and GNDA are the voltage references
0x0
ADC_CTL_VREF_EXT_3V
The external VREFA+ and VREFA- inputs are the voltage references
0x1
ADC0DCCMP0
ADC Digital Comparator Range 0
0xE40
read-write
n
0x0
0x0
ADC_DCCMP0_COMP0
Compare 0
0
12
ADC_DCCMP0_COMP1
Compare 1
16
28
ADC0DCCMP1
ADC Digital Comparator Range 1
0xE44
read-write
n
0x0
0x0
ADC_DCCMP1_COMP0
Compare 0
0
12
ADC_DCCMP1_COMP1
Compare 1
16
28
ADC0DCCMP2
ADC Digital Comparator Range 2
0xE48
read-write
n
0x0
0x0
ADC_DCCMP2_COMP0
Compare 0
0
12
ADC_DCCMP2_COMP1
Compare 1
16
28
ADC0DCCMP3
ADC Digital Comparator Range 3
0xE4C
read-write
n
0x0
0x0
ADC_DCCMP3_COMP0
Compare 0
0
12
ADC_DCCMP3_COMP1
Compare 1
16
28
ADC0DCCMP4
ADC Digital Comparator Range 4
0xE50
read-write
n
0x0
0x0
ADC_DCCMP4_COMP0
Compare 0
0
12
ADC_DCCMP4_COMP1
Compare 1
16
28
ADC0DCCMP5
ADC Digital Comparator Range 5
0xE54
read-write
n
0x0
0x0
ADC_DCCMP5_COMP0
Compare 0
0
12
ADC_DCCMP5_COMP1
Compare 1
16
28
ADC0DCCMP6
ADC Digital Comparator Range 6
0xE58
read-write
n
0x0
0x0
ADC_DCCMP6_COMP0
Compare 0
0
12
ADC_DCCMP6_COMP1
Compare 1
16
28
ADC0DCCMP7
ADC Digital Comparator Range 7
0xE5C
read-write
n
0x0
0x0
ADC_DCCMP7_COMP0
Compare 0
0
12
ADC_DCCMP7_COMP1
Compare 1
16
28
ADC0DCCTL0
ADC Digital Comparator Control 0
0xE00
read-write
n
0x0
0x0
ADC_DCCTL0_CIC
Comparison Interrupt Condition
2
4
ADC_DCCTL0_CIC_LOW
Low Band
0x0
ADC_DCCTL0_CIC_MID
Mid Band
0x1
ADC_DCCTL0_CIC_HIGH
High Band
0x3
ADC_DCCTL0_CIE
Comparison Interrupt Enable
4
5
ADC_DCCTL0_CIM
Comparison Interrupt Mode
0
2
ADC_DCCTL0_CIM_ALWAYS
Always
0x0
ADC_DCCTL0_CIM_ONCE
Once
0x1
ADC_DCCTL0_CIM_HALWAYS
Hysteresis Always
0x2
ADC_DCCTL0_CIM_HONCE
Hysteresis Once
0x3
ADC0DCCTL1
ADC Digital Comparator Control 1
0xE04
read-write
n
0x0
0x0
ADC_DCCTL1_CIC
Comparison Interrupt Condition
2
4
ADC_DCCTL1_CIC_LOW
Low Band
0x0
ADC_DCCTL1_CIC_MID
Mid Band
0x1
ADC_DCCTL1_CIC_HIGH
High Band
0x3
ADC_DCCTL1_CIE
Comparison Interrupt Enable
4
5
ADC_DCCTL1_CIM
Comparison Interrupt Mode
0
2
ADC_DCCTL1_CIM_ALWAYS
Always
0x0
ADC_DCCTL1_CIM_ONCE
Once
0x1
ADC_DCCTL1_CIM_HALWAYS
Hysteresis Always
0x2
ADC_DCCTL1_CIM_HONCE
Hysteresis Once
0x3
ADC0DCCTL2
ADC Digital Comparator Control 2
0xE08
read-write
n
0x0
0x0
ADC_DCCTL2_CIC
Comparison Interrupt Condition
2
4
ADC_DCCTL2_CIC_LOW
Low Band
0x0
ADC_DCCTL2_CIC_MID
Mid Band
0x1
ADC_DCCTL2_CIC_HIGH
High Band
0x3
ADC_DCCTL2_CIE
Comparison Interrupt Enable
4
5
ADC_DCCTL2_CIM
Comparison Interrupt Mode
0
2
ADC_DCCTL2_CIM_ALWAYS
Always
0x0
ADC_DCCTL2_CIM_ONCE
Once
0x1
ADC_DCCTL2_CIM_HALWAYS
Hysteresis Always
0x2
ADC_DCCTL2_CIM_HONCE
Hysteresis Once
0x3
ADC0DCCTL3
ADC Digital Comparator Control 3
0xE0C
read-write
n
0x0
0x0
ADC_DCCTL3_CIC
Comparison Interrupt Condition
2
4
ADC_DCCTL3_CIC_LOW
Low Band
0x0
ADC_DCCTL3_CIC_MID
Mid Band
0x1
ADC_DCCTL3_CIC_HIGH
High Band
0x3
ADC_DCCTL3_CIE
Comparison Interrupt Enable
4
5
ADC_DCCTL3_CIM
Comparison Interrupt Mode
0
2
ADC_DCCTL3_CIM_ALWAYS
Always
0x0
ADC_DCCTL3_CIM_ONCE
Once
0x1
ADC_DCCTL3_CIM_HALWAYS
Hysteresis Always
0x2
ADC_DCCTL3_CIM_HONCE
Hysteresis Once
0x3
ADC0DCCTL4
ADC Digital Comparator Control 4
0xE10
read-write
n
0x0
0x0
ADC_DCCTL4_CIC
Comparison Interrupt Condition
2
4
ADC_DCCTL4_CIC_LOW
Low Band
0x0
ADC_DCCTL4_CIC_MID
Mid Band
0x1
ADC_DCCTL4_CIC_HIGH
High Band
0x3
ADC_DCCTL4_CIE
Comparison Interrupt Enable
4
5
ADC_DCCTL4_CIM
Comparison Interrupt Mode
0
2
ADC_DCCTL4_CIM_ALWAYS
Always
0x0
ADC_DCCTL4_CIM_ONCE
Once
0x1
ADC_DCCTL4_CIM_HALWAYS
Hysteresis Always
0x2
ADC_DCCTL4_CIM_HONCE
Hysteresis Once
0x3
ADC0DCCTL5
ADC Digital Comparator Control 5
0xE14
read-write
n
0x0
0x0
ADC_DCCTL5_CIC
Comparison Interrupt Condition
2
4
ADC_DCCTL5_CIC_LOW
Low Band
0x0
ADC_DCCTL5_CIC_MID
Mid Band
0x1
ADC_DCCTL5_CIC_HIGH
High Band
0x3
ADC_DCCTL5_CIE
Comparison Interrupt Enable
4
5
ADC_DCCTL5_CIM
Comparison Interrupt Mode
0
2
ADC_DCCTL5_CIM_ALWAYS
Always
0x0
ADC_DCCTL5_CIM_ONCE
Once
0x1
ADC_DCCTL5_CIM_HALWAYS
Hysteresis Always
0x2
ADC_DCCTL5_CIM_HONCE
Hysteresis Once
0x3
ADC0DCCTL6
ADC Digital Comparator Control 6
0xE18
read-write
n
0x0
0x0
ADC_DCCTL6_CIC
Comparison Interrupt Condition
2
4
ADC_DCCTL6_CIC_LOW
Low Band
0x0
ADC_DCCTL6_CIC_MID
Mid Band
0x1
ADC_DCCTL6_CIC_HIGH
High Band
0x3
ADC_DCCTL6_CIE
Comparison Interrupt Enable
4
5
ADC_DCCTL6_CIM
Comparison Interrupt Mode
0
2
ADC_DCCTL6_CIM_ALWAYS
Always
0x0
ADC_DCCTL6_CIM_ONCE
Once
0x1
ADC_DCCTL6_CIM_HALWAYS
Hysteresis Always
0x2
ADC_DCCTL6_CIM_HONCE
Hysteresis Once
0x3
ADC0DCCTL7
ADC Digital Comparator Control 7
0xE1C
read-write
n
0x0
0x0
ADC_DCCTL7_CIC
Comparison Interrupt Condition
2
4
ADC_DCCTL7_CIC_LOW
Low Band
0x0
ADC_DCCTL7_CIC_MID
Mid Band
0x1
ADC_DCCTL7_CIC_HIGH
High Band
0x3
ADC_DCCTL7_CIE
Comparison Interrupt Enable
4
5
ADC_DCCTL7_CIM
Comparison Interrupt Mode
0
2
ADC_DCCTL7_CIM_ALWAYS
Always
0x0
ADC_DCCTL7_CIM_ONCE
Once
0x1
ADC_DCCTL7_CIM_HALWAYS
Hysteresis Always
0x2
ADC_DCCTL7_CIM_HONCE
Hysteresis Once
0x3
ADC0DCISC
ADC Digital Comparator Interrupt Status and Clear
0x34
read-write
n
0x0
0x0
ADC_DCISC_DCINT0
Digital Comparator 0 Interrupt Status and Clear
0
1
ADC_DCISC_DCINT1
Digital Comparator 1 Interrupt Status and Clear
1
2
ADC_DCISC_DCINT2
Digital Comparator 2 Interrupt Status and Clear
2
3
ADC_DCISC_DCINT3
Digital Comparator 3 Interrupt Status and Clear
3
4
ADC_DCISC_DCINT4
Digital Comparator 4 Interrupt Status and Clear
4
5
ADC_DCISC_DCINT5
Digital Comparator 5 Interrupt Status and Clear
5
6
ADC_DCISC_DCINT6
Digital Comparator 6 Interrupt Status and Clear
6
7
ADC_DCISC_DCINT7
Digital Comparator 7 Interrupt Status and Clear
7
8
ADC0DCRIC
ADC Digital Comparator Reset Initial Conditions
0xD00
write-only
n
0x0
0x0
ADC_DCRIC_DCINT0
Digital Comparator Interrupt 0
0
1
write-only
ADC_DCRIC_DCINT1
Digital Comparator Interrupt 1
1
2
write-only
ADC_DCRIC_DCINT2
Digital Comparator Interrupt 2
2
3
write-only
ADC_DCRIC_DCINT3
Digital Comparator Interrupt 3
3
4
write-only
ADC_DCRIC_DCINT4
Digital Comparator Interrupt 4
4
5
write-only
ADC_DCRIC_DCINT5
Digital Comparator Interrupt 5
5
6
write-only
ADC_DCRIC_DCINT6
Digital Comparator Interrupt 6
6
7
write-only
ADC_DCRIC_DCINT7
Digital Comparator Interrupt 7
7
8
write-only
ADC_DCRIC_DCTRIG0
Digital Comparator Trigger 0
16
17
write-only
ADC_DCRIC_DCTRIG1
Digital Comparator Trigger 1
17
18
write-only
ADC_DCRIC_DCTRIG2
Digital Comparator Trigger 2
18
19
write-only
ADC_DCRIC_DCTRIG3
Digital Comparator Trigger 3
19
20
write-only
ADC_DCRIC_DCTRIG4
Digital Comparator Trigger 4
20
21
write-only
ADC_DCRIC_DCTRIG5
Digital Comparator Trigger 5
21
22
write-only
ADC_DCRIC_DCTRIG6
Digital Comparator Trigger 6
22
23
write-only
ADC_DCRIC_DCTRIG7
Digital Comparator Trigger 7
23
24
write-only
ADC0EMUX
ADC Event Multiplexer Select
0x14
read-write
n
0x0
0x0
ADC_EMUX_EM0
SS0 Trigger Select
0
4
ADC_EMUX_EM0_PROCESSOR
Processor (default)
0x0
ADC_EMUX_EM0_COMP0
Analog Comparator 0
0x1
ADC_EMUX_EM0_COMP1
Analog Comparator 1
0x2
ADC_EMUX_EM0_COMP2
Analog Comparator 2
0x3
ADC_EMUX_EM0_EXTERNAL
External (GPIO Pins)
0x4
ADC_EMUX_EM0_TIMER
Timer
0x5
ADC_EMUX_EM0_ALWAYS
Always (continuously sample)
0xf
ADC_EMUX_EM1
SS1 Trigger Select
4
8
ADC_EMUX_EM1_PROCESSOR
Processor (default)
0x0
ADC_EMUX_EM1_COMP0
Analog Comparator 0
0x1
ADC_EMUX_EM1_COMP1
Analog Comparator 1
0x2
ADC_EMUX_EM1_COMP2
Analog Comparator 2
0x3
ADC_EMUX_EM1_EXTERNAL
External (GPIO Pins)
0x4
ADC_EMUX_EM1_TIMER
Timer
0x5
ADC_EMUX_EM1_ALWAYS
Always (continuously sample)
0xf
ADC_EMUX_EM2
SS2 Trigger Select
8
12
ADC_EMUX_EM2_PROCESSOR
Processor (default)
0x0
ADC_EMUX_EM2_COMP0
Analog Comparator 0
0x1
ADC_EMUX_EM2_COMP1
Analog Comparator 1
0x2
ADC_EMUX_EM2_COMP2
Analog Comparator 2
0x3
ADC_EMUX_EM2_EXTERNAL
External (GPIO Pins)
0x4
ADC_EMUX_EM2_TIMER
Timer
0x5
ADC_EMUX_EM2_ALWAYS
Always (continuously sample)
0xf
ADC_EMUX_EM3
SS3 Trigger Select
12
16
ADC_EMUX_EM3_PROCESSOR
Processor (default)
0x0
ADC_EMUX_EM3_COMP0
Analog Comparator 0
0x1
ADC_EMUX_EM3_COMP1
Analog Comparator 1
0x2
ADC_EMUX_EM3_COMP2
Analog Comparator 2
0x3
ADC_EMUX_EM3_EXTERNAL
External (GPIO Pins)
0x4
ADC_EMUX_EM3_TIMER
Timer
0x5
ADC_EMUX_EM3_ALWAYS
Always (continuously sample)
0xf
ADC0IM
ADC Interrupt Mask
0x8
read-write
n
0x0
0x0
ADC_IM_DCONSS0
Digital Comparator Interrupt on SS0
16
17
ADC_IM_DCONSS1
Digital Comparator Interrupt on SS1
17
18
ADC_IM_DCONSS2
Digital Comparator Interrupt on SS2
18
19
ADC_IM_DCONSS3
Digital Comparator Interrupt on SS3
19
20
ADC_IM_MASK0
SS0 Interrupt Mask
0
1
ADC_IM_MASK1
SS1 Interrupt Mask
1
2
ADC_IM_MASK2
SS2 Interrupt Mask
2
3
ADC_IM_MASK3
SS3 Interrupt Mask
3
4
ADC0ISC
ADC Interrupt Status and Clear
0xC
read-write
n
0x0
0x0
ADC_ISC_DCINSS0
Digital Comparator Interrupt Status on SS0
16
17
ADC_ISC_DCINSS1
Digital Comparator Interrupt Status on SS1
17
18
ADC_ISC_DCINSS2
Digital Comparator Interrupt Status on SS2
18
19
ADC_ISC_DCINSS3
Digital Comparator Interrupt Status on SS3
19
20
ADC_ISC_IN0
SS0 Interrupt Status and Clear
0
1
ADC_ISC_IN1
SS1 Interrupt Status and Clear
1
2
ADC_ISC_IN2
SS2 Interrupt Status and Clear
2
3
ADC_ISC_IN3
SS3 Interrupt Status and Clear
3
4
ADC0OSTAT
ADC Overflow Status
0x10
read-write
n
0x0
0x0
ADC_OSTAT_OV0
SS0 FIFO Overflow
0
1
ADC_OSTAT_OV1
SS1 FIFO Overflow
1
2
ADC_OSTAT_OV2
SS2 FIFO Overflow
2
3
ADC_OSTAT_OV3
SS3 FIFO Overflow
3
4
ADC0PC
ADC Peripheral Configuration
0xFC4
read-write
n
0x0
0x0
ADC_PC_SR
ADC Sample Rate
0
4
ADC_PC_SR_125K
125 ksps
0x1
ADC_PC_SR_250K
250 ksps
0x3
ADC_PC_SR_500K
500 ksps
0x5
ADC_PC_SR_1M
1 Msps
0x7
ADC0PP
ADC Peripheral Properties
0xFC0
read-write
n
0x0
0x0
ADC_PP_CH
ADC Channel Count
4
10
ADC_PP_DC
Digital Comparator Count
10
16
ADC_PP_MSR
Maximum ADC Sample Rate
0
4
ADC_PP_MSR_125K
125 ksps
0x1
ADC_PP_MSR_250K
250 ksps
0x3
ADC_PP_MSR_500K
500 ksps
0x5
ADC_PP_MSR_1M
1 Msps
0x7
ADC_PP_RSL
Resolution
18
23
ADC_PP_TS
Temperature Sensor
23
24
ADC_PP_TYPE
ADC Architecture
16
18
ADC_PP_TYPE_SAR
SAR
0x0
ADC0PSSI
ADC Processor Sample Sequence Initiate
0x28
read-write
n
0x0
0x0
ADC_PSSI_GSYNC
Global Synchronize
31
32
ADC_PSSI_SS0
SS0 Initiate
0
1
ADC_PSSI_SS1
SS1 Initiate
1
2
ADC_PSSI_SS2
SS2 Initiate
2
3
ADC_PSSI_SS3
SS3 Initiate
3
4
ADC_PSSI_SYNCWAIT
Synchronize Wait
27
28
ADC0RIS
ADC Raw Interrupt Status
0x4
read-write
n
0x0
0x0
ADC_RIS_INR0
SS0 Raw Interrupt Status
0
1
ADC_RIS_INR1
SS1 Raw Interrupt Status
1
2
ADC_RIS_INR2
SS2 Raw Interrupt Status
2
3
ADC_RIS_INR3
SS3 Raw Interrupt Status
3
4
ADC_RIS_INRDC
Digital Comparator Raw Interrupt Status
16
17
ADC0SAC
ADC Sample Averaging Control
0x30
read-write
n
0x0
0x0
ADC_SAC_AVG
Hardware Averaging Control
0
3
ADC_SAC_AVG_OFF
No hardware oversampling
0x0
ADC_SAC_AVG_2X
2x hardware oversampling
0x1
ADC_SAC_AVG_4X
4x hardware oversampling
0x2
ADC_SAC_AVG_8X
8x hardware oversampling
0x3
ADC_SAC_AVG_16X
16x hardware oversampling
0x4
ADC_SAC_AVG_32X
32x hardware oversampling
0x5
ADC_SAC_AVG_64X
64x hardware oversampling
0x6
ADC0SPC
ADC Sample Phase Control
0x24
read-write
n
0x0
0x0
ADC_SPC_PHASE
Phase Difference
0
4
ADC_SPC_PHASE_0
ADC sample lags by 0.0
0x0
ADC_SPC_PHASE_22_5
ADC sample lags by 22.5
0x1
ADC_SPC_PHASE_45
ADC sample lags by 45.0
0x2
ADC_SPC_PHASE_67_5
ADC sample lags by 67.5
0x3
ADC_SPC_PHASE_90
ADC sample lags by 90.0
0x4
ADC_SPC_PHASE_112_5
ADC sample lags by 112.5
0x5
ADC_SPC_PHASE_135
ADC sample lags by 135.0
0x6
ADC_SPC_PHASE_157_5
ADC sample lags by 157.5
0x7
ADC_SPC_PHASE_180
ADC sample lags by 180.0
0x8
ADC_SPC_PHASE_202_5
ADC sample lags by 202.5
0x9
ADC_SPC_PHASE_225
ADC sample lags by 225.0
0xa
ADC_SPC_PHASE_247_5
ADC sample lags by 247.5
0xb
ADC_SPC_PHASE_270
ADC sample lags by 270.0
0xc
ADC_SPC_PHASE_292_5
ADC sample lags by 292.5
0xd
ADC_SPC_PHASE_315
ADC sample lags by 315.0
0xe
ADC_SPC_PHASE_337_5
ADC sample lags by 337.5
0xf
ADC0SSCTL0
ADC Sample Sequence Control 0
0x44
read-write
n
0x0
0x0
ADC_SSCTL0_D0
1st Sample Differential Input Select
0
1
ADC_SSCTL0_D1
2nd Sample Differential Input Select
4
5
ADC_SSCTL0_D2
3rd Sample Differential Input Select
8
9
ADC_SSCTL0_D3
4th Sample Differential Input Select
12
13
ADC_SSCTL0_D4
5th Sample Differential Input Select
16
17
ADC_SSCTL0_D5
6th Sample Differential Input Select
20
21
ADC_SSCTL0_D6
7th Sample Differential Input Select
24
25
ADC_SSCTL0_D7
8th Sample Differential Input Select
28
29
ADC_SSCTL0_END0
1st Sample is End of Sequence
1
2
ADC_SSCTL0_END1
2nd Sample is End of Sequence
5
6
ADC_SSCTL0_END2
3rd Sample is End of Sequence
9
10
ADC_SSCTL0_END3
4th Sample is End of Sequence
13
14
ADC_SSCTL0_END4
5th Sample is End of Sequence
17
18
ADC_SSCTL0_END5
6th Sample is End of Sequence
21
22
ADC_SSCTL0_END6
7th Sample is End of Sequence
25
26
ADC_SSCTL0_END7
8th Sample is End of Sequence
29
30
ADC_SSCTL0_IE0
1st Sample Interrupt Enable
2
3
ADC_SSCTL0_IE1
2nd Sample Interrupt Enable
6
7
ADC_SSCTL0_IE2
3rd Sample Interrupt Enable
10
11
ADC_SSCTL0_IE3
4th Sample Interrupt Enable
14
15
ADC_SSCTL0_IE4
5th Sample Interrupt Enable
18
19
ADC_SSCTL0_IE5
6th Sample Interrupt Enable
22
23
ADC_SSCTL0_IE6
7th Sample Interrupt Enable
26
27
ADC_SSCTL0_IE7
8th Sample Interrupt Enable
30
31
ADC_SSCTL0_TS0
1st Sample Temp Sensor Select
3
4
ADC_SSCTL0_TS1
2nd Sample Temp Sensor Select
7
8
ADC_SSCTL0_TS2
3rd Sample Temp Sensor Select
11
12
ADC_SSCTL0_TS3
4th Sample Temp Sensor Select
15
16
ADC_SSCTL0_TS4
5th Sample Temp Sensor Select
19
20
ADC_SSCTL0_TS5
6th Sample Temp Sensor Select
23
24
ADC_SSCTL0_TS6
7th Sample Temp Sensor Select
27
28
ADC_SSCTL0_TS7
8th Sample Temp Sensor Select
31
32
ADC0SSCTL1
ADC Sample Sequence Control 1
0x64
read-write
n
0x0
0x0
ADC_SSCTL1_D0
1st Sample Differential Input Select
0
1
ADC_SSCTL1_D1
2nd Sample Differential Input Select
4
5
ADC_SSCTL1_D2
3rd Sample Differential Input Select
8
9
ADC_SSCTL1_D3
4th Sample Differential Input Select
12
13
ADC_SSCTL1_END0
1st Sample is End of Sequence
1
2
ADC_SSCTL1_END1
2nd Sample is End of Sequence
5
6
ADC_SSCTL1_END2
3rd Sample is End of Sequence
9
10
ADC_SSCTL1_END3
4th Sample is End of Sequence
13
14
ADC_SSCTL1_IE0
1st Sample Interrupt Enable
2
3
ADC_SSCTL1_IE1
2nd Sample Interrupt Enable
6
7
ADC_SSCTL1_IE2
3rd Sample Interrupt Enable
10
11
ADC_SSCTL1_IE3
4th Sample Interrupt Enable
14
15
ADC_SSCTL1_TS0
1st Sample Temp Sensor Select
3
4
ADC_SSCTL1_TS1
2nd Sample Temp Sensor Select
7
8
ADC_SSCTL1_TS2
3rd Sample Temp Sensor Select
11
12
ADC_SSCTL1_TS3
4th Sample Temp Sensor Select
15
16
ADC0SSCTL2
ADC Sample Sequence Control 2
0x84
read-write
n
0x0
0x0
ADC_SSCTL2_D0
1st Sample Differential Input Select
0
1
ADC_SSCTL2_D1
2nd Sample Differential Input Select
4
5
ADC_SSCTL2_D2
3rd Sample Differential Input Select
8
9
ADC_SSCTL2_D3
4th Sample Differential Input Select
12
13
ADC_SSCTL2_END0
1st Sample is End of Sequence
1
2
ADC_SSCTL2_END1
2nd Sample is End of Sequence
5
6
ADC_SSCTL2_END2
3rd Sample is End of Sequence
9
10
ADC_SSCTL2_END3
4th Sample is End of Sequence
13
14
ADC_SSCTL2_IE0
1st Sample Interrupt Enable
2
3
ADC_SSCTL2_IE1
2nd Sample Interrupt Enable
6
7
ADC_SSCTL2_IE2
3rd Sample Interrupt Enable
10
11
ADC_SSCTL2_IE3
4th Sample Interrupt Enable
14
15
ADC_SSCTL2_TS0
1st Sample Temp Sensor Select
3
4
ADC_SSCTL2_TS1
2nd Sample Temp Sensor Select
7
8
ADC_SSCTL2_TS2
3rd Sample Temp Sensor Select
11
12
ADC_SSCTL2_TS3
4th Sample Temp Sensor Select
15
16
ADC0SSCTL3
ADC Sample Sequence Control 3
0xA4
read-write
n
0x0
0x0
ADC_SSCTL3_D0
Sample Differential Input Select
0
1
ADC_SSCTL3_END0
End of Sequence
1
2
ADC_SSCTL3_IE0
Sample Interrupt Enable
2
3
ADC_SSCTL3_TS0
1st Sample Temp Sensor Select
3
4
ADC0SSDC0
ADC Sample Sequence 0 Digital Comparator Select
0x54
read-write
n
0x0
0x0
ADC_SSDC0_S0DCSEL
Sample 0 Digital Comparator Select
0
4
ADC_SSDC0_S1DCSEL
Sample 1 Digital Comparator Select
4
8
ADC_SSDC0_S2DCSEL
Sample 2 Digital Comparator Select
8
12
ADC_SSDC0_S3DCSEL
Sample 3 Digital Comparator Select
12
16
ADC_SSDC0_S4DCSEL
Sample 4 Digital Comparator Select
16
20
ADC_SSDC0_S5DCSEL
Sample 5 Digital Comparator Select
20
24
ADC_SSDC0_S6DCSEL
Sample 6 Digital Comparator Select
24
28
ADC_SSDC0_S7DCSEL
Sample 7 Digital Comparator Select
28
32
ADC0SSDC1
ADC Sample Sequence 1 Digital Comparator Select
0x74
read-write
n
0x0
0x0
ADC_SSDC1_S0DCSEL
Sample 0 Digital Comparator Select
0
4
ADC_SSDC1_S1DCSEL
Sample 1 Digital Comparator Select
4
8
ADC_SSDC1_S2DCSEL
Sample 2 Digital Comparator Select
8
12
ADC_SSDC1_S3DCSEL
Sample 3 Digital Comparator Select
12
16
ADC0SSDC2
ADC Sample Sequence 2 Digital Comparator Select
0x94
read-write
n
0x0
0x0
ADC_SSDC2_S0DCSEL
Sample 0 Digital Comparator Select
0
4
ADC_SSDC2_S1DCSEL
Sample 1 Digital Comparator Select
4
8
ADC_SSDC2_S2DCSEL
Sample 2 Digital Comparator Select
8
12
ADC_SSDC2_S3DCSEL
Sample 3 Digital Comparator Select
12
16
ADC0SSDC3
ADC Sample Sequence 3 Digital Comparator Select
0xB4
read-write
n
0x0
0x0
ADC_SSDC3_S0DCSEL
Sample 0 Digital Comparator Select
0
4
ADC0SSEMUX0
ADC Sample Sequence Extended Input Multiplexer Select 0
0x58
read-write
n
0x0
0x0
ADC_SSEMUX0_EMUX0
1st Sample Input Select (Upper Bit)
0
1
ADC_SSEMUX0_EMUX1
2th Sample Input Select (Upper Bit)
4
5
ADC_SSEMUX0_EMUX2
3rd Sample Input Select (Upper Bit)
8
9
ADC_SSEMUX0_EMUX3
4th Sample Input Select (Upper Bit)
12
13
ADC_SSEMUX0_EMUX4
5th Sample Input Select (Upper Bit)
16
17
ADC_SSEMUX0_EMUX5
6th Sample Input Select (Upper Bit)
20
21
ADC_SSEMUX0_EMUX6
7th Sample Input Select (Upper Bit)
24
25
ADC_SSEMUX0_EMUX7
8th Sample Input Select (Upper Bit)
28
29
ADC0SSEMUX1
ADC Sample Sequence Extended Input Multiplexer Select 1
0x78
read-write
n
0x0
0x0
ADC_SSEMUX1_EMUX0
1st Sample Input Select (Upper Bit)
0
1
ADC_SSEMUX1_EMUX1
2th Sample Input Select (Upper Bit)
4
5
ADC_SSEMUX1_EMUX2
3rd Sample Input Select (Upper Bit)
8
9
ADC_SSEMUX1_EMUX3
4th Sample Input Select (Upper Bit)
12
13
ADC0SSEMUX2
ADC Sample Sequence Extended Input Multiplexer Select 2
0x98
read-write
n
0x0
0x0
ADC_SSEMUX2_EMUX0
1st Sample Input Select (Upper Bit)
0
1
ADC_SSEMUX2_EMUX1
2th Sample Input Select (Upper Bit)
4
5
ADC_SSEMUX2_EMUX2
3rd Sample Input Select (Upper Bit)
8
9
ADC_SSEMUX2_EMUX3
4th Sample Input Select (Upper Bit)
12
13
ADC0SSEMUX3
ADC Sample Sequence Extended Input Multiplexer Select 3
0xB8
read-write
n
0x0
0x0
ADC_SSEMUX3_EMUX0
1st Sample Input Select (Upper Bit)
0
1
ADC0SSFIFO0
ADC Sample Sequence Result FIFO 0
0x48
read-write
n
0x0
0x0
ADC_SSFIFO0_DATA
Conversion Result Data
0
12
ADC0SSFIFO1
ADC Sample Sequence Result FIFO 1
0x68
read-write
n
0x0
0x0
ADC_SSFIFO1_DATA
Conversion Result Data
0
12
ADC0SSFIFO2
ADC Sample Sequence Result FIFO 2
0x88
read-write
n
0x0
0x0
ADC_SSFIFO2_DATA
Conversion Result Data
0
12
ADC0SSFIFO3
ADC Sample Sequence Result FIFO 3
0xA8
read-write
n
0x0
0x0
ADC_SSFIFO3_DATA
Conversion Result Data
0
12
ADC0SSFSTAT0
ADC Sample Sequence FIFO 0 Status
0x4C
read-write
n
0x0
0x0
ADC_SSFSTAT0_EMPTY
FIFO Empty
8
9
ADC_SSFSTAT0_FULL
FIFO Full
12
13
ADC_SSFSTAT0_HPTR
FIFO Head Pointer
4
8
ADC_SSFSTAT0_TPTR
FIFO Tail Pointer
0
4
ADC0SSFSTAT1
ADC Sample Sequence FIFO 1 Status
0x6C
read-write
n
0x0
0x0
ADC_SSFSTAT1_EMPTY
FIFO Empty
8
9
ADC_SSFSTAT1_FULL
FIFO Full
12
13
ADC_SSFSTAT1_HPTR
FIFO Head Pointer
4
8
ADC_SSFSTAT1_TPTR
FIFO Tail Pointer
0
4
ADC0SSFSTAT2
ADC Sample Sequence FIFO 2 Status
0x8C
read-write
n
0x0
0x0
ADC_SSFSTAT2_EMPTY
FIFO Empty
8
9
ADC_SSFSTAT2_FULL
FIFO Full
12
13
ADC_SSFSTAT2_HPTR
FIFO Head Pointer
4
8
ADC_SSFSTAT2_TPTR
FIFO Tail Pointer
0
4
ADC0SSFSTAT3
ADC Sample Sequence FIFO 3 Status
0xAC
read-write
n
0x0
0x0
ADC_SSFSTAT3_EMPTY
FIFO Empty
8
9
ADC_SSFSTAT3_FULL
FIFO Full
12
13
ADC_SSFSTAT3_HPTR
FIFO Head Pointer
4
8
ADC_SSFSTAT3_TPTR
FIFO Tail Pointer
0
4
ADC0SSMUX0
ADC Sample Sequence Input Multiplexer Select 0
0x40
read-write
n
0x0
0x0
ADC_SSMUX0_MUX0
1st Sample Input Select
0
4
ADC_SSMUX0_MUX1
2nd Sample Input Select
4
8
ADC_SSMUX0_MUX2
3rd Sample Input Select
8
12
ADC_SSMUX0_MUX3
4th Sample Input Select
12
16
ADC_SSMUX0_MUX4
5th Sample Input Select
16
20
ADC_SSMUX0_MUX5
6th Sample Input Select
20
24
ADC_SSMUX0_MUX6
7th Sample Input Select
24
28
ADC_SSMUX0_MUX7
8th Sample Input Select
28
32
ADC0SSMUX1
ADC Sample Sequence Input Multiplexer Select 1
0x60
read-write
n
0x0
0x0
ADC_SSMUX1_MUX0
1st Sample Input Select
0
4
ADC_SSMUX1_MUX1
2nd Sample Input Select
4
8
ADC_SSMUX1_MUX2
3rd Sample Input Select
8
12
ADC_SSMUX1_MUX3
4th Sample Input Select
12
16
ADC0SSMUX2
ADC Sample Sequence Input Multiplexer Select 2
0x80
read-write
n
0x0
0x0
ADC_SSMUX2_MUX0
1st Sample Input Select
0
4
ADC_SSMUX2_MUX1
2nd Sample Input Select
4
8
ADC_SSMUX2_MUX2
3rd Sample Input Select
8
12
ADC_SSMUX2_MUX3
4th Sample Input Select
12
16
ADC0SSMUX3
ADC Sample Sequence Input Multiplexer Select 3
0xA0
read-write
n
0x0
0x0
ADC_SSMUX3_MUX0
1st Sample Input Select
0
4
ADC0SSOP0
ADC Sample Sequence 0 Operation
0x50
read-write
n
0x0
0x0
ADC_SSOP0_S0DCOP
Sample 0 Digital Comparator Operation
0
1
ADC_SSOP0_S1DCOP
Sample 1 Digital Comparator Operation
4
5
ADC_SSOP0_S2DCOP
Sample 2 Digital Comparator Operation
8
9
ADC_SSOP0_S3DCOP
Sample 3 Digital Comparator Operation
12
13
ADC_SSOP0_S4DCOP
Sample 4 Digital Comparator Operation
16
17
ADC_SSOP0_S5DCOP
Sample 5 Digital Comparator Operation
20
21
ADC_SSOP0_S6DCOP
Sample 6 Digital Comparator Operation
24
25
ADC_SSOP0_S7DCOP
Sample 7 Digital Comparator Operation
28
29
ADC0SSOP1
ADC Sample Sequence 1 Operation
0x70
read-write
n
0x0
0x0
ADC_SSOP1_S0DCOP
Sample 0 Digital Comparator Operation
0
1
ADC_SSOP1_S1DCOP
Sample 1 Digital Comparator Operation
4
5
ADC_SSOP1_S2DCOP
Sample 2 Digital Comparator Operation
8
9
ADC_SSOP1_S3DCOP
Sample 3 Digital Comparator Operation
12
13
ADC0SSOP2
ADC Sample Sequence 2 Operation
0x90
read-write
n
0x0
0x0
ADC_SSOP2_S0DCOP
Sample 0 Digital Comparator Operation
0
1
ADC_SSOP2_S1DCOP
Sample 1 Digital Comparator Operation
4
5
ADC_SSOP2_S2DCOP
Sample 2 Digital Comparator Operation
8
9
ADC_SSOP2_S3DCOP
Sample 3 Digital Comparator Operation
12
13
ADC0SSOP3
ADC Sample Sequence 3 Operation
0xB0
read-write
n
0x0
0x0
ADC_SSOP3_S0DCOP
Sample 0 Digital Comparator Operation
0
1
ADC0SSPRI
ADC Sample Sequencer Priority
0x20
read-write
n
0x0
0x0
ADC_SSPRI_SS0
SS0 Priority
0
2
ADC_SSPRI_SS1
SS1 Priority
4
6
ADC_SSPRI_SS2
SS2 Priority
8
10
ADC_SSPRI_SS3
SS3 Priority
12
14
ADC0USTAT
ADC Underflow Status
0x18
read-write
n
0x0
0x0
ADC_USTAT_UV0
SS0 FIFO Underflow
0
1
ADC_USTAT_UV1
SS1 FIFO Underflow
1
2
ADC_USTAT_UV2
SS2 FIFO Underflow
2
3
ADC_USTAT_UV3
SS3 FIFO Underflow
3
4
CC
ADC Clock Configuration
0xFC8
-1
read-write
n
0x0
0x0
ADC_CC_CS
ADC Clock Source
0
4
ADC_CC_CS_SYSPLL
PLL VCO divided by CLKDIV
0x0
ADC_CC_CS_PIOSC
PIOSC
0x1
CTL
ADC Control
0x38
-1
read-write
n
0x0
0x0
ADC_CTL_DITHER
Dither Mode Enable
6
7
ADC_CTL_VREF
Voltage Reference Select
0
1
ADC_CTL_VREF_INTERNAL
VDDA and GNDA are the voltage references
0x0
ADC_CTL_VREF_EXT_3V
The external VREFA+ and VREFA- inputs are the voltage references
0x1
DCCMP0
ADC Digital Comparator Range 0
0xE40
-1
read-write
n
0x0
0x0
ADC_DCCMP0_COMP0
Compare 0
0
12
ADC_DCCMP0_COMP1
Compare 1
16
28
DCCMP1
ADC Digital Comparator Range 1
0xE44
-1
read-write
n
0x0
0x0
ADC_DCCMP1_COMP0
Compare 0
0
12
ADC_DCCMP1_COMP1
Compare 1
16
28
DCCMP2
ADC Digital Comparator Range 2
0xE48
-1
read-write
n
0x0
0x0
ADC_DCCMP2_COMP0
Compare 0
0
12
ADC_DCCMP2_COMP1
Compare 1
16
28
DCCMP3
ADC Digital Comparator Range 3
0xE4C
-1
read-write
n
0x0
0x0
ADC_DCCMP3_COMP0
Compare 0
0
12
ADC_DCCMP3_COMP1
Compare 1
16
28
DCCMP4
ADC Digital Comparator Range 4
0xE50
-1
read-write
n
0x0
0x0
ADC_DCCMP4_COMP0
Compare 0
0
12
ADC_DCCMP4_COMP1
Compare 1
16
28
DCCMP5
ADC Digital Comparator Range 5
0xE54
-1
read-write
n
0x0
0x0
ADC_DCCMP5_COMP0
Compare 0
0
12
ADC_DCCMP5_COMP1
Compare 1
16
28
DCCMP6
ADC Digital Comparator Range 6
0xE58
-1
read-write
n
0x0
0x0
ADC_DCCMP6_COMP0
Compare 0
0
12
ADC_DCCMP6_COMP1
Compare 1
16
28
DCCMP7
ADC Digital Comparator Range 7
0xE5C
-1
read-write
n
0x0
0x0
ADC_DCCMP7_COMP0
Compare 0
0
12
ADC_DCCMP7_COMP1
Compare 1
16
28
DCCTL0
ADC Digital Comparator Control 0
0xE00
-1
read-write
n
0x0
0x0
ADC_DCCTL0_CIC
Comparison Interrupt Condition
2
4
ADC_DCCTL0_CIC_LOW
Low Band
0x0
ADC_DCCTL0_CIC_MID
Mid Band
0x1
ADC_DCCTL0_CIC_HIGH
High Band
0x3
ADC_DCCTL0_CIE
Comparison Interrupt Enable
4
5
ADC_DCCTL0_CIM
Comparison Interrupt Mode
0
2
ADC_DCCTL0_CIM_ALWAYS
Always
0x0
ADC_DCCTL0_CIM_ONCE
Once
0x1
ADC_DCCTL0_CIM_HALWAYS
Hysteresis Always
0x2
ADC_DCCTL0_CIM_HONCE
Hysteresis Once
0x3
DCCTL1
ADC Digital Comparator Control 1
0xE04
-1
read-write
n
0x0
0x0
ADC_DCCTL1_CIC
Comparison Interrupt Condition
2
4
ADC_DCCTL1_CIC_LOW
Low Band
0x0
ADC_DCCTL1_CIC_MID
Mid Band
0x1
ADC_DCCTL1_CIC_HIGH
High Band
0x3
ADC_DCCTL1_CIE
Comparison Interrupt Enable
4
5
ADC_DCCTL1_CIM
Comparison Interrupt Mode
0
2
ADC_DCCTL1_CIM_ALWAYS
Always
0x0
ADC_DCCTL1_CIM_ONCE
Once
0x1
ADC_DCCTL1_CIM_HALWAYS
Hysteresis Always
0x2
ADC_DCCTL1_CIM_HONCE
Hysteresis Once
0x3
DCCTL2
ADC Digital Comparator Control 2
0xE08
-1
read-write
n
0x0
0x0
ADC_DCCTL2_CIC
Comparison Interrupt Condition
2
4
ADC_DCCTL2_CIC_LOW
Low Band
0x0
ADC_DCCTL2_CIC_MID
Mid Band
0x1
ADC_DCCTL2_CIC_HIGH
High Band
0x3
ADC_DCCTL2_CIE
Comparison Interrupt Enable
4
5
ADC_DCCTL2_CIM
Comparison Interrupt Mode
0
2
ADC_DCCTL2_CIM_ALWAYS
Always
0x0
ADC_DCCTL2_CIM_ONCE
Once
0x1
ADC_DCCTL2_CIM_HALWAYS
Hysteresis Always
0x2
ADC_DCCTL2_CIM_HONCE
Hysteresis Once
0x3
DCCTL3
ADC Digital Comparator Control 3
0xE0C
-1
read-write
n
0x0
0x0
ADC_DCCTL3_CIC
Comparison Interrupt Condition
2
4
ADC_DCCTL3_CIC_LOW
Low Band
0x0
ADC_DCCTL3_CIC_MID
Mid Band
0x1
ADC_DCCTL3_CIC_HIGH
High Band
0x3
ADC_DCCTL3_CIE
Comparison Interrupt Enable
4
5
ADC_DCCTL3_CIM
Comparison Interrupt Mode
0
2
ADC_DCCTL3_CIM_ALWAYS
Always
0x0
ADC_DCCTL3_CIM_ONCE
Once
0x1
ADC_DCCTL3_CIM_HALWAYS
Hysteresis Always
0x2
ADC_DCCTL3_CIM_HONCE
Hysteresis Once
0x3
DCCTL4
ADC Digital Comparator Control 4
0xE10
-1
read-write
n
0x0
0x0
ADC_DCCTL4_CIC
Comparison Interrupt Condition
2
4
ADC_DCCTL4_CIC_LOW
Low Band
0x0
ADC_DCCTL4_CIC_MID
Mid Band
0x1
ADC_DCCTL4_CIC_HIGH
High Band
0x3
ADC_DCCTL4_CIE
Comparison Interrupt Enable
4
5
ADC_DCCTL4_CIM
Comparison Interrupt Mode
0
2
ADC_DCCTL4_CIM_ALWAYS
Always
0x0
ADC_DCCTL4_CIM_ONCE
Once
0x1
ADC_DCCTL4_CIM_HALWAYS
Hysteresis Always
0x2
ADC_DCCTL4_CIM_HONCE
Hysteresis Once
0x3
DCCTL5
ADC Digital Comparator Control 5
0xE14
-1
read-write
n
0x0
0x0
ADC_DCCTL5_CIC
Comparison Interrupt Condition
2
4
ADC_DCCTL5_CIC_LOW
Low Band
0x0
ADC_DCCTL5_CIC_MID
Mid Band
0x1
ADC_DCCTL5_CIC_HIGH
High Band
0x3
ADC_DCCTL5_CIE
Comparison Interrupt Enable
4
5
ADC_DCCTL5_CIM
Comparison Interrupt Mode
0
2
ADC_DCCTL5_CIM_ALWAYS
Always
0x0
ADC_DCCTL5_CIM_ONCE
Once
0x1
ADC_DCCTL5_CIM_HALWAYS
Hysteresis Always
0x2
ADC_DCCTL5_CIM_HONCE
Hysteresis Once
0x3
DCCTL6
ADC Digital Comparator Control 6
0xE18
-1
read-write
n
0x0
0x0
ADC_DCCTL6_CIC
Comparison Interrupt Condition
2
4
ADC_DCCTL6_CIC_LOW
Low Band
0x0
ADC_DCCTL6_CIC_MID
Mid Band
0x1
ADC_DCCTL6_CIC_HIGH
High Band
0x3
ADC_DCCTL6_CIE
Comparison Interrupt Enable
4
5
ADC_DCCTL6_CIM
Comparison Interrupt Mode
0
2
ADC_DCCTL6_CIM_ALWAYS
Always
0x0
ADC_DCCTL6_CIM_ONCE
Once
0x1
ADC_DCCTL6_CIM_HALWAYS
Hysteresis Always
0x2
ADC_DCCTL6_CIM_HONCE
Hysteresis Once
0x3
DCCTL7
ADC Digital Comparator Control 7
0xE1C
-1
read-write
n
0x0
0x0
ADC_DCCTL7_CIC
Comparison Interrupt Condition
2
4
ADC_DCCTL7_CIC_LOW
Low Band
0x0
ADC_DCCTL7_CIC_MID
Mid Band
0x1
ADC_DCCTL7_CIC_HIGH
High Band
0x3
ADC_DCCTL7_CIE
Comparison Interrupt Enable
4
5
ADC_DCCTL7_CIM
Comparison Interrupt Mode
0
2
ADC_DCCTL7_CIM_ALWAYS
Always
0x0
ADC_DCCTL7_CIM_ONCE
Once
0x1
ADC_DCCTL7_CIM_HALWAYS
Hysteresis Always
0x2
ADC_DCCTL7_CIM_HONCE
Hysteresis Once
0x3
DCISC
ADC Digital Comparator Interrupt Status and Clear
0x34
-1
read-write
n
0x0
0x0
ADC_DCISC_DCINT0
Digital Comparator 0 Interrupt Status and Clear
0
1
ADC_DCISC_DCINT1
Digital Comparator 1 Interrupt Status and Clear
1
2
ADC_DCISC_DCINT2
Digital Comparator 2 Interrupt Status and Clear
2
3
ADC_DCISC_DCINT3
Digital Comparator 3 Interrupt Status and Clear
3
4
ADC_DCISC_DCINT4
Digital Comparator 4 Interrupt Status and Clear
4
5
ADC_DCISC_DCINT5
Digital Comparator 5 Interrupt Status and Clear
5
6
ADC_DCISC_DCINT6
Digital Comparator 6 Interrupt Status and Clear
6
7
ADC_DCISC_DCINT7
Digital Comparator 7 Interrupt Status and Clear
7
8
DCRIC
ADC Digital Comparator Reset Initial Conditions
0xD00
-1
write-only
n
0x0
0x0
ADC_DCRIC_DCINT0
Digital Comparator Interrupt 0
0
1
write-only
ADC_DCRIC_DCINT1
Digital Comparator Interrupt 1
1
2
write-only
ADC_DCRIC_DCINT2
Digital Comparator Interrupt 2
2
3
write-only
ADC_DCRIC_DCINT3
Digital Comparator Interrupt 3
3
4
write-only
ADC_DCRIC_DCINT4
Digital Comparator Interrupt 4
4
5
write-only
ADC_DCRIC_DCINT5
Digital Comparator Interrupt 5
5
6
write-only
ADC_DCRIC_DCINT6
Digital Comparator Interrupt 6
6
7
write-only
ADC_DCRIC_DCINT7
Digital Comparator Interrupt 7
7
8
write-only
ADC_DCRIC_DCTRIG0
Digital Comparator Trigger 0
16
17
write-only
ADC_DCRIC_DCTRIG1
Digital Comparator Trigger 1
17
18
write-only
ADC_DCRIC_DCTRIG2
Digital Comparator Trigger 2
18
19
write-only
ADC_DCRIC_DCTRIG3
Digital Comparator Trigger 3
19
20
write-only
ADC_DCRIC_DCTRIG4
Digital Comparator Trigger 4
20
21
write-only
ADC_DCRIC_DCTRIG5
Digital Comparator Trigger 5
21
22
write-only
ADC_DCRIC_DCTRIG6
Digital Comparator Trigger 6
22
23
write-only
ADC_DCRIC_DCTRIG7
Digital Comparator Trigger 7
23
24
write-only
EMUX
ADC Event Multiplexer Select
0x14
-1
read-write
n
0x0
0x0
ADC_EMUX_EM0
SS0 Trigger Select
0
4
ADC_EMUX_EM0_PROCESSOR
Processor (default)
0x0
ADC_EMUX_EM0_COMP0
Analog Comparator 0
0x1
ADC_EMUX_EM0_COMP1
Analog Comparator 1
0x2
ADC_EMUX_EM0_COMP2
Analog Comparator 2
0x3
ADC_EMUX_EM0_EXTERNAL
External (GPIO Pins)
0x4
ADC_EMUX_EM0_TIMER
Timer
0x5
ADC_EMUX_EM0_ALWAYS
Always (continuously sample)
0xf
ADC_EMUX_EM1
SS1 Trigger Select
4
8
ADC_EMUX_EM1_PROCESSOR
Processor (default)
0x0
ADC_EMUX_EM1_COMP0
Analog Comparator 0
0x1
ADC_EMUX_EM1_COMP1
Analog Comparator 1
0x2
ADC_EMUX_EM1_COMP2
Analog Comparator 2
0x3
ADC_EMUX_EM1_EXTERNAL
External (GPIO Pins)
0x4
ADC_EMUX_EM1_TIMER
Timer
0x5
ADC_EMUX_EM1_ALWAYS
Always (continuously sample)
0xf
ADC_EMUX_EM2
SS2 Trigger Select
8
12
ADC_EMUX_EM2_PROCESSOR
Processor (default)
0x0
ADC_EMUX_EM2_COMP0
Analog Comparator 0
0x1
ADC_EMUX_EM2_COMP1
Analog Comparator 1
0x2
ADC_EMUX_EM2_COMP2
Analog Comparator 2
0x3
ADC_EMUX_EM2_EXTERNAL
External (GPIO Pins)
0x4
ADC_EMUX_EM2_TIMER
Timer
0x5
ADC_EMUX_EM2_ALWAYS
Always (continuously sample)
0xf
ADC_EMUX_EM3
SS3 Trigger Select
12
16
ADC_EMUX_EM3_PROCESSOR
Processor (default)
0x0
ADC_EMUX_EM3_COMP0
Analog Comparator 0
0x1
ADC_EMUX_EM3_COMP1
Analog Comparator 1
0x2
ADC_EMUX_EM3_COMP2
Analog Comparator 2
0x3
ADC_EMUX_EM3_EXTERNAL
External (GPIO Pins)
0x4
ADC_EMUX_EM3_TIMER
Timer
0x5
ADC_EMUX_EM3_ALWAYS
Always (continuously sample)
0xf
IM
ADC Interrupt Mask
0x8
-1
read-write
n
0x0
0x0
ADC_IM_DCONSS0
Digital Comparator Interrupt on SS0
16
17
ADC_IM_DCONSS1
Digital Comparator Interrupt on SS1
17
18
ADC_IM_DCONSS2
Digital Comparator Interrupt on SS2
18
19
ADC_IM_DCONSS3
Digital Comparator Interrupt on SS3
19
20
ADC_IM_MASK0
SS0 Interrupt Mask
0
1
ADC_IM_MASK1
SS1 Interrupt Mask
1
2
ADC_IM_MASK2
SS2 Interrupt Mask
2
3
ADC_IM_MASK3
SS3 Interrupt Mask
3
4
ISC
ADC Interrupt Status and Clear
0xC
-1
read-write
n
0x0
0x0
ADC_ISC_DCINSS0
Digital Comparator Interrupt Status on SS0
16
17
ADC_ISC_DCINSS1
Digital Comparator Interrupt Status on SS1
17
18
ADC_ISC_DCINSS2
Digital Comparator Interrupt Status on SS2
18
19
ADC_ISC_DCINSS3
Digital Comparator Interrupt Status on SS3
19
20
ADC_ISC_IN0
SS0 Interrupt Status and Clear
0
1
ADC_ISC_IN1
SS1 Interrupt Status and Clear
1
2
ADC_ISC_IN2
SS2 Interrupt Status and Clear
2
3
ADC_ISC_IN3
SS3 Interrupt Status and Clear
3
4
OSTAT
ADC Overflow Status
0x10
-1
read-write
n
0x0
0x0
ADC_OSTAT_OV0
SS0 FIFO Overflow
0
1
ADC_OSTAT_OV1
SS1 FIFO Overflow
1
2
ADC_OSTAT_OV2
SS2 FIFO Overflow
2
3
ADC_OSTAT_OV3
SS3 FIFO Overflow
3
4
PC
ADC Peripheral Configuration
0xFC4
-1
read-write
n
0x0
0x0
ADC_PC_SR
ADC Sample Rate
0
4
ADC_PC_SR_125K
125 ksps
0x1
ADC_PC_SR_250K
250 ksps
0x3
ADC_PC_SR_500K
500 ksps
0x5
ADC_PC_SR_1M
1 Msps
0x7
PP
ADC Peripheral Properties
0xFC0
-1
read-write
n
0x0
0x0
ADC_PP_CH
ADC Channel Count
4
10
ADC_PP_DC
Digital Comparator Count
10
16
ADC_PP_MSR
Maximum ADC Sample Rate
0
4
ADC_PP_MSR_125K
125 ksps
0x1
ADC_PP_MSR_250K
250 ksps
0x3
ADC_PP_MSR_500K
500 ksps
0x5
ADC_PP_MSR_1M
1 Msps
0x7
ADC_PP_RSL
Resolution
18
23
ADC_PP_TS
Temperature Sensor
23
24
ADC_PP_TYPE
ADC Architecture
16
18
ADC_PP_TYPE_SAR
SAR
0x0
PSSI
ADC Processor Sample Sequence Initiate
0x28
-1
read-write
n
0x0
0x0
ADC_PSSI_GSYNC
Global Synchronize
31
32
ADC_PSSI_SS0
SS0 Initiate
0
1
ADC_PSSI_SS1
SS1 Initiate
1
2
ADC_PSSI_SS2
SS2 Initiate
2
3
ADC_PSSI_SS3
SS3 Initiate
3
4
ADC_PSSI_SYNCWAIT
Synchronize Wait
27
28
RIS
ADC Raw Interrupt Status
0x4
-1
read-write
n
0x0
0x0
ADC_RIS_INR0
SS0 Raw Interrupt Status
0
1
ADC_RIS_INR1
SS1 Raw Interrupt Status
1
2
ADC_RIS_INR2
SS2 Raw Interrupt Status
2
3
ADC_RIS_INR3
SS3 Raw Interrupt Status
3
4
ADC_RIS_INRDC
Digital Comparator Raw Interrupt Status
16
17
SAC
ADC Sample Averaging Control
0x30
-1
read-write
n
0x0
0x0
ADC_SAC_AVG
Hardware Averaging Control
0
3
ADC_SAC_AVG_OFF
No hardware oversampling
0x0
ADC_SAC_AVG_2X
2x hardware oversampling
0x1
ADC_SAC_AVG_4X
4x hardware oversampling
0x2
ADC_SAC_AVG_8X
8x hardware oversampling
0x3
ADC_SAC_AVG_16X
16x hardware oversampling
0x4
ADC_SAC_AVG_32X
32x hardware oversampling
0x5
ADC_SAC_AVG_64X
64x hardware oversampling
0x6
SPC
ADC Sample Phase Control
0x24
-1
read-write
n
0x0
0x0
ADC_SPC_PHASE
Phase Difference
0
4
ADC_SPC_PHASE_0
ADC sample lags by 0.0
0x0
ADC_SPC_PHASE_22_5
ADC sample lags by 22.5
0x1
ADC_SPC_PHASE_45
ADC sample lags by 45.0
0x2
ADC_SPC_PHASE_67_5
ADC sample lags by 67.5
0x3
ADC_SPC_PHASE_90
ADC sample lags by 90.0
0x4
ADC_SPC_PHASE_112_5
ADC sample lags by 112.5
0x5
ADC_SPC_PHASE_135
ADC sample lags by 135.0
0x6
ADC_SPC_PHASE_157_5
ADC sample lags by 157.5
0x7
ADC_SPC_PHASE_180
ADC sample lags by 180.0
0x8
ADC_SPC_PHASE_202_5
ADC sample lags by 202.5
0x9
ADC_SPC_PHASE_225
ADC sample lags by 225.0
0xa
ADC_SPC_PHASE_247_5
ADC sample lags by 247.5
0xb
ADC_SPC_PHASE_270
ADC sample lags by 270.0
0xc
ADC_SPC_PHASE_292_5
ADC sample lags by 292.5
0xd
ADC_SPC_PHASE_315
ADC sample lags by 315.0
0xe
ADC_SPC_PHASE_337_5
ADC sample lags by 337.5
0xf
SSCTL0
ADC Sample Sequence Control 0
0x44
-1
read-write
n
0x0
0x0
ADC_SSCTL0_D0
1st Sample Differential Input Select
0
1
ADC_SSCTL0_D1
2nd Sample Differential Input Select
4
5
ADC_SSCTL0_D2
3rd Sample Differential Input Select
8
9
ADC_SSCTL0_D3
4th Sample Differential Input Select
12
13
ADC_SSCTL0_D4
5th Sample Differential Input Select
16
17
ADC_SSCTL0_D5
6th Sample Differential Input Select
20
21
ADC_SSCTL0_D6
7th Sample Differential Input Select
24
25
ADC_SSCTL0_D7
8th Sample Differential Input Select
28
29
ADC_SSCTL0_END0
1st Sample is End of Sequence
1
2
ADC_SSCTL0_END1
2nd Sample is End of Sequence
5
6
ADC_SSCTL0_END2
3rd Sample is End of Sequence
9
10
ADC_SSCTL0_END3
4th Sample is End of Sequence
13
14
ADC_SSCTL0_END4
5th Sample is End of Sequence
17
18
ADC_SSCTL0_END5
6th Sample is End of Sequence
21
22
ADC_SSCTL0_END6
7th Sample is End of Sequence
25
26
ADC_SSCTL0_END7
8th Sample is End of Sequence
29
30
ADC_SSCTL0_IE0
1st Sample Interrupt Enable
2
3
ADC_SSCTL0_IE1
2nd Sample Interrupt Enable
6
7
ADC_SSCTL0_IE2
3rd Sample Interrupt Enable
10
11
ADC_SSCTL0_IE3
4th Sample Interrupt Enable
14
15
ADC_SSCTL0_IE4
5th Sample Interrupt Enable
18
19
ADC_SSCTL0_IE5
6th Sample Interrupt Enable
22
23
ADC_SSCTL0_IE6
7th Sample Interrupt Enable
26
27
ADC_SSCTL0_IE7
8th Sample Interrupt Enable
30
31
ADC_SSCTL0_TS0
1st Sample Temp Sensor Select
3
4
ADC_SSCTL0_TS1
2nd Sample Temp Sensor Select
7
8
ADC_SSCTL0_TS2
3rd Sample Temp Sensor Select
11
12
ADC_SSCTL0_TS3
4th Sample Temp Sensor Select
15
16
ADC_SSCTL0_TS4
5th Sample Temp Sensor Select
19
20
ADC_SSCTL0_TS5
6th Sample Temp Sensor Select
23
24
ADC_SSCTL0_TS6
7th Sample Temp Sensor Select
27
28
ADC_SSCTL0_TS7
8th Sample Temp Sensor Select
31
32
SSCTL1
ADC Sample Sequence Control 1
0x64
-1
read-write
n
0x0
0x0
ADC_SSCTL1_D0
1st Sample Differential Input Select
0
1
ADC_SSCTL1_D1
2nd Sample Differential Input Select
4
5
ADC_SSCTL1_D2
3rd Sample Differential Input Select
8
9
ADC_SSCTL1_D3
4th Sample Differential Input Select
12
13
ADC_SSCTL1_END0
1st Sample is End of Sequence
1
2
ADC_SSCTL1_END1
2nd Sample is End of Sequence
5
6
ADC_SSCTL1_END2
3rd Sample is End of Sequence
9
10
ADC_SSCTL1_END3
4th Sample is End of Sequence
13
14
ADC_SSCTL1_IE0
1st Sample Interrupt Enable
2
3
ADC_SSCTL1_IE1
2nd Sample Interrupt Enable
6
7
ADC_SSCTL1_IE2
3rd Sample Interrupt Enable
10
11
ADC_SSCTL1_IE3
4th Sample Interrupt Enable
14
15
ADC_SSCTL1_TS0
1st Sample Temp Sensor Select
3
4
ADC_SSCTL1_TS1
2nd Sample Temp Sensor Select
7
8
ADC_SSCTL1_TS2
3rd Sample Temp Sensor Select
11
12
ADC_SSCTL1_TS3
4th Sample Temp Sensor Select
15
16
SSCTL2
ADC Sample Sequence Control 2
0x84
-1
read-write
n
0x0
0x0
ADC_SSCTL2_D0
1st Sample Differential Input Select
0
1
ADC_SSCTL2_D1
2nd Sample Differential Input Select
4
5
ADC_SSCTL2_D2
3rd Sample Differential Input Select
8
9
ADC_SSCTL2_D3
4th Sample Differential Input Select
12
13
ADC_SSCTL2_END0
1st Sample is End of Sequence
1
2
ADC_SSCTL2_END1
2nd Sample is End of Sequence
5
6
ADC_SSCTL2_END2
3rd Sample is End of Sequence
9
10
ADC_SSCTL2_END3
4th Sample is End of Sequence
13
14
ADC_SSCTL2_IE0
1st Sample Interrupt Enable
2
3
ADC_SSCTL2_IE1
2nd Sample Interrupt Enable
6
7
ADC_SSCTL2_IE2
3rd Sample Interrupt Enable
10
11
ADC_SSCTL2_IE3
4th Sample Interrupt Enable
14
15
ADC_SSCTL2_TS0
1st Sample Temp Sensor Select
3
4
ADC_SSCTL2_TS1
2nd Sample Temp Sensor Select
7
8
ADC_SSCTL2_TS2
3rd Sample Temp Sensor Select
11
12
ADC_SSCTL2_TS3
4th Sample Temp Sensor Select
15
16
SSCTL3
ADC Sample Sequence Control 3
0xA4
-1
read-write
n
0x0
0x0
ADC_SSCTL3_D0
Sample Differential Input Select
0
1
ADC_SSCTL3_END0
End of Sequence
1
2
ADC_SSCTL3_IE0
Sample Interrupt Enable
2
3
ADC_SSCTL3_TS0
1st Sample Temp Sensor Select
3
4
SSDC0
ADC Sample Sequence 0 Digital Comparator Select
0x54
-1
read-write
n
0x0
0x0
ADC_SSDC0_S0DCSEL
Sample 0 Digital Comparator Select
0
4
ADC_SSDC0_S1DCSEL
Sample 1 Digital Comparator Select
4
8
ADC_SSDC0_S2DCSEL
Sample 2 Digital Comparator Select
8
12
ADC_SSDC0_S3DCSEL
Sample 3 Digital Comparator Select
12
16
ADC_SSDC0_S4DCSEL
Sample 4 Digital Comparator Select
16
20
ADC_SSDC0_S5DCSEL
Sample 5 Digital Comparator Select
20
24
ADC_SSDC0_S6DCSEL
Sample 6 Digital Comparator Select
24
28
ADC_SSDC0_S7DCSEL
Sample 7 Digital Comparator Select
28
32
SSDC1
ADC Sample Sequence 1 Digital Comparator Select
0x74
-1
read-write
n
0x0
0x0
ADC_SSDC1_S0DCSEL
Sample 0 Digital Comparator Select
0
4
ADC_SSDC1_S1DCSEL
Sample 1 Digital Comparator Select
4
8
ADC_SSDC1_S2DCSEL
Sample 2 Digital Comparator Select
8
12
ADC_SSDC1_S3DCSEL
Sample 3 Digital Comparator Select
12
16
SSDC2
ADC Sample Sequence 2 Digital Comparator Select
0x94
-1
read-write
n
0x0
0x0
ADC_SSDC2_S0DCSEL
Sample 0 Digital Comparator Select
0
4
ADC_SSDC2_S1DCSEL
Sample 1 Digital Comparator Select
4
8
ADC_SSDC2_S2DCSEL
Sample 2 Digital Comparator Select
8
12
ADC_SSDC2_S3DCSEL
Sample 3 Digital Comparator Select
12
16
SSDC3
ADC Sample Sequence 3 Digital Comparator Select
0xB4
-1
read-write
n
0x0
0x0
ADC_SSDC3_S0DCSEL
Sample 0 Digital Comparator Select
0
4
SSEMUX0
ADC Sample Sequence Extended Input Multiplexer Select 0
0x58
-1
read-write
n
0x0
0x0
ADC_SSEMUX0_EMUX0
1st Sample Input Select (Upper Bit)
0
1
ADC_SSEMUX0_EMUX1
2th Sample Input Select (Upper Bit)
4
5
ADC_SSEMUX0_EMUX2
3rd Sample Input Select (Upper Bit)
8
9
ADC_SSEMUX0_EMUX3
4th Sample Input Select (Upper Bit)
12
13
ADC_SSEMUX0_EMUX4
5th Sample Input Select (Upper Bit)
16
17
ADC_SSEMUX0_EMUX5
6th Sample Input Select (Upper Bit)
20
21
ADC_SSEMUX0_EMUX6
7th Sample Input Select (Upper Bit)
24
25
ADC_SSEMUX0_EMUX7
8th Sample Input Select (Upper Bit)
28
29
SSEMUX1
ADC Sample Sequence Extended Input Multiplexer Select 1
0x78
-1
read-write
n
0x0
0x0
ADC_SSEMUX1_EMUX0
1st Sample Input Select (Upper Bit)
0
1
ADC_SSEMUX1_EMUX1
2th Sample Input Select (Upper Bit)
4
5
ADC_SSEMUX1_EMUX2
3rd Sample Input Select (Upper Bit)
8
9
ADC_SSEMUX1_EMUX3
4th Sample Input Select (Upper Bit)
12
13
SSEMUX2
ADC Sample Sequence Extended Input Multiplexer Select 2
0x98
-1
read-write
n
0x0
0x0
ADC_SSEMUX2_EMUX0
1st Sample Input Select (Upper Bit)
0
1
ADC_SSEMUX2_EMUX1
2th Sample Input Select (Upper Bit)
4
5
ADC_SSEMUX2_EMUX2
3rd Sample Input Select (Upper Bit)
8
9
ADC_SSEMUX2_EMUX3
4th Sample Input Select (Upper Bit)
12
13
SSEMUX3
ADC Sample Sequence Extended Input Multiplexer Select 3
0xB8
-1
read-write
n
0x0
0x0
ADC_SSEMUX3_EMUX0
1st Sample Input Select (Upper Bit)
0
1
SSFIFO0
ADC Sample Sequence Result FIFO 0
0x48
-1
read-write
n
0x0
0x0
ADC_SSFIFO0_DATA
Conversion Result Data
0
12
SSFIFO1
ADC Sample Sequence Result FIFO 1
0x68
-1
read-write
n
0x0
0x0
ADC_SSFIFO1_DATA
Conversion Result Data
0
12
SSFIFO2
ADC Sample Sequence Result FIFO 2
0x88
-1
read-write
n
0x0
0x0
ADC_SSFIFO2_DATA
Conversion Result Data
0
12
SSFIFO3
ADC Sample Sequence Result FIFO 3
0xA8
-1
read-write
n
0x0
0x0
ADC_SSFIFO3_DATA
Conversion Result Data
0
12
SSFSTAT0
ADC Sample Sequence FIFO 0 Status
0x4C
-1
read-write
n
0x0
0x0
ADC_SSFSTAT0_EMPTY
FIFO Empty
8
9
ADC_SSFSTAT0_FULL
FIFO Full
12
13
ADC_SSFSTAT0_HPTR
FIFO Head Pointer
4
8
ADC_SSFSTAT0_TPTR
FIFO Tail Pointer
0
4
SSFSTAT1
ADC Sample Sequence FIFO 1 Status
0x6C
-1
read-write
n
0x0
0x0
ADC_SSFSTAT1_EMPTY
FIFO Empty
8
9
ADC_SSFSTAT1_FULL
FIFO Full
12
13
ADC_SSFSTAT1_HPTR
FIFO Head Pointer
4
8
ADC_SSFSTAT1_TPTR
FIFO Tail Pointer
0
4
SSFSTAT2
ADC Sample Sequence FIFO 2 Status
0x8C
-1
read-write
n
0x0
0x0
ADC_SSFSTAT2_EMPTY
FIFO Empty
8
9
ADC_SSFSTAT2_FULL
FIFO Full
12
13
ADC_SSFSTAT2_HPTR
FIFO Head Pointer
4
8
ADC_SSFSTAT2_TPTR
FIFO Tail Pointer
0
4
SSFSTAT3
ADC Sample Sequence FIFO 3 Status
0xAC
-1
read-write
n
0x0
0x0
ADC_SSFSTAT3_EMPTY
FIFO Empty
8
9
ADC_SSFSTAT3_FULL
FIFO Full
12
13
ADC_SSFSTAT3_HPTR
FIFO Head Pointer
4
8
ADC_SSFSTAT3_TPTR
FIFO Tail Pointer
0
4
SSMUX0
ADC Sample Sequence Input Multiplexer Select 0
0x40
-1
read-write
n
0x0
0x0
ADC_SSMUX0_MUX0
1st Sample Input Select
0
4
ADC_SSMUX0_MUX1
2nd Sample Input Select
4
8
ADC_SSMUX0_MUX2
3rd Sample Input Select
8
12
ADC_SSMUX0_MUX3
4th Sample Input Select
12
16
ADC_SSMUX0_MUX4
5th Sample Input Select
16
20
ADC_SSMUX0_MUX5
6th Sample Input Select
20
24
ADC_SSMUX0_MUX6
7th Sample Input Select
24
28
ADC_SSMUX0_MUX7
8th Sample Input Select
28
32
SSMUX1
ADC Sample Sequence Input Multiplexer Select 1
0x60
-1
read-write
n
0x0
0x0
ADC_SSMUX1_MUX0
1st Sample Input Select
0
4
ADC_SSMUX1_MUX1
2nd Sample Input Select
4
8
ADC_SSMUX1_MUX2
3rd Sample Input Select
8
12
ADC_SSMUX1_MUX3
4th Sample Input Select
12
16
SSMUX2
ADC Sample Sequence Input Multiplexer Select 2
0x80
-1
read-write
n
0x0
0x0
ADC_SSMUX2_MUX0
1st Sample Input Select
0
4
ADC_SSMUX2_MUX1
2nd Sample Input Select
4
8
ADC_SSMUX2_MUX2
3rd Sample Input Select
8
12
ADC_SSMUX2_MUX3
4th Sample Input Select
12
16
SSMUX3
ADC Sample Sequence Input Multiplexer Select 3
0xA0
-1
read-write
n
0x0
0x0
ADC_SSMUX3_MUX0
1st Sample Input Select
0
4
SSOP0
ADC Sample Sequence 0 Operation
0x50
-1
read-write
n
0x0
0x0
ADC_SSOP0_S0DCOP
Sample 0 Digital Comparator Operation
0
1
ADC_SSOP0_S1DCOP
Sample 1 Digital Comparator Operation
4
5
ADC_SSOP0_S2DCOP
Sample 2 Digital Comparator Operation
8
9
ADC_SSOP0_S3DCOP
Sample 3 Digital Comparator Operation
12
13
ADC_SSOP0_S4DCOP
Sample 4 Digital Comparator Operation
16
17
ADC_SSOP0_S5DCOP
Sample 5 Digital Comparator Operation
20
21
ADC_SSOP0_S6DCOP
Sample 6 Digital Comparator Operation
24
25
ADC_SSOP0_S7DCOP
Sample 7 Digital Comparator Operation
28
29
SSOP1
ADC Sample Sequence 1 Operation
0x70
-1
read-write
n
0x0
0x0
ADC_SSOP1_S0DCOP
Sample 0 Digital Comparator Operation
0
1
ADC_SSOP1_S1DCOP
Sample 1 Digital Comparator Operation
4
5
ADC_SSOP1_S2DCOP
Sample 2 Digital Comparator Operation
8
9
ADC_SSOP1_S3DCOP
Sample 3 Digital Comparator Operation
12
13
SSOP2
ADC Sample Sequence 2 Operation
0x90
-1
read-write
n
0x0
0x0
ADC_SSOP2_S0DCOP
Sample 0 Digital Comparator Operation
0
1
ADC_SSOP2_S1DCOP
Sample 1 Digital Comparator Operation
4
5
ADC_SSOP2_S2DCOP
Sample 2 Digital Comparator Operation
8
9
ADC_SSOP2_S3DCOP
Sample 3 Digital Comparator Operation
12
13
SSOP3
ADC Sample Sequence 3 Operation
0xB0
-1
read-write
n
0x0
0x0
ADC_SSOP3_S0DCOP
Sample 0 Digital Comparator Operation
0
1
SSPRI
ADC Sample Sequencer Priority
0x20
-1
read-write
n
0x0
0x0
ADC_SSPRI_SS0
SS0 Priority
0
2
ADC_SSPRI_SS1
SS1 Priority
4
6
ADC_SSPRI_SS2
SS2 Priority
8
10
ADC_SSPRI_SS3
SS3 Priority
12
14
USTAT
ADC Underflow Status
0x18
-1
read-write
n
0x0
0x0
ADC_USTAT_UV0
SS0 FIFO Underflow
0
1
ADC_USTAT_UV1
SS1 FIFO Underflow
1
2
ADC_USTAT_UV2
SS2 FIFO Underflow
2
3
ADC_USTAT_UV3
SS3 FIFO Underflow
3
4
CAN0
Register map for CAN0 peripheral
CAN
0x0
0x0
0x1000
registers
n
CAN0
39
BIT
CAN Bit Timing
0xC
-1
read-write
n
0x0
0x0
CAN_BIT_BRP
Baud Rate Prescaler
0
6
CAN_BIT_SJW
(Re)Synchronization Jump Width
6
8
CAN_BIT_TSEG1
Time Segment Before Sample Point
8
12
CAN_BIT_TSEG2
Time Segment after Sample Point
12
15
BRPE
CAN Baud Rate Prescaler Extension
0x18
-1
read-write
n
0x0
0x0
CAN_BRPE_BRPE
Baud Rate Prescaler Extension
0
4
CAN0BIT
CAN Bit Timing
0xC
read-write
n
0x0
0x0
CAN_BIT_BRP
Baud Rate Prescaler
0
6
CAN_BIT_SJW
(Re)Synchronization Jump Width
6
8
CAN_BIT_TSEG1
Time Segment Before Sample Point
8
12
CAN_BIT_TSEG2
Time Segment after Sample Point
12
15
CAN0BRPE
CAN Baud Rate Prescaler Extension
0x18
read-write
n
0x0
0x0
CAN_BRPE_BRPE
Baud Rate Prescaler Extension
0
4
CAN0CTL
CAN Control
0x0
read-write
n
0x0
0x0
CAN_CTL_CCE
Configuration Change Enable
6
7
CAN_CTL_DAR
Disable Automatic-Retransmission
5
6
CAN_CTL_EIE
Error Interrupt Enable
3
4
CAN_CTL_IE
CAN Interrupt Enable
1
2
CAN_CTL_INIT
Initialization
0
1
CAN_CTL_SIE
Status Interrupt Enable
2
3
CAN_CTL_TEST
Test Mode Enable
7
8
CAN0ERR
CAN Error Counter
0x8
read-write
n
0x0
0x0
CAN_ERR_REC
Receive Error Counter
8
15
CAN_ERR_RP
Received Error Passive
15
16
CAN_ERR_TEC
Transmit Error Counter
0
8
CAN0IF1ARB1
CAN IF1 Arbitration 1
0x30
read-write
n
0x0
0x0
CAN_IF1ARB1_ID
Message Identifier
0
16
CAN0IF1ARB2
CAN IF1 Arbitration 2
0x34
read-write
n
0x0
0x0
CAN_IF1ARB2_DIR
Message Direction
13
14
CAN_IF1ARB2_ID
Message Identifier
0
13
CAN_IF1ARB2_MSGVAL
Message Valid
15
16
CAN_IF1ARB2_XTD
Extended Identifier
14
15
CAN0IF1CMSK
CAN IF1 Command Mask
0x24
read-write
n
0x0
0x0
CAN_IF1CMSK_ARB
Access Arbitration Bits
5
6
CAN_IF1CMSK_CLRINTPND
Clear Interrupt Pending Bit
3
4
CAN_IF1CMSK_CONTROL
Access Control Bits
4
5
CAN_IF1CMSK_DATAA
Access Data Byte 0 to 3
1
2
CAN_IF1CMSK_DATAB
Access Data Byte 4 to 7
0
1
CAN_IF1CMSK_MASK
Access Mask Bits
6
7
CAN_IF1CMSK_NEWDAT
Access New Data
2
3
CAN_IF1CMSK_WRNRD
Write, Not Read
7
8
CAN0IF1CRQ
CAN IF1 Command Request
0x20
read-write
n
0x0
0x0
CAN_IF1CRQ_BUSY
Busy Flag
15
16
CAN_IF1CRQ_MNUM
Message Number
0
6
CAN0IF1DA1
CAN IF1 Data A1
0x3C
read-write
n
0x0
0x0
CAN_IF1DA1_DATA
Data
0
16
CAN0IF1DA2
CAN IF1 Data A2
0x40
read-write
n
0x0
0x0
CAN_IF1DA2_DATA
Data
0
16
CAN0IF1DB1
CAN IF1 Data B1
0x44
read-write
n
0x0
0x0
CAN_IF1DB1_DATA
Data
0
16
CAN0IF1DB2
CAN IF1 Data B2
0x48
read-write
n
0x0
0x0
CAN_IF1DB2_DATA
Data
0
16
CAN0IF1MCTL
CAN IF1 Message Control
0x38
read-write
n
0x0
0x0
CAN_IF1MCTL_DLC
Data Length Code
0
4
CAN_IF1MCTL_EOB
End of Buffer
7
8
CAN_IF1MCTL_INTPND
Interrupt Pending
13
14
CAN_IF1MCTL_MSGLST
Message Lost
14
15
CAN_IF1MCTL_NEWDAT
New Data
15
16
CAN_IF1MCTL_RMTEN
Remote Enable
9
10
CAN_IF1MCTL_RXIE
Receive Interrupt Enable
10
11
CAN_IF1MCTL_TXIE
Transmit Interrupt Enable
11
12
CAN_IF1MCTL_TXRQST
Transmit Request
8
9
CAN_IF1MCTL_UMASK
Use Acceptance Mask
12
13
CAN0IF1MSK1
CAN IF1 Mask 1
0x28
read-write
n
0x0
0x0
CAN_IF1MSK1_IDMSK
Identifier Mask
0
16
CAN0IF1MSK2
CAN IF1 Mask 2
0x2C
read-write
n
0x0
0x0
CAN_IF1MSK2_IDMSK
Identifier Mask
0
13
CAN_IF1MSK2_MDIR
Mask Message Direction
14
15
CAN_IF1MSK2_MXTD
Mask Extended Identifier
15
16
CAN0IF2ARB1
CAN IF2 Arbitration 1
0x90
read-write
n
0x0
0x0
CAN_IF2ARB1_ID
Message Identifier
0
16
CAN0IF2ARB2
CAN IF2 Arbitration 2
0x94
read-write
n
0x0
0x0
CAN_IF2ARB2_DIR
Message Direction
13
14
CAN_IF2ARB2_ID
Message Identifier
0
13
CAN_IF2ARB2_MSGVAL
Message Valid
15
16
CAN_IF2ARB2_XTD
Extended Identifier
14
15
CAN0IF2CMSK
CAN IF2 Command Mask
0x84
read-write
n
0x0
0x0
CAN_IF2CMSK_ARB
Access Arbitration Bits
5
6
CAN_IF2CMSK_CLRINTPND
Clear Interrupt Pending Bit
3
4
CAN_IF2CMSK_CONTROL
Access Control Bits
4
5
CAN_IF2CMSK_DATAA
Access Data Byte 0 to 3
1
2
CAN_IF2CMSK_DATAB
Access Data Byte 4 to 7
0
1
CAN_IF2CMSK_MASK
Access Mask Bits
6
7
CAN_IF2CMSK_NEWDAT
Access New Data
2
3
CAN_IF2CMSK_WRNRD
Write, Not Read
7
8
CAN0IF2CRQ
CAN IF2 Command Request
0x80
read-write
n
0x0
0x0
CAN_IF2CRQ_BUSY
Busy Flag
15
16
CAN_IF2CRQ_MNUM
Message Number
0
6
CAN0IF2DA1
CAN IF2 Data A1
0x9C
read-write
n
0x0
0x0
CAN_IF2DA1_DATA
Data
0
16
CAN0IF2DA2
CAN IF2 Data A2
0xA0
read-write
n
0x0
0x0
CAN_IF2DA2_DATA
Data
0
16
CAN0IF2DB1
CAN IF2 Data B1
0xA4
read-write
n
0x0
0x0
CAN_IF2DB1_DATA
Data
0
16
CAN0IF2DB2
CAN IF2 Data B2
0xA8
read-write
n
0x0
0x0
CAN_IF2DB2_DATA
Data
0
16
CAN0IF2MCTL
CAN IF2 Message Control
0x98
read-write
n
0x0
0x0
CAN_IF2MCTL_DLC
Data Length Code
0
4
CAN_IF2MCTL_EOB
End of Buffer
7
8
CAN_IF2MCTL_INTPND
Interrupt Pending
13
14
CAN_IF2MCTL_MSGLST
Message Lost
14
15
CAN_IF2MCTL_NEWDAT
New Data
15
16
CAN_IF2MCTL_RMTEN
Remote Enable
9
10
CAN_IF2MCTL_RXIE
Receive Interrupt Enable
10
11
CAN_IF2MCTL_TXIE
Transmit Interrupt Enable
11
12
CAN_IF2MCTL_TXRQST
Transmit Request
8
9
CAN_IF2MCTL_UMASK
Use Acceptance Mask
12
13
CAN0IF2MSK1
CAN IF2 Mask 1
0x88
read-write
n
0x0
0x0
CAN_IF2MSK1_IDMSK
Identifier Mask
0
16
CAN0IF2MSK2
CAN IF2 Mask 2
0x8C
read-write
n
0x0
0x0
CAN_IF2MSK2_IDMSK
Identifier Mask
0
13
CAN_IF2MSK2_MDIR
Mask Message Direction
14
15
CAN_IF2MSK2_MXTD
Mask Extended Identifier
15
16
CAN0INT
CAN Interrupt
0x10
read-write
n
0x0
0x0
CAN_INT_INTID
Interrupt Identifier
0
16
CAN_INT_INTID_NONE
No interrupt pending
0x0
CAN_INT_INTID_STATUS
Status Interrupt
0x8000
CAN0MSG1INT
CAN Message 1 Interrupt Pending
0x140
read-write
n
0x0
0x0
CAN_MSG1INT_INTPND
Interrupt Pending Bits
0
16
CAN0MSG1VAL
CAN Message 1 Valid
0x160
read-write
n
0x0
0x0
CAN_MSG1VAL_MSGVAL
Message Valid Bits
0
16
CAN0MSG2INT
CAN Message 2 Interrupt Pending
0x144
read-write
n
0x0
0x0
CAN_MSG2INT_INTPND
Interrupt Pending Bits
0
16
CAN0MSG2VAL
CAN Message 2 Valid
0x164
read-write
n
0x0
0x0
CAN_MSG2VAL_MSGVAL
Message Valid Bits
0
16
CAN0NWDA1
CAN New Data 1
0x120
read-write
n
0x0
0x0
CAN_NWDA1_NEWDAT
New Data Bits
0
16
CAN0NWDA2
CAN New Data 2
0x124
read-write
n
0x0
0x0
CAN_NWDA2_NEWDAT
New Data Bits
0
16
CAN0STS
CAN Status
0x4
read-write
n
0x0
0x0
CAN_STS_BOFF
Bus-Off Status
7
8
CAN_STS_EPASS
Error Passive
5
6
CAN_STS_EWARN
Warning Status
6
7
CAN_STS_LEC
Last Error Code
0
3
CAN_STS_LEC_NONE
No Error
0x0
CAN_STS_LEC_STUFF
Stuff Error
0x1
CAN_STS_LEC_FORM
Format Error
0x2
CAN_STS_LEC_ACK
ACK Error
0x3
CAN_STS_LEC_BIT1
Bit 1 Error
0x4
CAN_STS_LEC_BIT0
Bit 0 Error
0x5
CAN_STS_LEC_CRC
CRC Error
0x6
CAN_STS_LEC_NOEVENT
No Event
0x7
CAN_STS_RXOK
Received a Message Successfully
4
5
CAN_STS_TXOK
Transmitted a Message Successfully
3
4
CAN0TST
CAN Test
0x14
read-write
n
0x0
0x0
CAN_TST_BASIC
Basic Mode
2
3
CAN_TST_LBACK
Loopback Mode
4
5
CAN_TST_RX
Receive Observation
7
8
CAN_TST_SILENT
Silent Mode
3
4
CAN_TST_TX
Transmit Control
5
7
CAN_TST_TX_CANCTL
CAN Module Control
0x0
CAN_TST_TX_SAMPLE
Sample Point
0x1
CAN_TST_TX_DOMINANT
Driven Low
0x2
CAN_TST_TX_RECESSIVE
Driven High
0x3
CAN0TXRQ1
CAN Transmission Request 1
0x100
read-write
n
0x0
0x0
CAN_TXRQ1_TXRQST
Transmission Request Bits
0
16
CAN0TXRQ2
CAN Transmission Request 2
0x104
read-write
n
0x0
0x0
CAN_TXRQ2_TXRQST
Transmission Request Bits
0
16
CTL
CAN Control
0x0
-1
read-write
n
0x0
0x0
CAN_CTL_CCE
Configuration Change Enable
6
7
CAN_CTL_DAR
Disable Automatic-Retransmission
5
6
CAN_CTL_EIE
Error Interrupt Enable
3
4
CAN_CTL_IE
CAN Interrupt Enable
1
2
CAN_CTL_INIT
Initialization
0
1
CAN_CTL_SIE
Status Interrupt Enable
2
3
CAN_CTL_TEST
Test Mode Enable
7
8
ERR
CAN Error Counter
0x8
-1
read-write
n
0x0
0x0
CAN_ERR_REC
Receive Error Counter
8
15
CAN_ERR_RP
Received Error Passive
15
16
CAN_ERR_TEC
Transmit Error Counter
0
8
IF1ARB1
CAN IF1 Arbitration 1
0x30
-1
read-write
n
0x0
0x0
CAN_IF1ARB1_ID
Message Identifier
0
16
IF1ARB2
CAN IF1 Arbitration 2
0x34
-1
read-write
n
0x0
0x0
CAN_IF1ARB2_DIR
Message Direction
13
14
CAN_IF1ARB2_ID
Message Identifier
0
13
CAN_IF1ARB2_MSGVAL
Message Valid
15
16
CAN_IF1ARB2_XTD
Extended Identifier
14
15
IF1CMSK
CAN IF1 Command Mask
0x24
-1
read-write
n
0x0
0x0
CAN_IF1CMSK_ARB
Access Arbitration Bits
5
6
CAN_IF1CMSK_CLRINTPND
Clear Interrupt Pending Bit
3
4
CAN_IF1CMSK_CONTROL
Access Control Bits
4
5
CAN_IF1CMSK_DATAA
Access Data Byte 0 to 3
1
2
CAN_IF1CMSK_DATAB
Access Data Byte 4 to 7
0
1
CAN_IF1CMSK_MASK
Access Mask Bits
6
7
CAN_IF1CMSK_NEWDAT
Access New Data
2
3
CAN_IF1CMSK_TXRQST
Access Transmission Request
2
3
CAN_IF1CMSK_WRNRD
Write, Not Read
7
8
IF1CRQ
CAN IF1 Command Request
0x20
-1
read-write
n
0x0
0x0
CAN_IF1CRQ_BUSY
Busy Flag
15
16
CAN_IF1CRQ_MNUM
Message Number
0
6
IF1DA1
CAN IF1 Data A1
0x3C
-1
read-write
n
0x0
0x0
CAN_IF1DA1_DATA
Data
0
16
IF1DA2
CAN IF1 Data A2
0x40
-1
read-write
n
0x0
0x0
CAN_IF1DA2_DATA
Data
0
16
IF1DB1
CAN IF1 Data B1
0x44
-1
read-write
n
0x0
0x0
CAN_IF1DB1_DATA
Data
0
16
IF1DB2
CAN IF1 Data B2
0x48
-1
read-write
n
0x0
0x0
CAN_IF1DB2_DATA
Data
0
16
IF1MCTL
CAN IF1 Message Control
0x38
-1
read-write
n
0x0
0x0
CAN_IF1MCTL_DLC
Data Length Code
0
4
CAN_IF1MCTL_EOB
End of Buffer
7
8
CAN_IF1MCTL_INTPND
Interrupt Pending
13
14
CAN_IF1MCTL_MSGLST
Message Lost
14
15
CAN_IF1MCTL_NEWDAT
New Data
15
16
CAN_IF1MCTL_RMTEN
Remote Enable
9
10
CAN_IF1MCTL_RXIE
Receive Interrupt Enable
10
11
CAN_IF1MCTL_TXIE
Transmit Interrupt Enable
11
12
CAN_IF1MCTL_TXRQST
Transmit Request
8
9
CAN_IF1MCTL_UMASK
Use Acceptance Mask
12
13
IF1MSK1
CAN IF1 Mask 1
0x28
-1
read-write
n
0x0
0x0
CAN_IF1MSK1_IDMSK
Identifier Mask
0
16
IF1MSK2
CAN IF1 Mask 2
0x2C
-1
read-write
n
0x0
0x0
CAN_IF1MSK2_IDMSK
Identifier Mask
0
13
CAN_IF1MSK2_MDIR
Mask Message Direction
14
15
CAN_IF1MSK2_MXTD
Mask Extended Identifier
15
16
IF2ARB1
CAN IF2 Arbitration 1
0x90
-1
read-write
n
0x0
0x0
CAN_IF2ARB1_ID
Message Identifier
0
16
IF2ARB2
CAN IF2 Arbitration 2
0x94
-1
read-write
n
0x0
0x0
CAN_IF2ARB2_DIR
Message Direction
13
14
CAN_IF2ARB2_ID
Message Identifier
0
13
CAN_IF2ARB2_MSGVAL
Message Valid
15
16
CAN_IF2ARB2_XTD
Extended Identifier
14
15
IF2CMSK
CAN IF2 Command Mask
0x84
-1
read-write
n
0x0
0x0
CAN_IF2CMSK_ARB
Access Arbitration Bits
5
6
CAN_IF2CMSK_CLRINTPND
Clear Interrupt Pending Bit
3
4
CAN_IF2CMSK_CONTROL
Access Control Bits
4
5
CAN_IF2CMSK_DATAA
Access Data Byte 0 to 3
1
2
CAN_IF2CMSK_DATAB
Access Data Byte 4 to 7
0
1
CAN_IF2CMSK_MASK
Access Mask Bits
6
7
CAN_IF2CMSK_NEWDAT
Access New Data
2
3
CAN_IF2CMSK_TXRQST
Access Transmission Request
2
3
CAN_IF2CMSK_WRNRD
Write, Not Read
7
8
IF2CRQ
CAN IF2 Command Request
0x80
-1
read-write
n
0x0
0x0
CAN_IF2CRQ_BUSY
Busy Flag
15
16
CAN_IF2CRQ_MNUM
Message Number
0
6
IF2DA1
CAN IF2 Data A1
0x9C
-1
read-write
n
0x0
0x0
CAN_IF2DA1_DATA
Data
0
16
IF2DA2
CAN IF2 Data A2
0xA0
-1
read-write
n
0x0
0x0
CAN_IF2DA2_DATA
Data
0
16
IF2DB1
CAN IF2 Data B1
0xA4
-1
read-write
n
0x0
0x0
CAN_IF2DB1_DATA
Data
0
16
IF2DB2
CAN IF2 Data B2
0xA8
-1
read-write
n
0x0
0x0
CAN_IF2DB2_DATA
Data
0
16
IF2MCTL
CAN IF2 Message Control
0x98
-1
read-write
n
0x0
0x0
CAN_IF2MCTL_DLC
Data Length Code
0
4
CAN_IF2MCTL_EOB
End of Buffer
7
8
CAN_IF2MCTL_INTPND
Interrupt Pending
13
14
CAN_IF2MCTL_MSGLST
Message Lost
14
15
CAN_IF2MCTL_NEWDAT
New Data
15
16
CAN_IF2MCTL_RMTEN
Remote Enable
9
10
CAN_IF2MCTL_RXIE
Receive Interrupt Enable
10
11
CAN_IF2MCTL_TXIE
Transmit Interrupt Enable
11
12
CAN_IF2MCTL_TXRQST
Transmit Request
8
9
CAN_IF2MCTL_UMASK
Use Acceptance Mask
12
13
IF2MSK1
CAN IF2 Mask 1
0x88
-1
read-write
n
0x0
0x0
CAN_IF2MSK1_IDMSK
Identifier Mask
0
16
IF2MSK2
CAN IF2 Mask 2
0x8C
-1
read-write
n
0x0
0x0
CAN_IF2MSK2_IDMSK
Identifier Mask
0
13
CAN_IF2MSK2_MDIR
Mask Message Direction
14
15
CAN_IF2MSK2_MXTD
Mask Extended Identifier
15
16
INT
CAN Interrupt
0x10
-1
read-write
n
0x0
0x0
CAN_INT_INTID
Interrupt Identifier
0
16
CAN_INT_INTID_NONE
No interrupt pending
0x0
CAN_INT_INTID_STATUS
Status Interrupt
0x8000
MSG1INT
CAN Message 1 Interrupt Pending
0x140
-1
read-write
n
0x0
0x0
CAN_MSG1INT_INTPND
Interrupt Pending Bits
0
16
MSG1VAL
CAN Message 1 Valid
0x160
-1
read-write
n
0x0
0x0
CAN_MSG1VAL_MSGVAL
Message Valid Bits
0
16
MSG2INT
CAN Message 2 Interrupt Pending
0x144
-1
read-write
n
0x0
0x0
CAN_MSG2INT_INTPND
Interrupt Pending Bits
0
16
MSG2VAL
CAN Message 2 Valid
0x164
-1
read-write
n
0x0
0x0
CAN_MSG2VAL_MSGVAL
Message Valid Bits
0
16
NWDA1
CAN New Data 1
0x120
-1
read-write
n
0x0
0x0
CAN_NWDA1_NEWDAT
New Data Bits
0
16
NWDA2
CAN New Data 2
0x124
-1
read-write
n
0x0
0x0
CAN_NWDA2_NEWDAT
New Data Bits
0
16
STS
CAN Status
0x4
-1
read-write
n
0x0
0x0
CAN_STS_BOFF
Bus-Off Status
7
8
CAN_STS_EPASS
Error Passive
5
6
CAN_STS_EWARN
Warning Status
6
7
CAN_STS_LEC
Last Error Code
0
3
CAN_STS_LEC_NONE
No Error
0x0
CAN_STS_LEC_STUFF
Stuff Error
0x1
CAN_STS_LEC_FORM
Format Error
0x2
CAN_STS_LEC_ACK
ACK Error
0x3
CAN_STS_LEC_BIT1
Bit 1 Error
0x4
CAN_STS_LEC_BIT0
Bit 0 Error
0x5
CAN_STS_LEC_CRC
CRC Error
0x6
CAN_STS_LEC_NOEVENT
No Event
0x7
CAN_STS_RXOK
Received a Message Successfully
4
5
CAN_STS_TXOK
Transmitted a Message Successfully
3
4
TST
CAN Test
0x14
-1
read-write
n
0x0
0x0
CAN_TST_BASIC
Basic Mode
2
3
CAN_TST_LBACK
Loopback Mode
4
5
CAN_TST_RX
Receive Observation
7
8
CAN_TST_SILENT
Silent Mode
3
4
CAN_TST_TX
Transmit Control
5
7
CAN_TST_TX_CANCTL
CAN Module Control
0x0
CAN_TST_TX_SAMPLE
Sample Point
0x1
CAN_TST_TX_DOMINANT
Driven Low
0x2
CAN_TST_TX_RECESSIVE
Driven High
0x3
TXRQ1
CAN Transmission Request 1
0x100
-1
read-write
n
0x0
0x0
CAN_TXRQ1_TXRQST
Transmission Request Bits
0
16
TXRQ2
CAN Transmission Request 2
0x104
-1
read-write
n
0x0
0x0
CAN_TXRQ2_TXRQST
Transmission Request Bits
0
16
COMP
Register map for COMP peripheral
COMP
0x0
0x0
0x1000
registers
n
COMP0
25
COMP1
26
COMP2
27
ACCTL0
Analog Comparator Control 0
0x24
-1
read-write
n
0x0
0x0
COMP_ACCTL0_ASRCP
Analog Source Positive
9
11
COMP_ACCTL0_ASRCP_PIN
Pin value of Cn+
0x0
COMP_ACCTL0_ASRCP_PIN0
Pin value of C0+
0x1
COMP_ACCTL0_ASRCP_REF
Internal voltage reference
0x2
COMP_ACCTL0_CINV
Comparator Output Invert
1
2
COMP_ACCTL0_ISEN
Interrupt Sense
2
4
COMP_ACCTL0_ISEN_LEVEL
Level sense, see ISLVAL
0x0
COMP_ACCTL0_ISEN_FALL
Falling edge
0x1
COMP_ACCTL0_ISEN_RISE
Rising edge
0x2
COMP_ACCTL0_ISEN_BOTH
Either edge
0x3
COMP_ACCTL0_ISLVAL
Interrupt Sense Level Value
4
5
COMP_ACCTL0_TOEN
Trigger Output Enable
11
12
COMP_ACCTL0_TSEN
Trigger Sense
5
7
COMP_ACCTL0_TSEN_LEVEL
Level sense, see TSLVAL
0x0
COMP_ACCTL0_TSEN_FALL
Falling edge
0x1
COMP_ACCTL0_TSEN_RISE
Rising edge
0x2
COMP_ACCTL0_TSEN_BOTH
Either edge
0x3
COMP_ACCTL0_TSLVAL
Trigger Sense Level Value
7
8
ACCTL1
Analog Comparator Control 1
0x44
-1
read-write
n
0x0
0x0
COMP_ACCTL1_ASRCP
Analog Source Positive
9
11
COMP_ACCTL1_ASRCP_PIN
Pin value of Cn+
0x0
COMP_ACCTL1_ASRCP_PIN0
Pin value of C0+
0x1
COMP_ACCTL1_ASRCP_REF
Internal voltage reference
0x2
COMP_ACCTL1_CINV
Comparator Output Invert
1
2
COMP_ACCTL1_ISEN
Interrupt Sense
2
4
COMP_ACCTL1_ISEN_LEVEL
Level sense, see ISLVAL
0x0
COMP_ACCTL1_ISEN_FALL
Falling edge
0x1
COMP_ACCTL1_ISEN_RISE
Rising edge
0x2
COMP_ACCTL1_ISEN_BOTH
Either edge
0x3
COMP_ACCTL1_ISLVAL
Interrupt Sense Level Value
4
5
COMP_ACCTL1_TOEN
Trigger Output Enable
11
12
COMP_ACCTL1_TSEN
Trigger Sense
5
7
COMP_ACCTL1_TSEN_LEVEL
Level sense, see TSLVAL
0x0
COMP_ACCTL1_TSEN_FALL
Falling edge
0x1
COMP_ACCTL1_TSEN_RISE
Rising edge
0x2
COMP_ACCTL1_TSEN_BOTH
Either edge
0x3
COMP_ACCTL1_TSLVAL
Trigger Sense Level Value
7
8
ACCTL2
Analog Comparator Control 2
0x64
-1
read-write
n
0x0
0x0
COMP_ACCTL2_ASRCP
Analog Source Positive
9
11
COMP_ACCTL2_ASRCP_PIN
Pin value of Cn+
0x0
COMP_ACCTL2_ASRCP_PIN0
Pin value of C0+
0x1
COMP_ACCTL2_ASRCP_REF
Internal voltage reference
0x2
COMP_ACCTL2_CINV
Comparator Output Invert
1
2
COMP_ACCTL2_ISEN
Interrupt Sense
2
4
COMP_ACCTL2_ISEN_LEVEL
Level sense, see ISLVAL
0x0
COMP_ACCTL2_ISEN_FALL
Falling edge
0x1
COMP_ACCTL2_ISEN_RISE
Rising edge
0x2
COMP_ACCTL2_ISEN_BOTH
Either edge
0x3
COMP_ACCTL2_ISLVAL
Interrupt Sense Level Value
4
5
COMP_ACCTL2_TOEN
Trigger Output Enable
11
12
COMP_ACCTL2_TSEN
Trigger Sense
5
7
COMP_ACCTL2_TSEN_LEVEL
Level sense, see TSLVAL
0x0
COMP_ACCTL2_TSEN_FALL
Falling edge
0x1
COMP_ACCTL2_TSEN_RISE
Rising edge
0x2
COMP_ACCTL2_TSEN_BOTH
Either edge
0x3
COMP_ACCTL2_TSLVAL
Trigger Sense Level Value
7
8
ACINTEN
Analog Comparator Interrupt Enable
0x8
-1
read-write
n
0x0
0x0
COMP_ACINTEN_IN0
Comparator 0 Interrupt Enable
0
1
COMP_ACINTEN_IN1
Comparator 1 Interrupt Enable
1
2
COMP_ACINTEN_IN2
Comparator 2 Interrupt Enable
2
3
ACMIS
Analog Comparator Masked Interrupt Status
0x0
-1
read-write
n
0x0
0x0
COMP_ACMIS_IN0
Comparator 0 Masked Interrupt Status
0
1
COMP_ACMIS_IN1
Comparator 1 Masked Interrupt Status
1
2
COMP_ACMIS_IN2
Comparator 2 Masked Interrupt Status
2
3
ACREFCTL
Analog Comparator Reference Voltage Control
0x10
-1
read-write
n
0x0
0x0
COMP_ACREFCTL_EN
Resistor Ladder Enable
9
10
COMP_ACREFCTL_RNG
Resistor Ladder Range
8
9
COMP_ACREFCTL_VREF
Resistor Ladder Voltage Ref
0
4
ACRIS
Analog Comparator Raw Interrupt Status
0x4
-1
read-write
n
0x0
0x0
COMP_ACRIS_IN0
Comparator 0 Interrupt Status
0
1
COMP_ACRIS_IN1
Comparator 1 Interrupt Status
1
2
COMP_ACRIS_IN2
Comparator 2 Interrupt Status
2
3
ACSTAT0
Analog Comparator Status 0
0x20
-1
read-write
n
0x0
0x0
COMP_ACSTAT0_OVAL
Comparator Output Value
1
2
ACSTAT1
Analog Comparator Status 1
0x40
-1
read-write
n
0x0
0x0
COMP_ACSTAT1_OVAL
Comparator Output Value
1
2
ACSTAT2
Analog Comparator Status 2
0x60
-1
read-write
n
0x0
0x0
COMP_ACSTAT2_OVAL
Comparator Output Value
1
2
COMPACCTL0
Analog Comparator Control 0
0x24
read-write
n
0x0
0x0
COMP_ACCTL0_ASRCP
Analog Source Positive
9
11
COMP_ACCTL0_ASRCP_PIN
Pin value of Cn+
0x0
COMP_ACCTL0_ASRCP_PIN0
Pin value of C0+
0x1
COMP_ACCTL0_ASRCP_REF
Internal voltage reference
0x2
COMP_ACCTL0_CINV
Comparator Output Invert
1
2
COMP_ACCTL0_ISEN
Interrupt Sense
2
4
COMP_ACCTL0_ISEN_LEVEL
Level sense, see ISLVAL
0x0
COMP_ACCTL0_ISEN_FALL
Falling edge
0x1
COMP_ACCTL0_ISEN_RISE
Rising edge
0x2
COMP_ACCTL0_ISEN_BOTH
Either edge
0x3
COMP_ACCTL0_ISLVAL
Interrupt Sense Level Value
4
5
COMP_ACCTL0_TOEN
Trigger Output Enable
11
12
COMP_ACCTL0_TSEN
Trigger Sense
5
7
COMP_ACCTL0_TSEN_LEVEL
Level sense, see TSLVAL
0x0
COMP_ACCTL0_TSEN_FALL
Falling edge
0x1
COMP_ACCTL0_TSEN_RISE
Rising edge
0x2
COMP_ACCTL0_TSEN_BOTH
Either edge
0x3
COMP_ACCTL0_TSLVAL
Trigger Sense Level Value
7
8
COMPACCTL1
Analog Comparator Control 1
0x44
read-write
n
0x0
0x0
COMP_ACCTL1_ASRCP
Analog Source Positive
9
11
COMP_ACCTL1_ASRCP_PIN
Pin value of Cn+
0x0
COMP_ACCTL1_ASRCP_PIN0
Pin value of C0+
0x1
COMP_ACCTL1_ASRCP_REF
Internal voltage reference
0x2
COMP_ACCTL1_CINV
Comparator Output Invert
1
2
COMP_ACCTL1_ISEN
Interrupt Sense
2
4
COMP_ACCTL1_ISEN_LEVEL
Level sense, see ISLVAL
0x0
COMP_ACCTL1_ISEN_FALL
Falling edge
0x1
COMP_ACCTL1_ISEN_RISE
Rising edge
0x2
COMP_ACCTL1_ISEN_BOTH
Either edge
0x3
COMP_ACCTL1_ISLVAL
Interrupt Sense Level Value
4
5
COMP_ACCTL1_TOEN
Trigger Output Enable
11
12
COMP_ACCTL1_TSEN
Trigger Sense
5
7
COMP_ACCTL1_TSEN_LEVEL
Level sense, see TSLVAL
0x0
COMP_ACCTL1_TSEN_FALL
Falling edge
0x1
COMP_ACCTL1_TSEN_RISE
Rising edge
0x2
COMP_ACCTL1_TSEN_BOTH
Either edge
0x3
COMP_ACCTL1_TSLVAL
Trigger Sense Level Value
7
8
COMPACCTL2
Analog Comparator Control 2
0x64
read-write
n
0x0
0x0
COMP_ACCTL2_ASRCP
Analog Source Positive
9
11
COMP_ACCTL2_ASRCP_PIN
Pin value of Cn+
0x0
COMP_ACCTL2_ASRCP_PIN0
Pin value of C0+
0x1
COMP_ACCTL2_ASRCP_REF
Internal voltage reference
0x2
COMP_ACCTL2_CINV
Comparator Output Invert
1
2
COMP_ACCTL2_ISEN
Interrupt Sense
2
4
COMP_ACCTL2_ISEN_LEVEL
Level sense, see ISLVAL
0x0
COMP_ACCTL2_ISEN_FALL
Falling edge
0x1
COMP_ACCTL2_ISEN_RISE
Rising edge
0x2
COMP_ACCTL2_ISEN_BOTH
Either edge
0x3
COMP_ACCTL2_ISLVAL
Interrupt Sense Level Value
4
5
COMP_ACCTL2_TOEN
Trigger Output Enable
11
12
COMP_ACCTL2_TSEN
Trigger Sense
5
7
COMP_ACCTL2_TSEN_LEVEL
Level sense, see TSLVAL
0x0
COMP_ACCTL2_TSEN_FALL
Falling edge
0x1
COMP_ACCTL2_TSEN_RISE
Rising edge
0x2
COMP_ACCTL2_TSEN_BOTH
Either edge
0x3
COMP_ACCTL2_TSLVAL
Trigger Sense Level Value
7
8
COMPACINTEN
Analog Comparator Interrupt Enable
0x8
read-write
n
0x0
0x0
COMP_ACINTEN_IN0
Comparator 0 Interrupt Enable
0
1
COMP_ACINTEN_IN1
Comparator 1 Interrupt Enable
1
2
COMP_ACINTEN_IN2
Comparator 2 Interrupt Enable
2
3
COMPACMIS
Analog Comparator Masked Interrupt Status
0x0
read-write
n
0x0
0x0
COMP_ACMIS_IN0
Comparator 0 Masked Interrupt Status
0
1
COMP_ACMIS_IN1
Comparator 1 Masked Interrupt Status
1
2
COMP_ACMIS_IN2
Comparator 2 Masked Interrupt Status
2
3
COMPACREFCTL
Analog Comparator Reference Voltage Control
0x10
read-write
n
0x0
0x0
COMP_ACREFCTL_EN
Resistor Ladder Enable
9
10
COMP_ACREFCTL_RNG
Resistor Ladder Range
8
9
COMP_ACREFCTL_VREF
Resistor Ladder Voltage Ref
0
4
COMPACRIS
Analog Comparator Raw Interrupt Status
0x4
read-write
n
0x0
0x0
COMP_ACRIS_IN0
Comparator 0 Interrupt Status
0
1
COMP_ACRIS_IN1
Comparator 1 Interrupt Status
1
2
COMP_ACRIS_IN2
Comparator 2 Interrupt Status
2
3
COMPACSTAT0
Analog Comparator Status 0
0x20
read-write
n
0x0
0x0
COMP_ACSTAT0_OVAL
Comparator Output Value
1
2
COMPACSTAT1
Analog Comparator Status 1
0x40
read-write
n
0x0
0x0
COMP_ACSTAT1_OVAL
Comparator Output Value
1
2
COMPACSTAT2
Analog Comparator Status 2
0x60
read-write
n
0x0
0x0
COMP_ACSTAT2_OVAL
Comparator Output Value
1
2
COMPPP
Analog Comparator Peripheral Properties
0xFC0
read-write
n
0x0
0x0
COMP_PP_C0O
Comparator Output 0 Present
16
17
COMP_PP_C1O
Comparator Output 1 Present
17
18
COMP_PP_C2O
Comparator Output 2 Present
18
19
COMP_PP_CMP0
Comparator 0 Present
0
1
COMP_PP_CMP1
Comparator 1 Present
1
2
COMP_PP_CMP2
Comparator 2 Present
2
3
PP
Analog Comparator Peripheral Properties
0xFC0
-1
read-write
n
0x0
0x0
COMP_PP_C0O
Comparator Output 0 Present
16
17
COMP_PP_C1O
Comparator Output 1 Present
17
18
COMP_PP_C2O
Comparator Output 2 Present
18
19
COMP_PP_CMP0
Comparator 0 Present
0
1
COMP_PP_CMP1
Comparator 1 Present
1
2
COMP_PP_CMP2
Comparator 2 Present
2
3
EEPROM
Register map for EEPROM peripheral
EEPROM
0x0
0x0
0x1000
registers
n
EEBLOCK
EEPROM Current Block
0x4
-1
read-write
n
0x0
0x0
EEPROM_EEBLOCK_BLOCK
Current Block
0
16
EEDBGME
EEPROM Debug Mass Erase
0x80
-1
read-write
n
0x0
0x0
EEPROM_EEDBGME_KEY
Erase Key
16
32
EEPROM_EEDBGME_ME
Mass Erase
0
1
EEDONE
EEPROM Done Status
0x18
-1
read-write
n
0x0
0x0
EEPROM_EEDONE_NOPERM
Write Without Permission
4
5
EEPROM_EEDONE_WKCOPY
Working on a Copy
3
4
EEPROM_EEDONE_WKERASE
Working on an Erase
2
3
EEPROM_EEDONE_WORKING
EEPROM Working
0
1
EEPROM_EEDONE_WRBUSY
Write Busy
5
6
EEHIDE
EEPROM Block Hide
0x50
-1
read-write
n
0x0
0x0
EEPROM_EEHIDE_HN
Hide Block
1
32
EEINT
EEPROM Interrupt
0x40
-1
read-write
n
0x0
0x0
EEPROM_EEINT_INT
Interrupt Enable
0
1
EEOFFSET
EEPROM Current Offset
0x8
-1
read-write
n
0x0
0x0
EEPROM_EEOFFSET_OFFSET
Current Address Offset
0
4
EEPASS0
EEPROM Password
0x34
-1
read-write
n
0x0
0x0
EEPROM_EEPASS0_PASS
Password
0
32
EEPASS1
EEPROM Password
0x38
-1
read-write
n
0x0
0x0
EEPROM_EEPASS1_PASS
Password
0
32
EEPASS2
EEPROM Password
0x3C
-1
read-write
n
0x0
0x0
EEPROM_EEPASS2_PASS
Password
0
32
EEPROMEEBLOCK
EEPROM Current Block
0x4
read-write
n
0x0
0x0
EEPROM_EEBLOCK_BLOCK
Current Block
0
16
EEPROMEEDBGME
EEPROM Debug Mass Erase
0x80
read-write
n
0x0
0x0
EEPROM_EEDBGME_KEY
Erase Key
16
32
EEPROM_EEDBGME_ME
Mass Erase
0
1
EEPROMEEDONE
EEPROM Done Status
0x18
read-write
n
0x0
0x0
EEPROM_EEDONE_INVPL
Invalid Program Voltage Level
8
9
EEPROM_EEDONE_NOPERM
Write Without Permission
4
5
EEPROM_EEDONE_WKCOPY
Working on a Copy
3
4
EEPROM_EEDONE_WKERASE
Working on an Erase
2
3
EEPROM_EEDONE_WORKING
EEPROM Working
0
1
EEPROM_EEDONE_WRBUSY
Write Busy
5
6
EEPROMEEHIDE
EEPROM Block Hide
0x50
read-write
n
0x0
0x0
EEPROM_EEHIDE_HN
Hide Block
1
32
EEPROMEEINT
EEPROM Interrupt
0x40
read-write
n
0x0
0x0
EEPROM_EEINT_INT
Interrupt Enable
0
1
EEPROMEEOFFSET
EEPROM Current Offset
0x8
read-write
n
0x0
0x0
EEPROM_EEOFFSET_OFFSET
Current Address Offset
0
4
EEPROMEEPASS0
EEPROM Password
0x34
read-write
n
0x0
0x0
EEPROM_EEPASS0_PASS
Password
0
32
EEPROMEEPASS1
EEPROM Password
0x38
read-write
n
0x0
0x0
EEPROM_EEPASS1_PASS
Password
0
32
EEPROMEEPASS2
EEPROM Password
0x3C
read-write
n
0x0
0x0
EEPROM_EEPASS2_PASS
Password
0
32
EEPROMEEPROT
EEPROM Protection
0x30
read-write
n
0x0
0x0
EEPROM_EEPROT_ACC
Access Control
3
4
EEPROM_EEPROT_PROT
Protection Control
0
3
EEPROM_EEPROT_PROT_RWNPW
This setting is the default. If there is no password, the block is not protected and is readable and writable
0x0
EEPROM_EEPROT_PROT_RWPW
If there is a password, the block is readable or writable only when unlocked
0x1
EEPROM_EEPROT_PROT_RONPW
If there is no password, the block is readable, not writable
0x2
EEPROMEERDWR
EEPROM Read-Write
0x10
read-write
n
0x0
0x0
EEPROM_EERDWR_VALUE
EEPROM Read or Write Data
0
32
EEPROMEERDWRINC
EEPROM Read-Write with Increment
0x14
read-write
n
0x0
0x0
EEPROM_EERDWRINC_VALUE
EEPROM Read or Write Data with Increment
0
32
EEPROMEESIZE
EEPROM Size Information
0x0
read-write
n
0x0
0x0
EEPROM_EESIZE_BLKCNT
Number of 16-Word Blocks
16
27
EEPROM_EESIZE_WORDCNT
Number of 32-Bit Words
0
16
EEPROMEESUPP
EEPROM Support Control and Status
0x1C
read-write
n
0x0
0x0
EEPROM_EESUPP_EREQ
Erase Required
1
2
EEPROM_EESUPP_ERETRY
Erase Must Be Retried
2
3
EEPROM_EESUPP_PRETRY
Programming Must Be Retried
3
4
EEPROM_EESUPP_START
Start Erase
0
1
EEPROMEEUNLOCK
EEPROM Unlock
0x20
read-write
n
0x0
0x0
EEPROM_EEUNLOCK_UNLOCK
EEPROM Unlock
0
32
EEPROMPP
EEPROM Peripheral Properties
0xFC0
read-write
n
0x0
0x0
EEPROM_PP_SIZE
EEPROM Size
0
5
EEPROT
EEPROM Protection
0x30
-1
read-write
n
0x0
0x0
EEPROM_EEPROT_ACC
Access Control
3
4
EEPROM_EEPROT_PROT
Protection Control
0
3
EEPROM_EEPROT_PROT_RWNPW
This setting is the default. If there is no password, the block is not protected and is readable and writable
0x0
EEPROM_EEPROT_PROT_RWPW
If there is a password, the block is readable or writable only when unlocked
0x1
EEPROM_EEPROT_PROT_RONPW
If there is no password, the block is readable, not writable
0x2
EERDWR
EEPROM Read-Write
0x10
-1
read-write
n
0x0
0x0
EEPROM_EERDWR_VALUE
EEPROM Read or Write Data
0
32
EERDWRINC
EEPROM Read-Write with Increment
0x14
-1
read-write
n
0x0
0x0
EEPROM_EERDWRINC_VALUE
EEPROM Read or Write Data with Increment
0
32
EESIZE
EEPROM Size Information
0x0
-1
read-write
n
0x0
0x0
EEPROM_EESIZE_BLKCNT
Number of 16-Word Blocks
16
27
EEPROM_EESIZE_WORDCNT
Number of 32-Bit Words
0
16
EESUPP
EEPROM Support Control and Status
0x1C
-1
read-write
n
0x0
0x0
EEPROM_EESUPP_ERETRY
Erase Must Be Retried
2
3
EEPROM_EESUPP_PRETRY
Programming Must Be Retried
3
4
EEUNLOCK
EEPROM Unlock
0x20
-1
read-write
n
0x0
0x0
EEPROM_EEUNLOCK_UNLOCK
EEPROM Unlock
0
32
PP
EEPROM Peripheral Properties
0xFC0
-1
read-write
n
0x0
0x0
EEPROM_PP_SIZE
EEPROM Size
0
5
FLASH_CTRL
Register map for FLASH_CTRL peripheral
FLASH_CTRL
0x0
0x0
0x1000
registers
n
0x1000
0x1000
registers
n
FLASH_CTRL
29
BOOTCFG
Boot Configuration
0x11D0
-1
read-write
n
0x0
0x0
FLASH_BOOTCFG_DBG0
Debug Control 0
0
1
FLASH_BOOTCFG_DBG1
Debug Control 1
1
2
FLASH_BOOTCFG_EN
Boot GPIO Enable
8
9
FLASH_BOOTCFG_KEY
KEY Select
4
5
FLASH_BOOTCFG_NW
Not Written
31
32
FLASH_BOOTCFG_PIN
Boot GPIO Pin
10
13
FLASH_BOOTCFG_PIN_0
Pin 0
0x0
FLASH_BOOTCFG_PIN_1
Pin 1
0x1
FLASH_BOOTCFG_PIN_2
Pin 2
0x2
FLASH_BOOTCFG_PIN_3
Pin 3
0x3
FLASH_BOOTCFG_PIN_4
Pin 4
0x4
FLASH_BOOTCFG_PIN_5
Pin 5
0x5
FLASH_BOOTCFG_PIN_6
Pin 6
0x6
FLASH_BOOTCFG_PIN_7
Pin 7
0x7
FLASH_BOOTCFG_POL
Boot GPIO Polarity
9
10
FLASH_BOOTCFG_PORT
Boot GPIO Port
13
16
FLASH_BOOTCFG_PORT_A
Port A
0x0
FLASH_BOOTCFG_PORT_B
Port B
0x1
FLASH_BOOTCFG_PORT_C
Port C
0x2
FLASH_BOOTCFG_PORT_D
Port D
0x3
FLASH_BOOTCFG_PORT_E
Port E
0x4
FLASH_BOOTCFG_PORT_F
Port F
0x5
FLASH_BOOTCFG_PORT_G
Port G
0x6
FLASH_BOOTCFG_PORT_H
Port H
0x7
FCIM
Flash Controller Interrupt Mask
0x10
-1
read-write
n
0x0
0x0
FLASH_FCIM_AMASK
Access Interrupt Mask
0
1
FLASH_FCIM_EMASK
EEPROM Interrupt Mask
2
3
FLASH_FCIM_ERMASK
ERVER Interrupt Mask
11
12
FLASH_FCIM_INVDMASK
Invalid Data Interrupt Mask
10
11
FLASH_FCIM_PMASK
Programming Interrupt Mask
1
2
FLASH_FCIM_PROGMASK
PROGVER Interrupt Mask
13
14
FLASH_FCIM_VOLTMASK
VOLT Interrupt Mask
9
10
FCMISC
Flash Controller Masked Interrupt Status and Clear
0x14
-1
read-write
n
0x0
0x0
FLASH_FCMISC_AMISC
Access Masked Interrupt Status and Clear
0
1
FLASH_FCMISC_EMISC
EEPROM Masked Interrupt Status and Clear
2
3
FLASH_FCMISC_ERMISC
ERVER Masked Interrupt Status and Clear
11
12
FLASH_FCMISC_INVDMISC
Invalid Data Masked Interrupt Status and Clear
10
11
FLASH_FCMISC_PMISC
Programming Masked Interrupt Status and Clear
1
2
FLASH_FCMISC_PROGMISC
PROGVER Masked Interrupt Status and Clear
13
14
FLASH_FCMISC_VOLTMISC
VOLT Masked Interrupt Status and Clear
9
10
FCRIS
Flash Controller Raw Interrupt Status
0xC
-1
read-write
n
0x0
0x0
FLASH_FCRIS_ARIS
Access Raw Interrupt Status
0
1
FLASH_FCRIS_ERIS
EEPROM Raw Interrupt Status
2
3
FLASH_FCRIS_ERRIS
Erase Verify Error Raw Interrupt Status
11
12
FLASH_FCRIS_INVDRIS
Invalid Data Raw Interrupt Status
10
11
FLASH_FCRIS_PRIS
Programming Raw Interrupt Status
1
2
FLASH_FCRIS_PROGRIS
Program Verify Error Raw Interrupt Status
13
14
FLASH_FCRIS_VOLTRIS
Pump Voltage Raw Interrupt Status
9
10
FLASH_CTRLBOOTCFG
Boot Configuration
0x11D0
read-write
n
0x0
0x0
FLASH_BOOTCFG_DBG0
Debug Control 0
0
1
FLASH_BOOTCFG_DBG1
Debug Control 1
1
2
FLASH_BOOTCFG_EN
Boot GPIO Enable
8
9
FLASH_BOOTCFG_KEY
KEY Select
4
5
FLASH_BOOTCFG_NW
Not Written
31
32
FLASH_BOOTCFG_PIN
Boot GPIO Pin
10
13
FLASH_BOOTCFG_PIN_0
Pin 0
0x0
FLASH_BOOTCFG_PIN_1
Pin 1
0x1
FLASH_BOOTCFG_PIN_2
Pin 2
0x2
FLASH_BOOTCFG_PIN_3
Pin 3
0x3
FLASH_BOOTCFG_PIN_4
Pin 4
0x4
FLASH_BOOTCFG_PIN_5
Pin 5
0x5
FLASH_BOOTCFG_PIN_6
Pin 6
0x6
FLASH_BOOTCFG_PIN_7
Pin 7
0x7
FLASH_BOOTCFG_POL
Boot GPIO Polarity
9
10
FLASH_BOOTCFG_PORT
Boot GPIO Port
13
16
FLASH_BOOTCFG_PORT_A
Port A
0x0
FLASH_BOOTCFG_PORT_B
Port B
0x1
FLASH_BOOTCFG_PORT_C
Port C
0x2
FLASH_BOOTCFG_PORT_D
Port D
0x3
FLASH_BOOTCFG_PORT_E
Port E
0x4
FLASH_BOOTCFG_PORT_F
Port F
0x5
FLASH_BOOTCFG_PORT_G
Port G
0x6
FLASH_BOOTCFG_PORT_H
Port H
0x7
FLASH_CTRLFCIM
Flash Controller Interrupt Mask
0x10
read-write
n
0x0
0x0
FLASH_FCIM_AMASK
Access Interrupt Mask
0
1
FLASH_FCIM_EMASK
EEPROM Interrupt Mask
2
3
FLASH_FCIM_ERMASK
ERVER Interrupt Mask
11
12
FLASH_FCIM_INVDMASK
Invalid Data Interrupt Mask
10
11
FLASH_FCIM_PMASK
Programming Interrupt Mask
1
2
FLASH_FCIM_PROGMASK
PROGVER Interrupt Mask
13
14
FLASH_FCIM_VOLTMASK
VOLT Interrupt Mask
9
10
FLASH_CTRLFCMISC
Flash Controller Masked Interrupt Status and Clear
0x14
read-write
n
0x0
0x0
FLASH_FCMISC_AMISC
Access Masked Interrupt Status and Clear
0
1
FLASH_FCMISC_EMISC
EEPROM Masked Interrupt Status and Clear
2
3
FLASH_FCMISC_ERMISC
ERVER Masked Interrupt Status and Clear
11
12
FLASH_FCMISC_INVDMISC
Invalid Data Masked Interrupt Status and Clear
10
11
FLASH_FCMISC_PMISC
Programming Masked Interrupt Status and Clear
1
2
FLASH_FCMISC_PROGMISC
PROGVER Masked Interrupt Status and Clear
13
14
FLASH_FCMISC_VOLTMISC
VOLT Masked Interrupt Status and Clear
9
10
FLASH_CTRLFCRIS
Flash Controller Raw Interrupt Status
0xC
read-write
n
0x0
0x0
FLASH_FCRIS_ARIS
Access Raw Interrupt Status
0
1
FLASH_FCRIS_ERIS
EEPROM Raw Interrupt Status
2
3
FLASH_FCRIS_ERRIS
Erase Verify Error Raw Interrupt Status
11
12
FLASH_FCRIS_INVDRIS
Invalid Data Raw Interrupt Status
10
11
FLASH_FCRIS_PRIS
Programming Raw Interrupt Status
1
2
FLASH_FCRIS_PROGRIS
Program Verify Error Raw Interrupt Status
13
14
FLASH_FCRIS_VOLTRIS
Pump Voltage Raw Interrupt Status
9
10
FLASH_CTRLFMA
Flash Memory Address
0x0
read-write
n
0x0
0x0
FLASH_FMA_OFFSET
Address Offset
0
17
FLASH_CTRLFMC
Flash Memory Control
0x8
read-write
n
0x0
0x0
FLASH_FMC_COMT
Commit Register Value
3
4
FLASH_FMC_ERASE
Erase a Page of Flash Memory
1
2
FLASH_FMC_MERASE
Mass Erase Flash Memory
2
3
FLASH_FMC_WRITE
Write a Word into Flash Memory
0
1
FLASH_FMC_WRKEY
FLASH write key
17
32
FLASH_CTRLFMC2
Flash Memory Control 2
0x20
read-write
n
0x0
0x0
FLASH_FMC2_WRBUF
Buffered Flash Memory Write
0
1
FLASH_CTRLFMD
Flash Memory Data
0x4
read-write
n
0x0
0x0
FLASH_FMD_DATA
Data Value
0
32
FLASH_CTRLFMPPE0
Flash Memory Protection Program Enable 0
0x1400
read-write
n
0x0
0x0
FLASH_CTRLFMPPE1
Flash Memory Protection Program Enable 1
0x1404
read-write
n
0x0
0x0
FLASH_CTRLFMPRE0
Flash Memory Protection Read Enable 0
0x1200
read-write
n
0x0
0x0
FLASH_CTRLFMPRE1
Flash Memory Protection Read Enable 1
0x1204
read-write
n
0x0
0x0
FLASH_CTRLFSIZE
Flash Size
0xFC0
read-write
n
0x0
0x0
FLASH_FSIZE_SIZE
Flash Size
0
16
FLASH_FSIZE_SIZE_64KB
64 KB of Flash
0x1f
FLASH_FSIZE_SIZE_96KB
96 KB of Flash
0x2f
FLASH_FSIZE_SIZE_8KB
8 KB of Flash
0x3
FLASH_FSIZE_SIZE_128KB
128 KB of Flash
0x3f
FLASH_FSIZE_SIZE_192KB
192 KB of Flash
0x5f
FLASH_FSIZE_SIZE_16KB
16 KB of Flash
0x7
FLASH_FSIZE_SIZE_256KB
256 KB of Flash
0x7f
FLASH_FSIZE_SIZE_32KB
32 KB of Flash
0xf
FLASH_CTRLFWBN
Flash Write Buffer n
0x100
read-write
n
0x0
0x0
FLASH_FWBN_DATA
Data
0
32
FLASH_CTRLFWBVAL
Flash Write Buffer Valid
0x30
read-write
n
0x0
0x0
FLASH_FWBVAL_FWB
Flash Memory Write Buffer
0
32
FLASH_CTRLRMCTL
ROM Control
0x10F0
read-write
n
0x0
0x0
FLASH_RMCTL_BA
Boot Alias
0
1
FLASH_CTRLROMSWMAP
ROM Software Map
0xFCC
read-write
n
0x0
0x0
FLASH_CTRLSSIZE
SRAM Size
0xFC4
read-write
n
0x0
0x0
FLASH_SSIZE_SIZE
SRAM Size
0
16
FLASH_SSIZE_SIZE_6KB
6 KB of SRAM
0x17
FLASH_SSIZE_SIZE_8KB
8 KB of SRAM
0x1f
FLASH_SSIZE_SIZE_12KB
12 KB of SRAM
0x2f
FLASH_SSIZE_SIZE_16KB
16 KB of SRAM
0x3f
FLASH_SSIZE_SIZE_20KB
20 KB of SRAM
0x4f
FLASH_SSIZE_SIZE_24KB
24 KB of SRAM
0x5f
FLASH_SSIZE_SIZE_2KB
2 KB of SRAM
0x7
FLASH_SSIZE_SIZE_32KB
32 KB of SRAM
0x7f
FLASH_SSIZE_SIZE_4KB
4 KB of SRAM
0xf
FLASH_CTRLUSERREG0
User Register 0
0x11E0
read-write
n
0x0
0x0
FLASH_USERREG0_DATA
User Data
0
32
FLASH_CTRLUSERREG1
User Register 1
0x11E4
read-write
n
0x0
0x0
FLASH_USERREG1_DATA
User Data
0
32
FLASH_CTRLUSERREG2
User Register 2
0x11E8
read-write
n
0x0
0x0
FLASH_USERREG2_DATA
User Data
0
32
FLASH_CTRLUSERREG3
User Register 3
0x11EC
read-write
n
0x0
0x0
FLASH_USERREG3_DATA
User Data
0
32
FMA
Flash Memory Address
0x0
-1
read-write
n
0x0
0x0
FLASH_FMA_OFFSET
Address Offset
0
17
FMC
Flash Memory Control
0x8
-1
read-write
n
0x0
0x0
FLASH_FMC_COMT
Commit Register Value
3
4
FLASH_FMC_ERASE
Erase a Page of Flash Memory
1
2
FLASH_FMC_MERASE
Mass Erase Flash Memory
2
3
FLASH_FMC_WRITE
Write a Word into Flash Memory
0
1
FLASH_FMC_WRKEY
FLASH write key
17
32
FMC2
Flash Memory Control 2
0x20
-1
read-write
n
0x0
0x0
FLASH_FMC2_WRBUF
Buffered Flash Memory Write
0
1
FMD
Flash Memory Data
0x4
-1
read-write
n
0x0
0x0
FLASH_FMD_DATA
Data Value
0
32
FMPPE0
Flash Memory Protection Program Enable 0
0x1400
-1
read-write
n
0x0
0x0
FMPPE1
Flash Memory Protection Program Enable 1
0x1404
-1
read-write
n
0x0
0x0
FMPRE0
Flash Memory Protection Read Enable 0
0x1200
-1
read-write
n
0x0
0x0
FMPRE1
Flash Memory Protection Read Enable 1
0x1204
-1
read-write
n
0x0
0x0
FSIZE
Flash Size
0xFC0
-1
read-write
n
0x0
0x0
FLASH_FSIZE_SIZE
Flash Size
0
16
FLASH_FSIZE_SIZE_128KB
128 KB of Flash
0x3f
FWBN
Flash Write Buffer n
0x100
-1
read-write
n
0x0
0x0
FLASH_FWBN_DATA
Data
0
32
FWBVAL
Flash Write Buffer Valid
0x30
-1
read-write
n
0x0
0x0
FLASH_FWBVAL_FWB
Flash Memory Write Buffer
0
32
RMCTL
ROM Control
0x10F0
-1
read-write
n
0x0
0x0
FLASH_RMCTL_BA
Boot Alias
0
1
ROMSWMAP
ROM Software Map
0xFCC
-1
read-write
n
0x0
0x0
FLASH_ROMSWMAP_SAFERTOS
SafeRTOS Present
0
1
SSIZE
SRAM Size
0xFC4
-1
read-write
n
0x0
0x0
FLASH_SSIZE_SIZE
SRAM Size
0
16
FLASH_SSIZE_SIZE_32KB
32 KB of SRAM
0x7f
USERREG0
User Register 0
0x11E0
-1
read-write
n
0x0
0x0
FLASH_USERREG0_DATA
User Data
0
32
USERREG1
User Register 1
0x11E4
-1
read-write
n
0x0
0x0
FLASH_USERREG1_DATA
User Data
0
32
USERREG2
User Register 2
0x11E8
-1
read-write
n
0x0
0x0
FLASH_USERREG2_DATA
User Data
0
32
USERREG3
User Register 3
0x11EC
-1
read-write
n
0x0
0x0
FLASH_USERREG3_DATA
User Data
0
32
GPIOA
Register map for GPIOA peripheral
GPIO
0x0
0x0
0x1000
registers
n
GPIOA
0
ADCCTL
GPIO ADC Control
0x530
-1
read-write
n
0x0
0x0
AFSEL
GPIO Alternate Function Select
0x420
-1
read-write
n
0x0
0x0
AMSEL
GPIO Analog Mode Select
0x528
-1
read-write
n
0x0
0x0
CR
GPIO Commit
0x524
-1
read-write
n
0x0
0x0
DATA
GPIO Data
0x3FC
-1
read-write
n
0x0
0x0
DEN
GPIO Digital Enable
0x51C
-1
read-write
n
0x0
0x0
DIR
GPIO Direction
0x400
-1
read-write
n
0x0
0x0
DMACTL
GPIO DMA Control
0x534
-1
read-write
n
0x0
0x0
DR2R
GPIO 2-mA Drive Select
0x500
-1
read-write
n
0x0
0x0
DR4R
GPIO 4-mA Drive Select
0x504
-1
read-write
n
0x0
0x0
DR8R
GPIO 8-mA Drive Select
0x508
-1
read-write
n
0x0
0x0
GPIOAADCCTL
GPIO ADC Control
0x530
read-write
n
0x0
0x0
GPIOAAFSEL
GPIO Alternate Function Select
0x420
read-write
n
0x0
0x0
GPIOAAMSEL
GPIO Analog Mode Select
0x528
read-write
n
0x0
0x0
GPIOACR
GPIO Commit
0x524
read-write
n
0x0
0x0
GPIOADATA
GPIO Data
0x3FC
read-write
n
0x0
0x0
GPIOADEN
GPIO Digital Enable
0x51C
read-write
n
0x0
0x0
GPIOADIR
GPIO Direction
0x400
read-write
n
0x0
0x0
GPIOADMACTL
GPIO DMA Control
0x534
read-write
n
0x0
0x0
GPIOADR2R
GPIO 2-mA Drive Select
0x500
read-write
n
0x0
0x0
GPIOADR4R
GPIO 4-mA Drive Select
0x504
read-write
n
0x0
0x0
GPIOADR8R
GPIO 8-mA Drive Select
0x508
read-write
n
0x0
0x0
GPIOAIBE
GPIO Interrupt Both Edges
0x408
read-write
n
0x0
0x0
GPIOAICR
GPIO Interrupt Clear
0x41C
write-only
n
0x0
0x0
GPIO_ICR_GPIO
GPIO Interrupt Clear
0
8
write-only
GPIOAIEV
GPIO Interrupt Event
0x40C
read-write
n
0x0
0x0
GPIOAIM
GPIO Interrupt Mask
0x410
read-write
n
0x0
0x0
GPIO_IM_GPIO
GPIO Interrupt Mask Enable
0
8
GPIOAIS
GPIO Interrupt Sense
0x404
read-write
n
0x0
0x0
GPIOALOCK
GPIO Lock
0x520
read-write
n
0x0
0x0
GPIO_LOCK
GPIO Lock
0
32
GPIO_LOCK_UNLOCKED
The GPIOCR register is unlocked and may be modified
0x0
GPIO_LOCK_LOCKED
The GPIOCR register is locked and may not be modified
0x1
GPIO_LOCK_KEY
Unlocks the GPIO_CR register
0x4c4f434b
GPIOAMIS
GPIO Masked Interrupt Status
0x418
read-write
n
0x0
0x0
GPIO_MIS_GPIO
GPIO Masked Interrupt Status
0
8
GPIOAODR
GPIO Open Drain Select
0x50C
read-write
n
0x0
0x0
GPIOAPCTL
GPIO Port Control
0x52C
read-write
n
0x0
0x0
GPIOAPDR
GPIO Pull-Down Select
0x514
read-write
n
0x0
0x0
GPIOAPUR
GPIO Pull-Up Select
0x510
read-write
n
0x0
0x0
GPIOARIS
GPIO Raw Interrupt Status
0x414
read-write
n
0x0
0x0
GPIO_RIS_GPIO
GPIO Interrupt Raw Status
0
8
GPIOASLR
GPIO Slew Rate Control Select
0x518
read-write
n
0x0
0x0
IBE
GPIO Interrupt Both Edges
0x408
-1
read-write
n
0x0
0x0
ICR
GPIO Interrupt Clear
0x41C
-1
write-only
n
0x0
0x0
GPIO_ICR_GPIO
GPIO Interrupt Clear
0
8
write-only
IEV
GPIO Interrupt Event
0x40C
-1
read-write
n
0x0
0x0
IM
GPIO Interrupt Mask
0x410
-1
read-write
n
0x0
0x0
GPIO_IM_GPIO
GPIO Interrupt Mask Enable
0
8
IS
GPIO Interrupt Sense
0x404
-1
read-write
n
0x0
0x0
LOCK
GPIO Lock
0x520
-1
read-write
n
0x0
0x0
GPIO_LOCK
GPIO Lock
0
32
GPIO_LOCK_UNLOCKED
The GPIOCR register is unlocked and may be modified
0x0
GPIO_LOCK_LOCKED
The GPIOCR register is locked and may not be modified
0x1
GPIO_LOCK_KEY
Unlocks the GPIO_CR register
0x4c4f434b
MIS
GPIO Masked Interrupt Status
0x418
-1
read-write
n
0x0
0x0
GPIO_MIS_GPIO
GPIO Masked Interrupt Status
0
8
ODR
GPIO Open Drain Select
0x50C
-1
read-write
n
0x0
0x0
PCTL
GPIO Port Control
0x52C
-1
read-write
n
0x0
0x0
PDR
GPIO Pull-Down Select
0x514
-1
read-write
n
0x0
0x0
PUR
GPIO Pull-Up Select
0x510
-1
read-write
n
0x0
0x0
RIS
GPIO Raw Interrupt Status
0x414
-1
read-write
n
0x0
0x0
GPIO_RIS_GPIO
GPIO Interrupt Raw Status
0
8
SLR
GPIO Slew Rate Control Select
0x518
-1
read-write
n
0x0
0x0
GPIOA_AHB
Register map for GPIOA peripheral
GPIO
0x0
0x0
0x1000
registers
n
GPIOA
0
ADCCTL
GPIO ADC Control
0x530
-1
read-write
n
0x0
0x0
AFSEL
GPIO Alternate Function Select
0x420
-1
read-write
n
0x0
0x0
AMSEL
GPIO Analog Mode Select
0x528
-1
read-write
n
0x0
0x0
CR
GPIO Commit
0x524
-1
read-write
n
0x0
0x0
DATA
GPIO Data
0x3FC
-1
read-write
n
0x0
0x0
DEN
GPIO Digital Enable
0x51C
-1
read-write
n
0x0
0x0
DIR
GPIO Direction
0x400
-1
read-write
n
0x0
0x0
DMACTL
GPIO DMA Control
0x534
-1
read-write
n
0x0
0x0
DR2R
GPIO 2-mA Drive Select
0x500
-1
read-write
n
0x0
0x0
DR4R
GPIO 4-mA Drive Select
0x504
-1
read-write
n
0x0
0x0
DR8R
GPIO 8-mA Drive Select
0x508
-1
read-write
n
0x0
0x0
GPIOAADCCTL
GPIO ADC Control
0x530
read-write
n
0x0
0x0
GPIOAAFSEL
GPIO Alternate Function Select
0x420
read-write
n
0x0
0x0
GPIOAAMSEL
GPIO Analog Mode Select
0x528
read-write
n
0x0
0x0
GPIOACR
GPIO Commit
0x524
read-write
n
0x0
0x0
GPIOADATA
GPIO Data
0x3FC
read-write
n
0x0
0x0
GPIOADEN
GPIO Digital Enable
0x51C
read-write
n
0x0
0x0
GPIOADIR
GPIO Direction
0x400
read-write
n
0x0
0x0
GPIOADMACTL
GPIO DMA Control
0x534
read-write
n
0x0
0x0
GPIOADR2R
GPIO 2-mA Drive Select
0x500
read-write
n
0x0
0x0
GPIOADR4R
GPIO 4-mA Drive Select
0x504
read-write
n
0x0
0x0
GPIOADR8R
GPIO 8-mA Drive Select
0x508
read-write
n
0x0
0x0
GPIOAIBE
GPIO Interrupt Both Edges
0x408
read-write
n
0x0
0x0
GPIOAICR
GPIO Interrupt Clear
0x41C
write-only
n
0x0
0x0
GPIO_ICR_GPIO
GPIO Interrupt Clear
0
8
write-only
GPIOAIEV
GPIO Interrupt Event
0x40C
read-write
n
0x0
0x0
GPIOAIM
GPIO Interrupt Mask
0x410
read-write
n
0x0
0x0
GPIO_IM_GPIO
GPIO Interrupt Mask Enable
0
8
GPIOAIS
GPIO Interrupt Sense
0x404
read-write
n
0x0
0x0
GPIOALOCK
GPIO Lock
0x520
read-write
n
0x0
0x0
GPIO_LOCK
GPIO Lock
0
32
GPIO_LOCK_UNLOCKED
The GPIOCR register is unlocked and may be modified
0x0
GPIO_LOCK_LOCKED
The GPIOCR register is locked and may not be modified
0x1
GPIO_LOCK_KEY
Unlocks the GPIO_CR register
0x4c4f434b
GPIOAMIS
GPIO Masked Interrupt Status
0x418
read-write
n
0x0
0x0
GPIO_MIS_GPIO
GPIO Masked Interrupt Status
0
8
GPIOAODR
GPIO Open Drain Select
0x50C
read-write
n
0x0
0x0
GPIOAPCTL
GPIO Port Control
0x52C
read-write
n
0x0
0x0
GPIOAPDR
GPIO Pull-Down Select
0x514
read-write
n
0x0
0x0
GPIOAPUR
GPIO Pull-Up Select
0x510
read-write
n
0x0
0x0
GPIOARIS
GPIO Raw Interrupt Status
0x414
read-write
n
0x0
0x0
GPIO_RIS_GPIO
GPIO Interrupt Raw Status
0
8
GPIOASLR
GPIO Slew Rate Control Select
0x518
read-write
n
0x0
0x0
IBE
GPIO Interrupt Both Edges
0x408
-1
read-write
n
0x0
0x0
ICR
GPIO Interrupt Clear
0x41C
-1
write-only
n
0x0
0x0
GPIO_ICR_GPIO
GPIO Interrupt Clear
0
8
write-only
IEV
GPIO Interrupt Event
0x40C
-1
read-write
n
0x0
0x0
IM
GPIO Interrupt Mask
0x410
-1
read-write
n
0x0
0x0
GPIO_IM_GPIO
GPIO Interrupt Mask Enable
0
8
IS
GPIO Interrupt Sense
0x404
-1
read-write
n
0x0
0x0
LOCK
GPIO Lock
0x520
-1
read-write
n
0x0
0x0
GPIO_LOCK
GPIO Lock
0
32
GPIO_LOCK_UNLOCKED
The GPIOCR register is unlocked and may be modified
0x0
GPIO_LOCK_LOCKED
The GPIOCR register is locked and may not be modified
0x1
GPIO_LOCK_KEY
Unlocks the GPIO_CR register
0x4c4f434b
MIS
GPIO Masked Interrupt Status
0x418
-1
read-write
n
0x0
0x0
GPIO_MIS_GPIO
GPIO Masked Interrupt Status
0
8
ODR
GPIO Open Drain Select
0x50C
-1
read-write
n
0x0
0x0
PCTL
GPIO Port Control
0x52C
-1
read-write
n
0x0
0x0
PDR
GPIO Pull-Down Select
0x514
-1
read-write
n
0x0
0x0
PUR
GPIO Pull-Up Select
0x510
-1
read-write
n
0x0
0x0
RIS
GPIO Raw Interrupt Status
0x414
-1
read-write
n
0x0
0x0
GPIO_RIS_GPIO
GPIO Interrupt Raw Status
0
8
SLR
GPIO Slew Rate Control Select
0x518
-1
read-write
n
0x0
0x0
GPIOB
Register map for GPIOA peripheral
GPIO
0x0
0x0
0x1000
registers
n
GPIOB
1
ADCCTL
GPIO ADC Control
0x530
-1
read-write
n
0x0
0x0
AFSEL
GPIO Alternate Function Select
0x420
-1
read-write
n
0x0
0x0
AMSEL
GPIO Analog Mode Select
0x528
-1
read-write
n
0x0
0x0
CR
GPIO Commit
0x524
-1
read-write
n
0x0
0x0
DATA
GPIO Data
0x3FC
-1
read-write
n
0x0
0x0
DEN
GPIO Digital Enable
0x51C
-1
read-write
n
0x0
0x0
DIR
GPIO Direction
0x400
-1
read-write
n
0x0
0x0
DMACTL
GPIO DMA Control
0x534
-1
read-write
n
0x0
0x0
DR2R
GPIO 2-mA Drive Select
0x500
-1
read-write
n
0x0
0x0
DR4R
GPIO 4-mA Drive Select
0x504
-1
read-write
n
0x0
0x0
DR8R
GPIO 8-mA Drive Select
0x508
-1
read-write
n
0x0
0x0
GPIOAADCCTL
GPIO ADC Control
0x530
read-write
n
0x0
0x0
GPIOAAFSEL
GPIO Alternate Function Select
0x420
read-write
n
0x0
0x0
GPIOAAMSEL
GPIO Analog Mode Select
0x528
read-write
n
0x0
0x0
GPIOACR
GPIO Commit
0x524
read-write
n
0x0
0x0
GPIOADATA
GPIO Data
0x3FC
read-write
n
0x0
0x0
GPIOADEN
GPIO Digital Enable
0x51C
read-write
n
0x0
0x0
GPIOADIR
GPIO Direction
0x400
read-write
n
0x0
0x0
GPIOADMACTL
GPIO DMA Control
0x534
read-write
n
0x0
0x0
GPIOADR2R
GPIO 2-mA Drive Select
0x500
read-write
n
0x0
0x0
GPIOADR4R
GPIO 4-mA Drive Select
0x504
read-write
n
0x0
0x0
GPIOADR8R
GPIO 8-mA Drive Select
0x508
read-write
n
0x0
0x0
GPIOAIBE
GPIO Interrupt Both Edges
0x408
read-write
n
0x0
0x0
GPIOAICR
GPIO Interrupt Clear
0x41C
write-only
n
0x0
0x0
GPIO_ICR_GPIO
GPIO Interrupt Clear
0
8
write-only
GPIOAIEV
GPIO Interrupt Event
0x40C
read-write
n
0x0
0x0
GPIOAIM
GPIO Interrupt Mask
0x410
read-write
n
0x0
0x0
GPIO_IM_GPIO
GPIO Interrupt Mask Enable
0
8
GPIOAIS
GPIO Interrupt Sense
0x404
read-write
n
0x0
0x0
GPIOALOCK
GPIO Lock
0x520
read-write
n
0x0
0x0
GPIO_LOCK
GPIO Lock
0
32
GPIO_LOCK_UNLOCKED
The GPIOCR register is unlocked and may be modified
0x0
GPIO_LOCK_LOCKED
The GPIOCR register is locked and may not be modified
0x1
GPIO_LOCK_KEY
Unlocks the GPIO_CR register
0x4c4f434b
GPIOAMIS
GPIO Masked Interrupt Status
0x418
read-write
n
0x0
0x0
GPIO_MIS_GPIO
GPIO Masked Interrupt Status
0
8
GPIOAODR
GPIO Open Drain Select
0x50C
read-write
n
0x0
0x0
GPIOAPCTL
GPIO Port Control
0x52C
read-write
n
0x0
0x0
GPIOAPDR
GPIO Pull-Down Select
0x514
read-write
n
0x0
0x0
GPIOAPUR
GPIO Pull-Up Select
0x510
read-write
n
0x0
0x0
GPIOARIS
GPIO Raw Interrupt Status
0x414
read-write
n
0x0
0x0
GPIO_RIS_GPIO
GPIO Interrupt Raw Status
0
8
GPIOASLR
GPIO Slew Rate Control Select
0x518
read-write
n
0x0
0x0
IBE
GPIO Interrupt Both Edges
0x408
-1
read-write
n
0x0
0x0
ICR
GPIO Interrupt Clear
0x41C
-1
write-only
n
0x0
0x0
GPIO_ICR_GPIO
GPIO Interrupt Clear
0
8
write-only
IEV
GPIO Interrupt Event
0x40C
-1
read-write
n
0x0
0x0
IM
GPIO Interrupt Mask
0x410
-1
read-write
n
0x0
0x0
GPIO_IM_GPIO
GPIO Interrupt Mask Enable
0
8
IS
GPIO Interrupt Sense
0x404
-1
read-write
n
0x0
0x0
LOCK
GPIO Lock
0x520
-1
read-write
n
0x0
0x0
GPIO_LOCK
GPIO Lock
0
32
GPIO_LOCK_UNLOCKED
The GPIOCR register is unlocked and may be modified
0x0
GPIO_LOCK_LOCKED
The GPIOCR register is locked and may not be modified
0x1
GPIO_LOCK_KEY
Unlocks the GPIO_CR register
0x4c4f434b
MIS
GPIO Masked Interrupt Status
0x418
-1
read-write
n
0x0
0x0
GPIO_MIS_GPIO
GPIO Masked Interrupt Status
0
8
ODR
GPIO Open Drain Select
0x50C
-1
read-write
n
0x0
0x0
PCTL
GPIO Port Control
0x52C
-1
read-write
n
0x0
0x0
PDR
GPIO Pull-Down Select
0x514
-1
read-write
n
0x0
0x0
PUR
GPIO Pull-Up Select
0x510
-1
read-write
n
0x0
0x0
RIS
GPIO Raw Interrupt Status
0x414
-1
read-write
n
0x0
0x0
GPIO_RIS_GPIO
GPIO Interrupt Raw Status
0
8
SLR
GPIO Slew Rate Control Select
0x518
-1
read-write
n
0x0
0x0
GPIOB_AHB
Register map for GPIOA peripheral
GPIO
0x0
0x0
0x1000
registers
n
GPIOB
1
ADCCTL
GPIO ADC Control
0x530
-1
read-write
n
0x0
0x0
AFSEL
GPIO Alternate Function Select
0x420
-1
read-write
n
0x0
0x0
AMSEL
GPIO Analog Mode Select
0x528
-1
read-write
n
0x0
0x0
CR
GPIO Commit
0x524
-1
read-write
n
0x0
0x0
DATA
GPIO Data
0x3FC
-1
read-write
n
0x0
0x0
DEN
GPIO Digital Enable
0x51C
-1
read-write
n
0x0
0x0
DIR
GPIO Direction
0x400
-1
read-write
n
0x0
0x0
DMACTL
GPIO DMA Control
0x534
-1
read-write
n
0x0
0x0
DR2R
GPIO 2-mA Drive Select
0x500
-1
read-write
n
0x0
0x0
DR4R
GPIO 4-mA Drive Select
0x504
-1
read-write
n
0x0
0x0
DR8R
GPIO 8-mA Drive Select
0x508
-1
read-write
n
0x0
0x0
GPIOAADCCTL
GPIO ADC Control
0x530
read-write
n
0x0
0x0
GPIOAAFSEL
GPIO Alternate Function Select
0x420
read-write
n
0x0
0x0
GPIOAAMSEL
GPIO Analog Mode Select
0x528
read-write
n
0x0
0x0
GPIOACR
GPIO Commit
0x524
read-write
n
0x0
0x0
GPIOADATA
GPIO Data
0x3FC
read-write
n
0x0
0x0
GPIOADEN
GPIO Digital Enable
0x51C
read-write
n
0x0
0x0
GPIOADIR
GPIO Direction
0x400
read-write
n
0x0
0x0
GPIOADMACTL
GPIO DMA Control
0x534
read-write
n
0x0
0x0
GPIOADR2R
GPIO 2-mA Drive Select
0x500
read-write
n
0x0
0x0
GPIOADR4R
GPIO 4-mA Drive Select
0x504
read-write
n
0x0
0x0
GPIOADR8R
GPIO 8-mA Drive Select
0x508
read-write
n
0x0
0x0
GPIOAIBE
GPIO Interrupt Both Edges
0x408
read-write
n
0x0
0x0
GPIOAICR
GPIO Interrupt Clear
0x41C
write-only
n
0x0
0x0
GPIO_ICR_GPIO
GPIO Interrupt Clear
0
8
write-only
GPIOAIEV
GPIO Interrupt Event
0x40C
read-write
n
0x0
0x0
GPIOAIM
GPIO Interrupt Mask
0x410
read-write
n
0x0
0x0
GPIO_IM_GPIO
GPIO Interrupt Mask Enable
0
8
GPIOAIS
GPIO Interrupt Sense
0x404
read-write
n
0x0
0x0
GPIOALOCK
GPIO Lock
0x520
read-write
n
0x0
0x0
GPIO_LOCK
GPIO Lock
0
32
GPIO_LOCK_UNLOCKED
The GPIOCR register is unlocked and may be modified
0x0
GPIO_LOCK_LOCKED
The GPIOCR register is locked and may not be modified
0x1
GPIO_LOCK_KEY
Unlocks the GPIO_CR register
0x4c4f434b
GPIOAMIS
GPIO Masked Interrupt Status
0x418
read-write
n
0x0
0x0
GPIO_MIS_GPIO
GPIO Masked Interrupt Status
0
8
GPIOAODR
GPIO Open Drain Select
0x50C
read-write
n
0x0
0x0
GPIOAPCTL
GPIO Port Control
0x52C
read-write
n
0x0
0x0
GPIOAPDR
GPIO Pull-Down Select
0x514
read-write
n
0x0
0x0
GPIOAPUR
GPIO Pull-Up Select
0x510
read-write
n
0x0
0x0
GPIOARIS
GPIO Raw Interrupt Status
0x414
read-write
n
0x0
0x0
GPIO_RIS_GPIO
GPIO Interrupt Raw Status
0
8
GPIOASLR
GPIO Slew Rate Control Select
0x518
read-write
n
0x0
0x0
IBE
GPIO Interrupt Both Edges
0x408
-1
read-write
n
0x0
0x0
ICR
GPIO Interrupt Clear
0x41C
-1
write-only
n
0x0
0x0
GPIO_ICR_GPIO
GPIO Interrupt Clear
0
8
write-only
IEV
GPIO Interrupt Event
0x40C
-1
read-write
n
0x0
0x0
IM
GPIO Interrupt Mask
0x410
-1
read-write
n
0x0
0x0
GPIO_IM_GPIO
GPIO Interrupt Mask Enable
0
8
IS
GPIO Interrupt Sense
0x404
-1
read-write
n
0x0
0x0
LOCK
GPIO Lock
0x520
-1
read-write
n
0x0
0x0
GPIO_LOCK
GPIO Lock
0
32
GPIO_LOCK_UNLOCKED
The GPIOCR register is unlocked and may be modified
0x0
GPIO_LOCK_LOCKED
The GPIOCR register is locked and may not be modified
0x1
GPIO_LOCK_KEY
Unlocks the GPIO_CR register
0x4c4f434b
MIS
GPIO Masked Interrupt Status
0x418
-1
read-write
n
0x0
0x0
GPIO_MIS_GPIO
GPIO Masked Interrupt Status
0
8
ODR
GPIO Open Drain Select
0x50C
-1
read-write
n
0x0
0x0
PCTL
GPIO Port Control
0x52C
-1
read-write
n
0x0
0x0
PDR
GPIO Pull-Down Select
0x514
-1
read-write
n
0x0
0x0
PUR
GPIO Pull-Up Select
0x510
-1
read-write
n
0x0
0x0
RIS
GPIO Raw Interrupt Status
0x414
-1
read-write
n
0x0
0x0
GPIO_RIS_GPIO
GPIO Interrupt Raw Status
0
8
SLR
GPIO Slew Rate Control Select
0x518
-1
read-write
n
0x0
0x0
GPIOC
Register map for GPIOA peripheral
GPIO
0x0
0x0
0x1000
registers
n
GPIOC
2
ADCCTL
GPIO ADC Control
0x530
-1
read-write
n
0x0
0x0
AFSEL
GPIO Alternate Function Select
0x420
-1
read-write
n
0x0
0x0
AMSEL
GPIO Analog Mode Select
0x528
-1
read-write
n
0x0
0x0
CR
GPIO Commit
0x524
-1
read-write
n
0x0
0x0
DATA
GPIO Data
0x3FC
-1
read-write
n
0x0
0x0
DEN
GPIO Digital Enable
0x51C
-1
read-write
n
0x0
0x0
DIR
GPIO Direction
0x400
-1
read-write
n
0x0
0x0
DMACTL
GPIO DMA Control
0x534
-1
read-write
n
0x0
0x0
DR2R
GPIO 2-mA Drive Select
0x500
-1
read-write
n
0x0
0x0
DR4R
GPIO 4-mA Drive Select
0x504
-1
read-write
n
0x0
0x0
DR8R
GPIO 8-mA Drive Select
0x508
-1
read-write
n
0x0
0x0
GPIOAADCCTL
GPIO ADC Control
0x530
read-write
n
0x0
0x0
GPIOAAFSEL
GPIO Alternate Function Select
0x420
read-write
n
0x0
0x0
GPIOAAMSEL
GPIO Analog Mode Select
0x528
read-write
n
0x0
0x0
GPIOACR
GPIO Commit
0x524
read-write
n
0x0
0x0
GPIOADATA
GPIO Data
0x3FC
read-write
n
0x0
0x0
GPIOADEN
GPIO Digital Enable
0x51C
read-write
n
0x0
0x0
GPIOADIR
GPIO Direction
0x400
read-write
n
0x0
0x0
GPIOADMACTL
GPIO DMA Control
0x534
read-write
n
0x0
0x0
GPIOADR2R
GPIO 2-mA Drive Select
0x500
read-write
n
0x0
0x0
GPIOADR4R
GPIO 4-mA Drive Select
0x504
read-write
n
0x0
0x0
GPIOADR8R
GPIO 8-mA Drive Select
0x508
read-write
n
0x0
0x0
GPIOAIBE
GPIO Interrupt Both Edges
0x408
read-write
n
0x0
0x0
GPIOAICR
GPIO Interrupt Clear
0x41C
write-only
n
0x0
0x0
GPIO_ICR_GPIO
GPIO Interrupt Clear
0
8
write-only
GPIOAIEV
GPIO Interrupt Event
0x40C
read-write
n
0x0
0x0
GPIOAIM
GPIO Interrupt Mask
0x410
read-write
n
0x0
0x0
GPIO_IM_GPIO
GPIO Interrupt Mask Enable
0
8
GPIOAIS
GPIO Interrupt Sense
0x404
read-write
n
0x0
0x0
GPIOALOCK
GPIO Lock
0x520
read-write
n
0x0
0x0
GPIO_LOCK
GPIO Lock
0
32
GPIO_LOCK_UNLOCKED
The GPIOCR register is unlocked and may be modified
0x0
GPIO_LOCK_LOCKED
The GPIOCR register is locked and may not be modified
0x1
GPIO_LOCK_KEY
Unlocks the GPIO_CR register
0x4c4f434b
GPIOAMIS
GPIO Masked Interrupt Status
0x418
read-write
n
0x0
0x0
GPIO_MIS_GPIO
GPIO Masked Interrupt Status
0
8
GPIOAODR
GPIO Open Drain Select
0x50C
read-write
n
0x0
0x0
GPIOAPCTL
GPIO Port Control
0x52C
read-write
n
0x0
0x0
GPIOAPDR
GPIO Pull-Down Select
0x514
read-write
n
0x0
0x0
GPIOAPUR
GPIO Pull-Up Select
0x510
read-write
n
0x0
0x0
GPIOARIS
GPIO Raw Interrupt Status
0x414
read-write
n
0x0
0x0
GPIO_RIS_GPIO
GPIO Interrupt Raw Status
0
8
GPIOASLR
GPIO Slew Rate Control Select
0x518
read-write
n
0x0
0x0
IBE
GPIO Interrupt Both Edges
0x408
-1
read-write
n
0x0
0x0
ICR
GPIO Interrupt Clear
0x41C
-1
write-only
n
0x0
0x0
GPIO_ICR_GPIO
GPIO Interrupt Clear
0
8
write-only
IEV
GPIO Interrupt Event
0x40C
-1
read-write
n
0x0
0x0
IM
GPIO Interrupt Mask
0x410
-1
read-write
n
0x0
0x0
GPIO_IM_GPIO
GPIO Interrupt Mask Enable
0
8
IS
GPIO Interrupt Sense
0x404
-1
read-write
n
0x0
0x0
LOCK
GPIO Lock
0x520
-1
read-write
n
0x0
0x0
GPIO_LOCK
GPIO Lock
0
32
GPIO_LOCK_UNLOCKED
The GPIOCR register is unlocked and may be modified
0x0
GPIO_LOCK_LOCKED
The GPIOCR register is locked and may not be modified
0x1
GPIO_LOCK_KEY
Unlocks the GPIO_CR register
0x4c4f434b
MIS
GPIO Masked Interrupt Status
0x418
-1
read-write
n
0x0
0x0
GPIO_MIS_GPIO
GPIO Masked Interrupt Status
0
8
ODR
GPIO Open Drain Select
0x50C
-1
read-write
n
0x0
0x0
PCTL
GPIO Port Control
0x52C
-1
read-write
n
0x0
0x0
PDR
GPIO Pull-Down Select
0x514
-1
read-write
n
0x0
0x0
PUR
GPIO Pull-Up Select
0x510
-1
read-write
n
0x0
0x0
RIS
GPIO Raw Interrupt Status
0x414
-1
read-write
n
0x0
0x0
GPIO_RIS_GPIO
GPIO Interrupt Raw Status
0
8
SLR
GPIO Slew Rate Control Select
0x518
-1
read-write
n
0x0
0x0
GPIOC_AHB
Register map for GPIOA peripheral
GPIO
0x0
0x0
0x1000
registers
n
GPIOC
2
ADCCTL
GPIO ADC Control
0x530
-1
read-write
n
0x0
0x0
AFSEL
GPIO Alternate Function Select
0x420
-1
read-write
n
0x0
0x0
AMSEL
GPIO Analog Mode Select
0x528
-1
read-write
n
0x0
0x0
CR
GPIO Commit
0x524
-1
read-write
n
0x0
0x0
DATA
GPIO Data
0x3FC
-1
read-write
n
0x0
0x0
DEN
GPIO Digital Enable
0x51C
-1
read-write
n
0x0
0x0
DIR
GPIO Direction
0x400
-1
read-write
n
0x0
0x0
DMACTL
GPIO DMA Control
0x534
-1
read-write
n
0x0
0x0
DR2R
GPIO 2-mA Drive Select
0x500
-1
read-write
n
0x0
0x0
DR4R
GPIO 4-mA Drive Select
0x504
-1
read-write
n
0x0
0x0
DR8R
GPIO 8-mA Drive Select
0x508
-1
read-write
n
0x0
0x0
GPIOAADCCTL
GPIO ADC Control
0x530
read-write
n
0x0
0x0
GPIOAAFSEL
GPIO Alternate Function Select
0x420
read-write
n
0x0
0x0
GPIOAAMSEL
GPIO Analog Mode Select
0x528
read-write
n
0x0
0x0
GPIOACR
GPIO Commit
0x524
read-write
n
0x0
0x0
GPIOADATA
GPIO Data
0x3FC
read-write
n
0x0
0x0
GPIOADEN
GPIO Digital Enable
0x51C
read-write
n
0x0
0x0
GPIOADIR
GPIO Direction
0x400
read-write
n
0x0
0x0
GPIOADMACTL
GPIO DMA Control
0x534
read-write
n
0x0
0x0
GPIOADR2R
GPIO 2-mA Drive Select
0x500
read-write
n
0x0
0x0
GPIOADR4R
GPIO 4-mA Drive Select
0x504
read-write
n
0x0
0x0
GPIOADR8R
GPIO 8-mA Drive Select
0x508
read-write
n
0x0
0x0
GPIOAIBE
GPIO Interrupt Both Edges
0x408
read-write
n
0x0
0x0
GPIOAICR
GPIO Interrupt Clear
0x41C
write-only
n
0x0
0x0
GPIO_ICR_GPIO
GPIO Interrupt Clear
0
8
write-only
GPIOAIEV
GPIO Interrupt Event
0x40C
read-write
n
0x0
0x0
GPIOAIM
GPIO Interrupt Mask
0x410
read-write
n
0x0
0x0
GPIO_IM_GPIO
GPIO Interrupt Mask Enable
0
8
GPIOAIS
GPIO Interrupt Sense
0x404
read-write
n
0x0
0x0
GPIOALOCK
GPIO Lock
0x520
read-write
n
0x0
0x0
GPIO_LOCK
GPIO Lock
0
32
GPIO_LOCK_UNLOCKED
The GPIOCR register is unlocked and may be modified
0x0
GPIO_LOCK_LOCKED
The GPIOCR register is locked and may not be modified
0x1
GPIO_LOCK_KEY
Unlocks the GPIO_CR register
0x4c4f434b
GPIOAMIS
GPIO Masked Interrupt Status
0x418
read-write
n
0x0
0x0
GPIO_MIS_GPIO
GPIO Masked Interrupt Status
0
8
GPIOAODR
GPIO Open Drain Select
0x50C
read-write
n
0x0
0x0
GPIOAPCTL
GPIO Port Control
0x52C
read-write
n
0x0
0x0
GPIOAPDR
GPIO Pull-Down Select
0x514
read-write
n
0x0
0x0
GPIOAPUR
GPIO Pull-Up Select
0x510
read-write
n
0x0
0x0
GPIOARIS
GPIO Raw Interrupt Status
0x414
read-write
n
0x0
0x0
GPIO_RIS_GPIO
GPIO Interrupt Raw Status
0
8
GPIOASLR
GPIO Slew Rate Control Select
0x518
read-write
n
0x0
0x0
IBE
GPIO Interrupt Both Edges
0x408
-1
read-write
n
0x0
0x0
ICR
GPIO Interrupt Clear
0x41C
-1
write-only
n
0x0
0x0
GPIO_ICR_GPIO
GPIO Interrupt Clear
0
8
write-only
IEV
GPIO Interrupt Event
0x40C
-1
read-write
n
0x0
0x0
IM
GPIO Interrupt Mask
0x410
-1
read-write
n
0x0
0x0
GPIO_IM_GPIO
GPIO Interrupt Mask Enable
0
8
IS
GPIO Interrupt Sense
0x404
-1
read-write
n
0x0
0x0
LOCK
GPIO Lock
0x520
-1
read-write
n
0x0
0x0
GPIO_LOCK
GPIO Lock
0
32
GPIO_LOCK_UNLOCKED
The GPIOCR register is unlocked and may be modified
0x0
GPIO_LOCK_LOCKED
The GPIOCR register is locked and may not be modified
0x1
GPIO_LOCK_KEY
Unlocks the GPIO_CR register
0x4c4f434b
MIS
GPIO Masked Interrupt Status
0x418
-1
read-write
n
0x0
0x0
GPIO_MIS_GPIO
GPIO Masked Interrupt Status
0
8
ODR
GPIO Open Drain Select
0x50C
-1
read-write
n
0x0
0x0
PCTL
GPIO Port Control
0x52C
-1
read-write
n
0x0
0x0
PDR
GPIO Pull-Down Select
0x514
-1
read-write
n
0x0
0x0
PUR
GPIO Pull-Up Select
0x510
-1
read-write
n
0x0
0x0
RIS
GPIO Raw Interrupt Status
0x414
-1
read-write
n
0x0
0x0
GPIO_RIS_GPIO
GPIO Interrupt Raw Status
0
8
SLR
GPIO Slew Rate Control Select
0x518
-1
read-write
n
0x0
0x0
GPIOD
Register map for GPIOA peripheral
GPIO
0x0
0x0
0x1000
registers
n
GPIOD
3
ADCCTL
GPIO ADC Control
0x530
-1
read-write
n
0x0
0x0
AFSEL
GPIO Alternate Function Select
0x420
-1
read-write
n
0x0
0x0
AMSEL
GPIO Analog Mode Select
0x528
-1
read-write
n
0x0
0x0
CR
GPIO Commit
0x524
-1
read-write
n
0x0
0x0
DATA
GPIO Data
0x3FC
-1
read-write
n
0x0
0x0
DEN
GPIO Digital Enable
0x51C
-1
read-write
n
0x0
0x0
DIR
GPIO Direction
0x400
-1
read-write
n
0x0
0x0
DMACTL
GPIO DMA Control
0x534
-1
read-write
n
0x0
0x0
DR2R
GPIO 2-mA Drive Select
0x500
-1
read-write
n
0x0
0x0
DR4R
GPIO 4-mA Drive Select
0x504
-1
read-write
n
0x0
0x0
DR8R
GPIO 8-mA Drive Select
0x508
-1
read-write
n
0x0
0x0
GPIOAADCCTL
GPIO ADC Control
0x530
read-write
n
0x0
0x0
GPIOAAFSEL
GPIO Alternate Function Select
0x420
read-write
n
0x0
0x0
GPIOAAMSEL
GPIO Analog Mode Select
0x528
read-write
n
0x0
0x0
GPIOACR
GPIO Commit
0x524
read-write
n
0x0
0x0
GPIOADATA
GPIO Data
0x3FC
read-write
n
0x0
0x0
GPIOADEN
GPIO Digital Enable
0x51C
read-write
n
0x0
0x0
GPIOADIR
GPIO Direction
0x400
read-write
n
0x0
0x0
GPIOADMACTL
GPIO DMA Control
0x534
read-write
n
0x0
0x0
GPIOADR2R
GPIO 2-mA Drive Select
0x500
read-write
n
0x0
0x0
GPIOADR4R
GPIO 4-mA Drive Select
0x504
read-write
n
0x0
0x0
GPIOADR8R
GPIO 8-mA Drive Select
0x508
read-write
n
0x0
0x0
GPIOAIBE
GPIO Interrupt Both Edges
0x408
read-write
n
0x0
0x0
GPIOAICR
GPIO Interrupt Clear
0x41C
write-only
n
0x0
0x0
GPIO_ICR_GPIO
GPIO Interrupt Clear
0
8
write-only
GPIOAIEV
GPIO Interrupt Event
0x40C
read-write
n
0x0
0x0
GPIOAIM
GPIO Interrupt Mask
0x410
read-write
n
0x0
0x0
GPIO_IM_GPIO
GPIO Interrupt Mask Enable
0
8
GPIOAIS
GPIO Interrupt Sense
0x404
read-write
n
0x0
0x0
GPIOALOCK
GPIO Lock
0x520
read-write
n
0x0
0x0
GPIO_LOCK
GPIO Lock
0
32
GPIO_LOCK_UNLOCKED
The GPIOCR register is unlocked and may be modified
0x0
GPIO_LOCK_LOCKED
The GPIOCR register is locked and may not be modified
0x1
GPIO_LOCK_KEY
Unlocks the GPIO_CR register
0x4c4f434b
GPIOAMIS
GPIO Masked Interrupt Status
0x418
read-write
n
0x0
0x0
GPIO_MIS_GPIO
GPIO Masked Interrupt Status
0
8
GPIOAODR
GPIO Open Drain Select
0x50C
read-write
n
0x0
0x0
GPIOAPCTL
GPIO Port Control
0x52C
read-write
n
0x0
0x0
GPIOAPDR
GPIO Pull-Down Select
0x514
read-write
n
0x0
0x0
GPIOAPUR
GPIO Pull-Up Select
0x510
read-write
n
0x0
0x0
GPIOARIS
GPIO Raw Interrupt Status
0x414
read-write
n
0x0
0x0
GPIO_RIS_GPIO
GPIO Interrupt Raw Status
0
8
GPIOASLR
GPIO Slew Rate Control Select
0x518
read-write
n
0x0
0x0
IBE
GPIO Interrupt Both Edges
0x408
-1
read-write
n
0x0
0x0
ICR
GPIO Interrupt Clear
0x41C
-1
write-only
n
0x0
0x0
GPIO_ICR_GPIO
GPIO Interrupt Clear
0
8
write-only
IEV
GPIO Interrupt Event
0x40C
-1
read-write
n
0x0
0x0
IM
GPIO Interrupt Mask
0x410
-1
read-write
n
0x0
0x0
GPIO_IM_GPIO
GPIO Interrupt Mask Enable
0
8
IS
GPIO Interrupt Sense
0x404
-1
read-write
n
0x0
0x0
LOCK
GPIO Lock
0x520
-1
read-write
n
0x0
0x0
GPIO_LOCK
GPIO Lock
0
32
GPIO_LOCK_UNLOCKED
The GPIOCR register is unlocked and may be modified
0x0
GPIO_LOCK_LOCKED
The GPIOCR register is locked and may not be modified
0x1
GPIO_LOCK_KEY
Unlocks the GPIO_CR register
0x4c4f434b
MIS
GPIO Masked Interrupt Status
0x418
-1
read-write
n
0x0
0x0
GPIO_MIS_GPIO
GPIO Masked Interrupt Status
0
8
ODR
GPIO Open Drain Select
0x50C
-1
read-write
n
0x0
0x0
PCTL
GPIO Port Control
0x52C
-1
read-write
n
0x0
0x0
PDR
GPIO Pull-Down Select
0x514
-1
read-write
n
0x0
0x0
PUR
GPIO Pull-Up Select
0x510
-1
read-write
n
0x0
0x0
RIS
GPIO Raw Interrupt Status
0x414
-1
read-write
n
0x0
0x0
GPIO_RIS_GPIO
GPIO Interrupt Raw Status
0
8
SLR
GPIO Slew Rate Control Select
0x518
-1
read-write
n
0x0
0x0
GPIOD_AHB
Register map for GPIOA peripheral
GPIO
0x0
0x0
0x1000
registers
n
GPIOD
3
ADCCTL
GPIO ADC Control
0x530
-1
read-write
n
0x0
0x0
AFSEL
GPIO Alternate Function Select
0x420
-1
read-write
n
0x0
0x0
AMSEL
GPIO Analog Mode Select
0x528
-1
read-write
n
0x0
0x0
CR
GPIO Commit
0x524
-1
read-write
n
0x0
0x0
DATA
GPIO Data
0x3FC
-1
read-write
n
0x0
0x0
DEN
GPIO Digital Enable
0x51C
-1
read-write
n
0x0
0x0
DIR
GPIO Direction
0x400
-1
read-write
n
0x0
0x0
DMACTL
GPIO DMA Control
0x534
-1
read-write
n
0x0
0x0
DR2R
GPIO 2-mA Drive Select
0x500
-1
read-write
n
0x0
0x0
DR4R
GPIO 4-mA Drive Select
0x504
-1
read-write
n
0x0
0x0
DR8R
GPIO 8-mA Drive Select
0x508
-1
read-write
n
0x0
0x0
GPIOAADCCTL
GPIO ADC Control
0x530
read-write
n
0x0
0x0
GPIOAAFSEL
GPIO Alternate Function Select
0x420
read-write
n
0x0
0x0
GPIOAAMSEL
GPIO Analog Mode Select
0x528
read-write
n
0x0
0x0
GPIOACR
GPIO Commit
0x524
read-write
n
0x0
0x0
GPIOADATA
GPIO Data
0x3FC
read-write
n
0x0
0x0
GPIOADEN
GPIO Digital Enable
0x51C
read-write
n
0x0
0x0
GPIOADIR
GPIO Direction
0x400
read-write
n
0x0
0x0
GPIOADMACTL
GPIO DMA Control
0x534
read-write
n
0x0
0x0
GPIOADR2R
GPIO 2-mA Drive Select
0x500
read-write
n
0x0
0x0
GPIOADR4R
GPIO 4-mA Drive Select
0x504
read-write
n
0x0
0x0
GPIOADR8R
GPIO 8-mA Drive Select
0x508
read-write
n
0x0
0x0
GPIOAIBE
GPIO Interrupt Both Edges
0x408
read-write
n
0x0
0x0
GPIOAICR
GPIO Interrupt Clear
0x41C
write-only
n
0x0
0x0
GPIO_ICR_GPIO
GPIO Interrupt Clear
0
8
write-only
GPIOAIEV
GPIO Interrupt Event
0x40C
read-write
n
0x0
0x0
GPIOAIM
GPIO Interrupt Mask
0x410
read-write
n
0x0
0x0
GPIO_IM_GPIO
GPIO Interrupt Mask Enable
0
8
GPIOAIS
GPIO Interrupt Sense
0x404
read-write
n
0x0
0x0
GPIOALOCK
GPIO Lock
0x520
read-write
n
0x0
0x0
GPIO_LOCK
GPIO Lock
0
32
GPIO_LOCK_UNLOCKED
The GPIOCR register is unlocked and may be modified
0x0
GPIO_LOCK_LOCKED
The GPIOCR register is locked and may not be modified
0x1
GPIO_LOCK_KEY
Unlocks the GPIO_CR register
0x4c4f434b
GPIOAMIS
GPIO Masked Interrupt Status
0x418
read-write
n
0x0
0x0
GPIO_MIS_GPIO
GPIO Masked Interrupt Status
0
8
GPIOAODR
GPIO Open Drain Select
0x50C
read-write
n
0x0
0x0
GPIOAPCTL
GPIO Port Control
0x52C
read-write
n
0x0
0x0
GPIOAPDR
GPIO Pull-Down Select
0x514
read-write
n
0x0
0x0
GPIOAPUR
GPIO Pull-Up Select
0x510
read-write
n
0x0
0x0
GPIOARIS
GPIO Raw Interrupt Status
0x414
read-write
n
0x0
0x0
GPIO_RIS_GPIO
GPIO Interrupt Raw Status
0
8
GPIOASLR
GPIO Slew Rate Control Select
0x518
read-write
n
0x0
0x0
IBE
GPIO Interrupt Both Edges
0x408
-1
read-write
n
0x0
0x0
ICR
GPIO Interrupt Clear
0x41C
-1
write-only
n
0x0
0x0
GPIO_ICR_GPIO
GPIO Interrupt Clear
0
8
write-only
IEV
GPIO Interrupt Event
0x40C
-1
read-write
n
0x0
0x0
IM
GPIO Interrupt Mask
0x410
-1
read-write
n
0x0
0x0
GPIO_IM_GPIO
GPIO Interrupt Mask Enable
0
8
IS
GPIO Interrupt Sense
0x404
-1
read-write
n
0x0
0x0
LOCK
GPIO Lock
0x520
-1
read-write
n
0x0
0x0
GPIO_LOCK
GPIO Lock
0
32
GPIO_LOCK_UNLOCKED
The GPIOCR register is unlocked and may be modified
0x0
GPIO_LOCK_LOCKED
The GPIOCR register is locked and may not be modified
0x1
GPIO_LOCK_KEY
Unlocks the GPIO_CR register
0x4c4f434b
MIS
GPIO Masked Interrupt Status
0x418
-1
read-write
n
0x0
0x0
GPIO_MIS_GPIO
GPIO Masked Interrupt Status
0
8
ODR
GPIO Open Drain Select
0x50C
-1
read-write
n
0x0
0x0
PCTL
GPIO Port Control
0x52C
-1
read-write
n
0x0
0x0
PDR
GPIO Pull-Down Select
0x514
-1
read-write
n
0x0
0x0
PUR
GPIO Pull-Up Select
0x510
-1
read-write
n
0x0
0x0
RIS
GPIO Raw Interrupt Status
0x414
-1
read-write
n
0x0
0x0
GPIO_RIS_GPIO
GPIO Interrupt Raw Status
0
8
SLR
GPIO Slew Rate Control Select
0x518
-1
read-write
n
0x0
0x0
GPIOE
Register map for GPIOA peripheral
GPIO
0x0
0x0
0x1000
registers
n
GPIOE
4
ADCCTL
GPIO ADC Control
0x530
-1
read-write
n
0x0
0x0
AFSEL
GPIO Alternate Function Select
0x420
-1
read-write
n
0x0
0x0
AMSEL
GPIO Analog Mode Select
0x528
-1
read-write
n
0x0
0x0
CR
GPIO Commit
0x524
-1
read-write
n
0x0
0x0
DATA
GPIO Data
0x3FC
-1
read-write
n
0x0
0x0
DEN
GPIO Digital Enable
0x51C
-1
read-write
n
0x0
0x0
DIR
GPIO Direction
0x400
-1
read-write
n
0x0
0x0
DMACTL
GPIO DMA Control
0x534
-1
read-write
n
0x0
0x0
DR2R
GPIO 2-mA Drive Select
0x500
-1
read-write
n
0x0
0x0
DR4R
GPIO 4-mA Drive Select
0x504
-1
read-write
n
0x0
0x0
DR8R
GPIO 8-mA Drive Select
0x508
-1
read-write
n
0x0
0x0
GPIOAADCCTL
GPIO ADC Control
0x530
read-write
n
0x0
0x0
GPIOAAFSEL
GPIO Alternate Function Select
0x420
read-write
n
0x0
0x0
GPIOAAMSEL
GPIO Analog Mode Select
0x528
read-write
n
0x0
0x0
GPIOACR
GPIO Commit
0x524
read-write
n
0x0
0x0
GPIOADATA
GPIO Data
0x3FC
read-write
n
0x0
0x0
GPIOADEN
GPIO Digital Enable
0x51C
read-write
n
0x0
0x0
GPIOADIR
GPIO Direction
0x400
read-write
n
0x0
0x0
GPIOADMACTL
GPIO DMA Control
0x534
read-write
n
0x0
0x0
GPIOADR2R
GPIO 2-mA Drive Select
0x500
read-write
n
0x0
0x0
GPIOADR4R
GPIO 4-mA Drive Select
0x504
read-write
n
0x0
0x0
GPIOADR8R
GPIO 8-mA Drive Select
0x508
read-write
n
0x0
0x0
GPIOAIBE
GPIO Interrupt Both Edges
0x408
read-write
n
0x0
0x0
GPIOAICR
GPIO Interrupt Clear
0x41C
write-only
n
0x0
0x0
GPIO_ICR_GPIO
GPIO Interrupt Clear
0
8
write-only
GPIOAIEV
GPIO Interrupt Event
0x40C
read-write
n
0x0
0x0
GPIOAIM
GPIO Interrupt Mask
0x410
read-write
n
0x0
0x0
GPIO_IM_GPIO
GPIO Interrupt Mask Enable
0
8
GPIOAIS
GPIO Interrupt Sense
0x404
read-write
n
0x0
0x0
GPIOALOCK
GPIO Lock
0x520
read-write
n
0x0
0x0
GPIO_LOCK
GPIO Lock
0
32
GPIO_LOCK_UNLOCKED
The GPIOCR register is unlocked and may be modified
0x0
GPIO_LOCK_LOCKED
The GPIOCR register is locked and may not be modified
0x1
GPIO_LOCK_KEY
Unlocks the GPIO_CR register
0x4c4f434b
GPIOAMIS
GPIO Masked Interrupt Status
0x418
read-write
n
0x0
0x0
GPIO_MIS_GPIO
GPIO Masked Interrupt Status
0
8
GPIOAODR
GPIO Open Drain Select
0x50C
read-write
n
0x0
0x0
GPIOAPCTL
GPIO Port Control
0x52C
read-write
n
0x0
0x0
GPIOAPDR
GPIO Pull-Down Select
0x514
read-write
n
0x0
0x0
GPIOAPUR
GPIO Pull-Up Select
0x510
read-write
n
0x0
0x0
GPIOARIS
GPIO Raw Interrupt Status
0x414
read-write
n
0x0
0x0
GPIO_RIS_GPIO
GPIO Interrupt Raw Status
0
8
GPIOASLR
GPIO Slew Rate Control Select
0x518
read-write
n
0x0
0x0
IBE
GPIO Interrupt Both Edges
0x408
-1
read-write
n
0x0
0x0
ICR
GPIO Interrupt Clear
0x41C
-1
write-only
n
0x0
0x0
GPIO_ICR_GPIO
GPIO Interrupt Clear
0
8
write-only
IEV
GPIO Interrupt Event
0x40C
-1
read-write
n
0x0
0x0
IM
GPIO Interrupt Mask
0x410
-1
read-write
n
0x0
0x0
GPIO_IM_GPIO
GPIO Interrupt Mask Enable
0
8
IS
GPIO Interrupt Sense
0x404
-1
read-write
n
0x0
0x0
LOCK
GPIO Lock
0x520
-1
read-write
n
0x0
0x0
GPIO_LOCK
GPIO Lock
0
32
GPIO_LOCK_UNLOCKED
The GPIOCR register is unlocked and may be modified
0x0
GPIO_LOCK_LOCKED
The GPIOCR register is locked and may not be modified
0x1
GPIO_LOCK_KEY
Unlocks the GPIO_CR register
0x4c4f434b
MIS
GPIO Masked Interrupt Status
0x418
-1
read-write
n
0x0
0x0
GPIO_MIS_GPIO
GPIO Masked Interrupt Status
0
8
ODR
GPIO Open Drain Select
0x50C
-1
read-write
n
0x0
0x0
PCTL
GPIO Port Control
0x52C
-1
read-write
n
0x0
0x0
PDR
GPIO Pull-Down Select
0x514
-1
read-write
n
0x0
0x0
PUR
GPIO Pull-Up Select
0x510
-1
read-write
n
0x0
0x0
RIS
GPIO Raw Interrupt Status
0x414
-1
read-write
n
0x0
0x0
GPIO_RIS_GPIO
GPIO Interrupt Raw Status
0
8
SLR
GPIO Slew Rate Control Select
0x518
-1
read-write
n
0x0
0x0
GPIOE_AHB
Register map for GPIOA peripheral
GPIO
0x0
0x0
0x1000
registers
n
GPIOE
4
ADCCTL
GPIO ADC Control
0x530
-1
read-write
n
0x0
0x0
AFSEL
GPIO Alternate Function Select
0x420
-1
read-write
n
0x0
0x0
AMSEL
GPIO Analog Mode Select
0x528
-1
read-write
n
0x0
0x0
CR
GPIO Commit
0x524
-1
read-write
n
0x0
0x0
DATA
GPIO Data
0x3FC
-1
read-write
n
0x0
0x0
DEN
GPIO Digital Enable
0x51C
-1
read-write
n
0x0
0x0
DIR
GPIO Direction
0x400
-1
read-write
n
0x0
0x0
DMACTL
GPIO DMA Control
0x534
-1
read-write
n
0x0
0x0
DR2R
GPIO 2-mA Drive Select
0x500
-1
read-write
n
0x0
0x0
DR4R
GPIO 4-mA Drive Select
0x504
-1
read-write
n
0x0
0x0
DR8R
GPIO 8-mA Drive Select
0x508
-1
read-write
n
0x0
0x0
GPIOAADCCTL
GPIO ADC Control
0x530
read-write
n
0x0
0x0
GPIOAAFSEL
GPIO Alternate Function Select
0x420
read-write
n
0x0
0x0
GPIOAAMSEL
GPIO Analog Mode Select
0x528
read-write
n
0x0
0x0
GPIOACR
GPIO Commit
0x524
read-write
n
0x0
0x0
GPIOADATA
GPIO Data
0x3FC
read-write
n
0x0
0x0
GPIOADEN
GPIO Digital Enable
0x51C
read-write
n
0x0
0x0
GPIOADIR
GPIO Direction
0x400
read-write
n
0x0
0x0
GPIOADMACTL
GPIO DMA Control
0x534
read-write
n
0x0
0x0
GPIOADR2R
GPIO 2-mA Drive Select
0x500
read-write
n
0x0
0x0
GPIOADR4R
GPIO 4-mA Drive Select
0x504
read-write
n
0x0
0x0
GPIOADR8R
GPIO 8-mA Drive Select
0x508
read-write
n
0x0
0x0
GPIOAIBE
GPIO Interrupt Both Edges
0x408
read-write
n
0x0
0x0
GPIOAICR
GPIO Interrupt Clear
0x41C
write-only
n
0x0
0x0
GPIO_ICR_GPIO
GPIO Interrupt Clear
0
8
write-only
GPIOAIEV
GPIO Interrupt Event
0x40C
read-write
n
0x0
0x0
GPIOAIM
GPIO Interrupt Mask
0x410
read-write
n
0x0
0x0
GPIO_IM_GPIO
GPIO Interrupt Mask Enable
0
8
GPIOAIS
GPIO Interrupt Sense
0x404
read-write
n
0x0
0x0
GPIOALOCK
GPIO Lock
0x520
read-write
n
0x0
0x0
GPIO_LOCK
GPIO Lock
0
32
GPIO_LOCK_UNLOCKED
The GPIOCR register is unlocked and may be modified
0x0
GPIO_LOCK_LOCKED
The GPIOCR register is locked and may not be modified
0x1
GPIO_LOCK_KEY
Unlocks the GPIO_CR register
0x4c4f434b
GPIOAMIS
GPIO Masked Interrupt Status
0x418
read-write
n
0x0
0x0
GPIO_MIS_GPIO
GPIO Masked Interrupt Status
0
8
GPIOAODR
GPIO Open Drain Select
0x50C
read-write
n
0x0
0x0
GPIOAPCTL
GPIO Port Control
0x52C
read-write
n
0x0
0x0
GPIOAPDR
GPIO Pull-Down Select
0x514
read-write
n
0x0
0x0
GPIOAPUR
GPIO Pull-Up Select
0x510
read-write
n
0x0
0x0
GPIOARIS
GPIO Raw Interrupt Status
0x414
read-write
n
0x0
0x0
GPIO_RIS_GPIO
GPIO Interrupt Raw Status
0
8
GPIOASLR
GPIO Slew Rate Control Select
0x518
read-write
n
0x0
0x0
IBE
GPIO Interrupt Both Edges
0x408
-1
read-write
n
0x0
0x0
ICR
GPIO Interrupt Clear
0x41C
-1
write-only
n
0x0
0x0
GPIO_ICR_GPIO
GPIO Interrupt Clear
0
8
write-only
IEV
GPIO Interrupt Event
0x40C
-1
read-write
n
0x0
0x0
IM
GPIO Interrupt Mask
0x410
-1
read-write
n
0x0
0x0
GPIO_IM_GPIO
GPIO Interrupt Mask Enable
0
8
IS
GPIO Interrupt Sense
0x404
-1
read-write
n
0x0
0x0
LOCK
GPIO Lock
0x520
-1
read-write
n
0x0
0x0
GPIO_LOCK
GPIO Lock
0
32
GPIO_LOCK_UNLOCKED
The GPIOCR register is unlocked and may be modified
0x0
GPIO_LOCK_LOCKED
The GPIOCR register is locked and may not be modified
0x1
GPIO_LOCK_KEY
Unlocks the GPIO_CR register
0x4c4f434b
MIS
GPIO Masked Interrupt Status
0x418
-1
read-write
n
0x0
0x0
GPIO_MIS_GPIO
GPIO Masked Interrupt Status
0
8
ODR
GPIO Open Drain Select
0x50C
-1
read-write
n
0x0
0x0
PCTL
GPIO Port Control
0x52C
-1
read-write
n
0x0
0x0
PDR
GPIO Pull-Down Select
0x514
-1
read-write
n
0x0
0x0
PUR
GPIO Pull-Up Select
0x510
-1
read-write
n
0x0
0x0
RIS
GPIO Raw Interrupt Status
0x414
-1
read-write
n
0x0
0x0
GPIO_RIS_GPIO
GPIO Interrupt Raw Status
0
8
SLR
GPIO Slew Rate Control Select
0x518
-1
read-write
n
0x0
0x0
GPIOF
Register map for GPIOA peripheral
GPIO
0x0
0x0
0x1000
registers
n
GPIOF
30
ADCCTL
GPIO ADC Control
0x530
-1
read-write
n
0x0
0x0
AFSEL
GPIO Alternate Function Select
0x420
-1
read-write
n
0x0
0x0
AMSEL
GPIO Analog Mode Select
0x528
-1
read-write
n
0x0
0x0
CR
GPIO Commit
0x524
-1
read-write
n
0x0
0x0
DATA
GPIO Data
0x3FC
-1
read-write
n
0x0
0x0
DEN
GPIO Digital Enable
0x51C
-1
read-write
n
0x0
0x0
DIR
GPIO Direction
0x400
-1
read-write
n
0x0
0x0
DMACTL
GPIO DMA Control
0x534
-1
read-write
n
0x0
0x0
DR2R
GPIO 2-mA Drive Select
0x500
-1
read-write
n
0x0
0x0
DR4R
GPIO 4-mA Drive Select
0x504
-1
read-write
n
0x0
0x0
DR8R
GPIO 8-mA Drive Select
0x508
-1
read-write
n
0x0
0x0
GPIOAADCCTL
GPIO ADC Control
0x530
read-write
n
0x0
0x0
GPIOAAFSEL
GPIO Alternate Function Select
0x420
read-write
n
0x0
0x0
GPIOAAMSEL
GPIO Analog Mode Select
0x528
read-write
n
0x0
0x0
GPIOACR
GPIO Commit
0x524
read-write
n
0x0
0x0
GPIOADATA
GPIO Data
0x3FC
read-write
n
0x0
0x0
GPIOADEN
GPIO Digital Enable
0x51C
read-write
n
0x0
0x0
GPIOADIR
GPIO Direction
0x400
read-write
n
0x0
0x0
GPIOADMACTL
GPIO DMA Control
0x534
read-write
n
0x0
0x0
GPIOADR2R
GPIO 2-mA Drive Select
0x500
read-write
n
0x0
0x0
GPIOADR4R
GPIO 4-mA Drive Select
0x504
read-write
n
0x0
0x0
GPIOADR8R
GPIO 8-mA Drive Select
0x508
read-write
n
0x0
0x0
GPIOAIBE
GPIO Interrupt Both Edges
0x408
read-write
n
0x0
0x0
GPIOAICR
GPIO Interrupt Clear
0x41C
write-only
n
0x0
0x0
GPIO_ICR_GPIO
GPIO Interrupt Clear
0
8
write-only
GPIOAIEV
GPIO Interrupt Event
0x40C
read-write
n
0x0
0x0
GPIOAIM
GPIO Interrupt Mask
0x410
read-write
n
0x0
0x0
GPIO_IM_GPIO
GPIO Interrupt Mask Enable
0
8
GPIOAIS
GPIO Interrupt Sense
0x404
read-write
n
0x0
0x0
GPIOALOCK
GPIO Lock
0x520
read-write
n
0x0
0x0
GPIO_LOCK
GPIO Lock
0
32
GPIO_LOCK_UNLOCKED
The GPIOCR register is unlocked and may be modified
0x0
GPIO_LOCK_LOCKED
The GPIOCR register is locked and may not be modified
0x1
GPIO_LOCK_KEY
Unlocks the GPIO_CR register
0x4c4f434b
GPIOAMIS
GPIO Masked Interrupt Status
0x418
read-write
n
0x0
0x0
GPIO_MIS_GPIO
GPIO Masked Interrupt Status
0
8
GPIOAODR
GPIO Open Drain Select
0x50C
read-write
n
0x0
0x0
GPIOAPCTL
GPIO Port Control
0x52C
read-write
n
0x0
0x0
GPIOAPDR
GPIO Pull-Down Select
0x514
read-write
n
0x0
0x0
GPIOAPUR
GPIO Pull-Up Select
0x510
read-write
n
0x0
0x0
GPIOARIS
GPIO Raw Interrupt Status
0x414
read-write
n
0x0
0x0
GPIO_RIS_GPIO
GPIO Interrupt Raw Status
0
8
GPIOASLR
GPIO Slew Rate Control Select
0x518
read-write
n
0x0
0x0
IBE
GPIO Interrupt Both Edges
0x408
-1
read-write
n
0x0
0x0
ICR
GPIO Interrupt Clear
0x41C
-1
write-only
n
0x0
0x0
GPIO_ICR_GPIO
GPIO Interrupt Clear
0
8
write-only
IEV
GPIO Interrupt Event
0x40C
-1
read-write
n
0x0
0x0
IM
GPIO Interrupt Mask
0x410
-1
read-write
n
0x0
0x0
GPIO_IM_GPIO
GPIO Interrupt Mask Enable
0
8
IS
GPIO Interrupt Sense
0x404
-1
read-write
n
0x0
0x0
LOCK
GPIO Lock
0x520
-1
read-write
n
0x0
0x0
GPIO_LOCK
GPIO Lock
0
32
GPIO_LOCK_UNLOCKED
The GPIOCR register is unlocked and may be modified
0x0
GPIO_LOCK_LOCKED
The GPIOCR register is locked and may not be modified
0x1
GPIO_LOCK_KEY
Unlocks the GPIO_CR register
0x4c4f434b
MIS
GPIO Masked Interrupt Status
0x418
-1
read-write
n
0x0
0x0
GPIO_MIS_GPIO
GPIO Masked Interrupt Status
0
8
ODR
GPIO Open Drain Select
0x50C
-1
read-write
n
0x0
0x0
PCTL
GPIO Port Control
0x52C
-1
read-write
n
0x0
0x0
PDR
GPIO Pull-Down Select
0x514
-1
read-write
n
0x0
0x0
PUR
GPIO Pull-Up Select
0x510
-1
read-write
n
0x0
0x0
RIS
GPIO Raw Interrupt Status
0x414
-1
read-write
n
0x0
0x0
GPIO_RIS_GPIO
GPIO Interrupt Raw Status
0
8
SLR
GPIO Slew Rate Control Select
0x518
-1
read-write
n
0x0
0x0
GPIOF_AHB
Register map for GPIOA peripheral
GPIO
0x0
0x0
0x1000
registers
n
GPIOF
30
ADCCTL
GPIO ADC Control
0x530
-1
read-write
n
0x0
0x0
AFSEL
GPIO Alternate Function Select
0x420
-1
read-write
n
0x0
0x0
AMSEL
GPIO Analog Mode Select
0x528
-1
read-write
n
0x0
0x0
CR
GPIO Commit
0x524
-1
read-write
n
0x0
0x0
DATA
GPIO Data
0x3FC
-1
read-write
n
0x0
0x0
DEN
GPIO Digital Enable
0x51C
-1
read-write
n
0x0
0x0
DIR
GPIO Direction
0x400
-1
read-write
n
0x0
0x0
DMACTL
GPIO DMA Control
0x534
-1
read-write
n
0x0
0x0
DR2R
GPIO 2-mA Drive Select
0x500
-1
read-write
n
0x0
0x0
DR4R
GPIO 4-mA Drive Select
0x504
-1
read-write
n
0x0
0x0
DR8R
GPIO 8-mA Drive Select
0x508
-1
read-write
n
0x0
0x0
GPIOAADCCTL
GPIO ADC Control
0x530
read-write
n
0x0
0x0
GPIOAAFSEL
GPIO Alternate Function Select
0x420
read-write
n
0x0
0x0
GPIOAAMSEL
GPIO Analog Mode Select
0x528
read-write
n
0x0
0x0
GPIOACR
GPIO Commit
0x524
read-write
n
0x0
0x0
GPIOADATA
GPIO Data
0x3FC
read-write
n
0x0
0x0
GPIOADEN
GPIO Digital Enable
0x51C
read-write
n
0x0
0x0
GPIOADIR
GPIO Direction
0x400
read-write
n
0x0
0x0
GPIOADMACTL
GPIO DMA Control
0x534
read-write
n
0x0
0x0
GPIOADR2R
GPIO 2-mA Drive Select
0x500
read-write
n
0x0
0x0
GPIOADR4R
GPIO 4-mA Drive Select
0x504
read-write
n
0x0
0x0
GPIOADR8R
GPIO 8-mA Drive Select
0x508
read-write
n
0x0
0x0
GPIOAIBE
GPIO Interrupt Both Edges
0x408
read-write
n
0x0
0x0
GPIOAICR
GPIO Interrupt Clear
0x41C
write-only
n
0x0
0x0
GPIO_ICR_GPIO
GPIO Interrupt Clear
0
8
write-only
GPIOAIEV
GPIO Interrupt Event
0x40C
read-write
n
0x0
0x0
GPIOAIM
GPIO Interrupt Mask
0x410
read-write
n
0x0
0x0
GPIO_IM_GPIO
GPIO Interrupt Mask Enable
0
8
GPIOAIS
GPIO Interrupt Sense
0x404
read-write
n
0x0
0x0
GPIOALOCK
GPIO Lock
0x520
read-write
n
0x0
0x0
GPIO_LOCK
GPIO Lock
0
32
GPIO_LOCK_UNLOCKED
The GPIOCR register is unlocked and may be modified
0x0
GPIO_LOCK_LOCKED
The GPIOCR register is locked and may not be modified
0x1
GPIO_LOCK_KEY
Unlocks the GPIO_CR register
0x4c4f434b
GPIOAMIS
GPIO Masked Interrupt Status
0x418
read-write
n
0x0
0x0
GPIO_MIS_GPIO
GPIO Masked Interrupt Status
0
8
GPIOAODR
GPIO Open Drain Select
0x50C
read-write
n
0x0
0x0
GPIOAPCTL
GPIO Port Control
0x52C
read-write
n
0x0
0x0
GPIOAPDR
GPIO Pull-Down Select
0x514
read-write
n
0x0
0x0
GPIOAPUR
GPIO Pull-Up Select
0x510
read-write
n
0x0
0x0
GPIOARIS
GPIO Raw Interrupt Status
0x414
read-write
n
0x0
0x0
GPIO_RIS_GPIO
GPIO Interrupt Raw Status
0
8
GPIOASLR
GPIO Slew Rate Control Select
0x518
read-write
n
0x0
0x0
IBE
GPIO Interrupt Both Edges
0x408
-1
read-write
n
0x0
0x0
ICR
GPIO Interrupt Clear
0x41C
-1
write-only
n
0x0
0x0
GPIO_ICR_GPIO
GPIO Interrupt Clear
0
8
write-only
IEV
GPIO Interrupt Event
0x40C
-1
read-write
n
0x0
0x0
IM
GPIO Interrupt Mask
0x410
-1
read-write
n
0x0
0x0
GPIO_IM_GPIO
GPIO Interrupt Mask Enable
0
8
IS
GPIO Interrupt Sense
0x404
-1
read-write
n
0x0
0x0
LOCK
GPIO Lock
0x520
-1
read-write
n
0x0
0x0
GPIO_LOCK
GPIO Lock
0
32
GPIO_LOCK_UNLOCKED
The GPIOCR register is unlocked and may be modified
0x0
GPIO_LOCK_LOCKED
The GPIOCR register is locked and may not be modified
0x1
GPIO_LOCK_KEY
Unlocks the GPIO_CR register
0x4c4f434b
MIS
GPIO Masked Interrupt Status
0x418
-1
read-write
n
0x0
0x0
GPIO_MIS_GPIO
GPIO Masked Interrupt Status
0
8
ODR
GPIO Open Drain Select
0x50C
-1
read-write
n
0x0
0x0
PCTL
GPIO Port Control
0x52C
-1
read-write
n
0x0
0x0
PDR
GPIO Pull-Down Select
0x514
-1
read-write
n
0x0
0x0
PUR
GPIO Pull-Up Select
0x510
-1
read-write
n
0x0
0x0
RIS
GPIO Raw Interrupt Status
0x414
-1
read-write
n
0x0
0x0
GPIO_RIS_GPIO
GPIO Interrupt Raw Status
0
8
SLR
GPIO Slew Rate Control Select
0x518
-1
read-write
n
0x0
0x0
GPIOG
Register map for GPIOA peripheral
GPIO
0x0
0x0
0x1000
registers
n
GPIOG
31
ADCCTL
GPIO ADC Control
0x530
-1
read-write
n
0x0
0x0
AFSEL
GPIO Alternate Function Select
0x420
-1
read-write
n
0x0
0x0
AMSEL
GPIO Analog Mode Select
0x528
-1
read-write
n
0x0
0x0
CR
GPIO Commit
0x524
-1
read-write
n
0x0
0x0
DATA
GPIO Data
0x3FC
-1
read-write
n
0x0
0x0
DEN
GPIO Digital Enable
0x51C
-1
read-write
n
0x0
0x0
DIR
GPIO Direction
0x400
-1
read-write
n
0x0
0x0
DMACTL
GPIO DMA Control
0x534
-1
read-write
n
0x0
0x0
DR2R
GPIO 2-mA Drive Select
0x500
-1
read-write
n
0x0
0x0
DR4R
GPIO 4-mA Drive Select
0x504
-1
read-write
n
0x0
0x0
DR8R
GPIO 8-mA Drive Select
0x508
-1
read-write
n
0x0
0x0
GPIOAADCCTL
GPIO ADC Control
0x530
read-write
n
0x0
0x0
GPIOAAFSEL
GPIO Alternate Function Select
0x420
read-write
n
0x0
0x0
GPIOAAMSEL
GPIO Analog Mode Select
0x528
read-write
n
0x0
0x0
GPIOACR
GPIO Commit
0x524
read-write
n
0x0
0x0
GPIOADATA
GPIO Data
0x3FC
read-write
n
0x0
0x0
GPIOADEN
GPIO Digital Enable
0x51C
read-write
n
0x0
0x0
GPIOADIR
GPIO Direction
0x400
read-write
n
0x0
0x0
GPIOADMACTL
GPIO DMA Control
0x534
read-write
n
0x0
0x0
GPIOADR2R
GPIO 2-mA Drive Select
0x500
read-write
n
0x0
0x0
GPIOADR4R
GPIO 4-mA Drive Select
0x504
read-write
n
0x0
0x0
GPIOADR8R
GPIO 8-mA Drive Select
0x508
read-write
n
0x0
0x0
GPIOAIBE
GPIO Interrupt Both Edges
0x408
read-write
n
0x0
0x0
GPIOAICR
GPIO Interrupt Clear
0x41C
write-only
n
0x0
0x0
GPIO_ICR_GPIO
GPIO Interrupt Clear
0
8
write-only
GPIOAIEV
GPIO Interrupt Event
0x40C
read-write
n
0x0
0x0
GPIOAIM
GPIO Interrupt Mask
0x410
read-write
n
0x0
0x0
GPIO_IM_GPIO
GPIO Interrupt Mask Enable
0
8
GPIOAIS
GPIO Interrupt Sense
0x404
read-write
n
0x0
0x0
GPIOALOCK
GPIO Lock
0x520
read-write
n
0x0
0x0
GPIO_LOCK
GPIO Lock
0
32
GPIO_LOCK_UNLOCKED
The GPIOCR register is unlocked and may be modified
0x0
GPIO_LOCK_LOCKED
The GPIOCR register is locked and may not be modified
0x1
GPIO_LOCK_KEY
Unlocks the GPIO_CR register
0x4c4f434b
GPIOAMIS
GPIO Masked Interrupt Status
0x418
read-write
n
0x0
0x0
GPIO_MIS_GPIO
GPIO Masked Interrupt Status
0
8
GPIOAODR
GPIO Open Drain Select
0x50C
read-write
n
0x0
0x0
GPIOAPCTL
GPIO Port Control
0x52C
read-write
n
0x0
0x0
GPIOAPDR
GPIO Pull-Down Select
0x514
read-write
n
0x0
0x0
GPIOAPUR
GPIO Pull-Up Select
0x510
read-write
n
0x0
0x0
GPIOARIS
GPIO Raw Interrupt Status
0x414
read-write
n
0x0
0x0
GPIO_RIS_GPIO
GPIO Interrupt Raw Status
0
8
GPIOASLR
GPIO Slew Rate Control Select
0x518
read-write
n
0x0
0x0
IBE
GPIO Interrupt Both Edges
0x408
-1
read-write
n
0x0
0x0
ICR
GPIO Interrupt Clear
0x41C
-1
write-only
n
0x0
0x0
GPIO_ICR_GPIO
GPIO Interrupt Clear
0
8
write-only
IEV
GPIO Interrupt Event
0x40C
-1
read-write
n
0x0
0x0
IM
GPIO Interrupt Mask
0x410
-1
read-write
n
0x0
0x0
GPIO_IM_GPIO
GPIO Interrupt Mask Enable
0
8
IS
GPIO Interrupt Sense
0x404
-1
read-write
n
0x0
0x0
LOCK
GPIO Lock
0x520
-1
read-write
n
0x0
0x0
GPIO_LOCK
GPIO Lock
0
32
GPIO_LOCK_UNLOCKED
The GPIOCR register is unlocked and may be modified
0x0
GPIO_LOCK_LOCKED
The GPIOCR register is locked and may not be modified
0x1
GPIO_LOCK_KEY
Unlocks the GPIO_CR register
0x4c4f434b
MIS
GPIO Masked Interrupt Status
0x418
-1
read-write
n
0x0
0x0
GPIO_MIS_GPIO
GPIO Masked Interrupt Status
0
8
ODR
GPIO Open Drain Select
0x50C
-1
read-write
n
0x0
0x0
PCTL
GPIO Port Control
0x52C
-1
read-write
n
0x0
0x0
PDR
GPIO Pull-Down Select
0x514
-1
read-write
n
0x0
0x0
PUR
GPIO Pull-Up Select
0x510
-1
read-write
n
0x0
0x0
RIS
GPIO Raw Interrupt Status
0x414
-1
read-write
n
0x0
0x0
GPIO_RIS_GPIO
GPIO Interrupt Raw Status
0
8
SLR
GPIO Slew Rate Control Select
0x518
-1
read-write
n
0x0
0x0
GPIOG_AHB
Register map for GPIOA peripheral
GPIO
0x0
0x0
0x1000
registers
n
GPIOG
31
ADCCTL
GPIO ADC Control
0x530
-1
read-write
n
0x0
0x0
AFSEL
GPIO Alternate Function Select
0x420
-1
read-write
n
0x0
0x0
AMSEL
GPIO Analog Mode Select
0x528
-1
read-write
n
0x0
0x0
CR
GPIO Commit
0x524
-1
read-write
n
0x0
0x0
DATA
GPIO Data
0x3FC
-1
read-write
n
0x0
0x0
DEN
GPIO Digital Enable
0x51C
-1
read-write
n
0x0
0x0
DIR
GPIO Direction
0x400
-1
read-write
n
0x0
0x0
DMACTL
GPIO DMA Control
0x534
-1
read-write
n
0x0
0x0
DR2R
GPIO 2-mA Drive Select
0x500
-1
read-write
n
0x0
0x0
DR4R
GPIO 4-mA Drive Select
0x504
-1
read-write
n
0x0
0x0
DR8R
GPIO 8-mA Drive Select
0x508
-1
read-write
n
0x0
0x0
GPIOAADCCTL
GPIO ADC Control
0x530
read-write
n
0x0
0x0
GPIOAAFSEL
GPIO Alternate Function Select
0x420
read-write
n
0x0
0x0
GPIOAAMSEL
GPIO Analog Mode Select
0x528
read-write
n
0x0
0x0
GPIOACR
GPIO Commit
0x524
read-write
n
0x0
0x0
GPIOADATA
GPIO Data
0x3FC
read-write
n
0x0
0x0
GPIOADEN
GPIO Digital Enable
0x51C
read-write
n
0x0
0x0
GPIOADIR
GPIO Direction
0x400
read-write
n
0x0
0x0
GPIOADMACTL
GPIO DMA Control
0x534
read-write
n
0x0
0x0
GPIOADR2R
GPIO 2-mA Drive Select
0x500
read-write
n
0x0
0x0
GPIOADR4R
GPIO 4-mA Drive Select
0x504
read-write
n
0x0
0x0
GPIOADR8R
GPIO 8-mA Drive Select
0x508
read-write
n
0x0
0x0
GPIOAIBE
GPIO Interrupt Both Edges
0x408
read-write
n
0x0
0x0
GPIOAICR
GPIO Interrupt Clear
0x41C
write-only
n
0x0
0x0
GPIO_ICR_GPIO
GPIO Interrupt Clear
0
8
write-only
GPIOAIEV
GPIO Interrupt Event
0x40C
read-write
n
0x0
0x0
GPIOAIM
GPIO Interrupt Mask
0x410
read-write
n
0x0
0x0
GPIO_IM_GPIO
GPIO Interrupt Mask Enable
0
8
GPIOAIS
GPIO Interrupt Sense
0x404
read-write
n
0x0
0x0
GPIOALOCK
GPIO Lock
0x520
read-write
n
0x0
0x0
GPIO_LOCK
GPIO Lock
0
32
GPIO_LOCK_UNLOCKED
The GPIOCR register is unlocked and may be modified
0x0
GPIO_LOCK_LOCKED
The GPIOCR register is locked and may not be modified
0x1
GPIO_LOCK_KEY
Unlocks the GPIO_CR register
0x4c4f434b
GPIOAMIS
GPIO Masked Interrupt Status
0x418
read-write
n
0x0
0x0
GPIO_MIS_GPIO
GPIO Masked Interrupt Status
0
8
GPIOAODR
GPIO Open Drain Select
0x50C
read-write
n
0x0
0x0
GPIOAPCTL
GPIO Port Control
0x52C
read-write
n
0x0
0x0
GPIOAPDR
GPIO Pull-Down Select
0x514
read-write
n
0x0
0x0
GPIOAPUR
GPIO Pull-Up Select
0x510
read-write
n
0x0
0x0
GPIOARIS
GPIO Raw Interrupt Status
0x414
read-write
n
0x0
0x0
GPIO_RIS_GPIO
GPIO Interrupt Raw Status
0
8
GPIOASLR
GPIO Slew Rate Control Select
0x518
read-write
n
0x0
0x0
IBE
GPIO Interrupt Both Edges
0x408
-1
read-write
n
0x0
0x0
ICR
GPIO Interrupt Clear
0x41C
-1
write-only
n
0x0
0x0
GPIO_ICR_GPIO
GPIO Interrupt Clear
0
8
write-only
IEV
GPIO Interrupt Event
0x40C
-1
read-write
n
0x0
0x0
IM
GPIO Interrupt Mask
0x410
-1
read-write
n
0x0
0x0
GPIO_IM_GPIO
GPIO Interrupt Mask Enable
0
8
IS
GPIO Interrupt Sense
0x404
-1
read-write
n
0x0
0x0
LOCK
GPIO Lock
0x520
-1
read-write
n
0x0
0x0
GPIO_LOCK
GPIO Lock
0
32
GPIO_LOCK_UNLOCKED
The GPIOCR register is unlocked and may be modified
0x0
GPIO_LOCK_LOCKED
The GPIOCR register is locked and may not be modified
0x1
GPIO_LOCK_KEY
Unlocks the GPIO_CR register
0x4c4f434b
MIS
GPIO Masked Interrupt Status
0x418
-1
read-write
n
0x0
0x0
GPIO_MIS_GPIO
GPIO Masked Interrupt Status
0
8
ODR
GPIO Open Drain Select
0x50C
-1
read-write
n
0x0
0x0
PCTL
GPIO Port Control
0x52C
-1
read-write
n
0x0
0x0
PDR
GPIO Pull-Down Select
0x514
-1
read-write
n
0x0
0x0
PUR
GPIO Pull-Up Select
0x510
-1
read-write
n
0x0
0x0
RIS
GPIO Raw Interrupt Status
0x414
-1
read-write
n
0x0
0x0
GPIO_RIS_GPIO
GPIO Interrupt Raw Status
0
8
SLR
GPIO Slew Rate Control Select
0x518
-1
read-write
n
0x0
0x0
GPIOH
Register map for GPIOA peripheral
GPIO
0x0
0x0
0x1000
registers
n
GPIOH
32
ADCCTL
GPIO ADC Control
0x530
-1
read-write
n
0x0
0x0
AFSEL
GPIO Alternate Function Select
0x420
-1
read-write
n
0x0
0x0
AMSEL
GPIO Analog Mode Select
0x528
-1
read-write
n
0x0
0x0
CR
GPIO Commit
0x524
-1
read-write
n
0x0
0x0
DATA
GPIO Data
0x3FC
-1
read-write
n
0x0
0x0
DEN
GPIO Digital Enable
0x51C
-1
read-write
n
0x0
0x0
DIR
GPIO Direction
0x400
-1
read-write
n
0x0
0x0
DMACTL
GPIO DMA Control
0x534
-1
read-write
n
0x0
0x0
DR2R
GPIO 2-mA Drive Select
0x500
-1
read-write
n
0x0
0x0
DR4R
GPIO 4-mA Drive Select
0x504
-1
read-write
n
0x0
0x0
DR8R
GPIO 8-mA Drive Select
0x508
-1
read-write
n
0x0
0x0
GPIOAADCCTL
GPIO ADC Control
0x530
read-write
n
0x0
0x0
GPIOAAFSEL
GPIO Alternate Function Select
0x420
read-write
n
0x0
0x0
GPIOAAMSEL
GPIO Analog Mode Select
0x528
read-write
n
0x0
0x0
GPIOACR
GPIO Commit
0x524
read-write
n
0x0
0x0
GPIOADATA
GPIO Data
0x3FC
read-write
n
0x0
0x0
GPIOADEN
GPIO Digital Enable
0x51C
read-write
n
0x0
0x0
GPIOADIR
GPIO Direction
0x400
read-write
n
0x0
0x0
GPIOADMACTL
GPIO DMA Control
0x534
read-write
n
0x0
0x0
GPIOADR2R
GPIO 2-mA Drive Select
0x500
read-write
n
0x0
0x0
GPIOADR4R
GPIO 4-mA Drive Select
0x504
read-write
n
0x0
0x0
GPIOADR8R
GPIO 8-mA Drive Select
0x508
read-write
n
0x0
0x0
GPIOAIBE
GPIO Interrupt Both Edges
0x408
read-write
n
0x0
0x0
GPIOAICR
GPIO Interrupt Clear
0x41C
write-only
n
0x0
0x0
GPIO_ICR_GPIO
GPIO Interrupt Clear
0
8
write-only
GPIOAIEV
GPIO Interrupt Event
0x40C
read-write
n
0x0
0x0
GPIOAIM
GPIO Interrupt Mask
0x410
read-write
n
0x0
0x0
GPIO_IM_GPIO
GPIO Interrupt Mask Enable
0
8
GPIOAIS
GPIO Interrupt Sense
0x404
read-write
n
0x0
0x0
GPIOALOCK
GPIO Lock
0x520
read-write
n
0x0
0x0
GPIO_LOCK
GPIO Lock
0
32
GPIO_LOCK_UNLOCKED
The GPIOCR register is unlocked and may be modified
0x0
GPIO_LOCK_LOCKED
The GPIOCR register is locked and may not be modified
0x1
GPIO_LOCK_KEY
Unlocks the GPIO_CR register
0x4c4f434b
GPIOAMIS
GPIO Masked Interrupt Status
0x418
read-write
n
0x0
0x0
GPIO_MIS_GPIO
GPIO Masked Interrupt Status
0
8
GPIOAODR
GPIO Open Drain Select
0x50C
read-write
n
0x0
0x0
GPIOAPCTL
GPIO Port Control
0x52C
read-write
n
0x0
0x0
GPIOAPDR
GPIO Pull-Down Select
0x514
read-write
n
0x0
0x0
GPIOAPUR
GPIO Pull-Up Select
0x510
read-write
n
0x0
0x0
GPIOARIS
GPIO Raw Interrupt Status
0x414
read-write
n
0x0
0x0
GPIO_RIS_GPIO
GPIO Interrupt Raw Status
0
8
GPIOASLR
GPIO Slew Rate Control Select
0x518
read-write
n
0x0
0x0
IBE
GPIO Interrupt Both Edges
0x408
-1
read-write
n
0x0
0x0
ICR
GPIO Interrupt Clear
0x41C
-1
write-only
n
0x0
0x0
GPIO_ICR_GPIO
GPIO Interrupt Clear
0
8
write-only
IEV
GPIO Interrupt Event
0x40C
-1
read-write
n
0x0
0x0
IM
GPIO Interrupt Mask
0x410
-1
read-write
n
0x0
0x0
GPIO_IM_GPIO
GPIO Interrupt Mask Enable
0
8
IS
GPIO Interrupt Sense
0x404
-1
read-write
n
0x0
0x0
LOCK
GPIO Lock
0x520
-1
read-write
n
0x0
0x0
GPIO_LOCK
GPIO Lock
0
32
GPIO_LOCK_UNLOCKED
The GPIOCR register is unlocked and may be modified
0x0
GPIO_LOCK_LOCKED
The GPIOCR register is locked and may not be modified
0x1
GPIO_LOCK_KEY
Unlocks the GPIO_CR register
0x4c4f434b
MIS
GPIO Masked Interrupt Status
0x418
-1
read-write
n
0x0
0x0
GPIO_MIS_GPIO
GPIO Masked Interrupt Status
0
8
ODR
GPIO Open Drain Select
0x50C
-1
read-write
n
0x0
0x0
PCTL
GPIO Port Control
0x52C
-1
read-write
n
0x0
0x0
PDR
GPIO Pull-Down Select
0x514
-1
read-write
n
0x0
0x0
PUR
GPIO Pull-Up Select
0x510
-1
read-write
n
0x0
0x0
RIS
GPIO Raw Interrupt Status
0x414
-1
read-write
n
0x0
0x0
GPIO_RIS_GPIO
GPIO Interrupt Raw Status
0
8
SLR
GPIO Slew Rate Control Select
0x518
-1
read-write
n
0x0
0x0
GPIOH_AHB
Register map for GPIOA peripheral
GPIO
0x0
0x0
0x1000
registers
n
GPIOH
32
ADCCTL
GPIO ADC Control
0x530
-1
read-write
n
0x0
0x0
AFSEL
GPIO Alternate Function Select
0x420
-1
read-write
n
0x0
0x0
AMSEL
GPIO Analog Mode Select
0x528
-1
read-write
n
0x0
0x0
CR
GPIO Commit
0x524
-1
read-write
n
0x0
0x0
DATA
GPIO Data
0x3FC
-1
read-write
n
0x0
0x0
DEN
GPIO Digital Enable
0x51C
-1
read-write
n
0x0
0x0
DIR
GPIO Direction
0x400
-1
read-write
n
0x0
0x0
DMACTL
GPIO DMA Control
0x534
-1
read-write
n
0x0
0x0
DR2R
GPIO 2-mA Drive Select
0x500
-1
read-write
n
0x0
0x0
DR4R
GPIO 4-mA Drive Select
0x504
-1
read-write
n
0x0
0x0
DR8R
GPIO 8-mA Drive Select
0x508
-1
read-write
n
0x0
0x0
GPIOAADCCTL
GPIO ADC Control
0x530
read-write
n
0x0
0x0
GPIOAAFSEL
GPIO Alternate Function Select
0x420
read-write
n
0x0
0x0
GPIOAAMSEL
GPIO Analog Mode Select
0x528
read-write
n
0x0
0x0
GPIOACR
GPIO Commit
0x524
read-write
n
0x0
0x0
GPIOADATA
GPIO Data
0x3FC
read-write
n
0x0
0x0
GPIOADEN
GPIO Digital Enable
0x51C
read-write
n
0x0
0x0
GPIOADIR
GPIO Direction
0x400
read-write
n
0x0
0x0
GPIOADMACTL
GPIO DMA Control
0x534
read-write
n
0x0
0x0
GPIOADR2R
GPIO 2-mA Drive Select
0x500
read-write
n
0x0
0x0
GPIOADR4R
GPIO 4-mA Drive Select
0x504
read-write
n
0x0
0x0
GPIOADR8R
GPIO 8-mA Drive Select
0x508
read-write
n
0x0
0x0
GPIOAIBE
GPIO Interrupt Both Edges
0x408
read-write
n
0x0
0x0
GPIOAICR
GPIO Interrupt Clear
0x41C
write-only
n
0x0
0x0
GPIO_ICR_GPIO
GPIO Interrupt Clear
0
8
write-only
GPIOAIEV
GPIO Interrupt Event
0x40C
read-write
n
0x0
0x0
GPIOAIM
GPIO Interrupt Mask
0x410
read-write
n
0x0
0x0
GPIO_IM_GPIO
GPIO Interrupt Mask Enable
0
8
GPIOAIS
GPIO Interrupt Sense
0x404
read-write
n
0x0
0x0
GPIOALOCK
GPIO Lock
0x520
read-write
n
0x0
0x0
GPIO_LOCK
GPIO Lock
0
32
GPIO_LOCK_UNLOCKED
The GPIOCR register is unlocked and may be modified
0x0
GPIO_LOCK_LOCKED
The GPIOCR register is locked and may not be modified
0x1
GPIO_LOCK_KEY
Unlocks the GPIO_CR register
0x4c4f434b
GPIOAMIS
GPIO Masked Interrupt Status
0x418
read-write
n
0x0
0x0
GPIO_MIS_GPIO
GPIO Masked Interrupt Status
0
8
GPIOAODR
GPIO Open Drain Select
0x50C
read-write
n
0x0
0x0
GPIOAPCTL
GPIO Port Control
0x52C
read-write
n
0x0
0x0
GPIOAPDR
GPIO Pull-Down Select
0x514
read-write
n
0x0
0x0
GPIOAPUR
GPIO Pull-Up Select
0x510
read-write
n
0x0
0x0
GPIOARIS
GPIO Raw Interrupt Status
0x414
read-write
n
0x0
0x0
GPIO_RIS_GPIO
GPIO Interrupt Raw Status
0
8
GPIOASLR
GPIO Slew Rate Control Select
0x518
read-write
n
0x0
0x0
IBE
GPIO Interrupt Both Edges
0x408
-1
read-write
n
0x0
0x0
ICR
GPIO Interrupt Clear
0x41C
-1
write-only
n
0x0
0x0
GPIO_ICR_GPIO
GPIO Interrupt Clear
0
8
write-only
IEV
GPIO Interrupt Event
0x40C
-1
read-write
n
0x0
0x0
IM
GPIO Interrupt Mask
0x410
-1
read-write
n
0x0
0x0
GPIO_IM_GPIO
GPIO Interrupt Mask Enable
0
8
IS
GPIO Interrupt Sense
0x404
-1
read-write
n
0x0
0x0
LOCK
GPIO Lock
0x520
-1
read-write
n
0x0
0x0
GPIO_LOCK
GPIO Lock
0
32
GPIO_LOCK_UNLOCKED
The GPIOCR register is unlocked and may be modified
0x0
GPIO_LOCK_LOCKED
The GPIOCR register is locked and may not be modified
0x1
GPIO_LOCK_KEY
Unlocks the GPIO_CR register
0x4c4f434b
MIS
GPIO Masked Interrupt Status
0x418
-1
read-write
n
0x0
0x0
GPIO_MIS_GPIO
GPIO Masked Interrupt Status
0
8
ODR
GPIO Open Drain Select
0x50C
-1
read-write
n
0x0
0x0
PCTL
GPIO Port Control
0x52C
-1
read-write
n
0x0
0x0
PDR
GPIO Pull-Down Select
0x514
-1
read-write
n
0x0
0x0
PUR
GPIO Pull-Up Select
0x510
-1
read-write
n
0x0
0x0
RIS
GPIO Raw Interrupt Status
0x414
-1
read-write
n
0x0
0x0
GPIO_RIS_GPIO
GPIO Interrupt Raw Status
0
8
SLR
GPIO Slew Rate Control Select
0x518
-1
read-write
n
0x0
0x0
GPIOJ
Register map for GPIOA peripheral
GPIO
0x0
0x0
0x1000
registers
n
GPIOJ
54
ADCCTL
GPIO ADC Control
0x530
-1
read-write
n
0x0
0x0
AFSEL
GPIO Alternate Function Select
0x420
-1
read-write
n
0x0
0x0
AMSEL
GPIO Analog Mode Select
0x528
-1
read-write
n
0x0
0x0
CR
GPIO Commit
0x524
-1
read-write
n
0x0
0x0
DATA
GPIO Data
0x3FC
-1
read-write
n
0x0
0x0
DEN
GPIO Digital Enable
0x51C
-1
read-write
n
0x0
0x0
DIR
GPIO Direction
0x400
-1
read-write
n
0x0
0x0
DMACTL
GPIO DMA Control
0x534
-1
read-write
n
0x0
0x0
DR2R
GPIO 2-mA Drive Select
0x500
-1
read-write
n
0x0
0x0
DR4R
GPIO 4-mA Drive Select
0x504
-1
read-write
n
0x0
0x0
DR8R
GPIO 8-mA Drive Select
0x508
-1
read-write
n
0x0
0x0
GPIOAADCCTL
GPIO ADC Control
0x530
read-write
n
0x0
0x0
GPIOAAFSEL
GPIO Alternate Function Select
0x420
read-write
n
0x0
0x0
GPIOAAMSEL
GPIO Analog Mode Select
0x528
read-write
n
0x0
0x0
GPIOACR
GPIO Commit
0x524
read-write
n
0x0
0x0
GPIOADATA
GPIO Data
0x3FC
read-write
n
0x0
0x0
GPIOADEN
GPIO Digital Enable
0x51C
read-write
n
0x0
0x0
GPIOADIR
GPIO Direction
0x400
read-write
n
0x0
0x0
GPIOADMACTL
GPIO DMA Control
0x534
read-write
n
0x0
0x0
GPIOADR2R
GPIO 2-mA Drive Select
0x500
read-write
n
0x0
0x0
GPIOADR4R
GPIO 4-mA Drive Select
0x504
read-write
n
0x0
0x0
GPIOADR8R
GPIO 8-mA Drive Select
0x508
read-write
n
0x0
0x0
GPIOAIBE
GPIO Interrupt Both Edges
0x408
read-write
n
0x0
0x0
GPIOAICR
GPIO Interrupt Clear
0x41C
write-only
n
0x0
0x0
GPIO_ICR_GPIO
GPIO Interrupt Clear
0
8
write-only
GPIOAIEV
GPIO Interrupt Event
0x40C
read-write
n
0x0
0x0
GPIOAIM
GPIO Interrupt Mask
0x410
read-write
n
0x0
0x0
GPIO_IM_GPIO
GPIO Interrupt Mask Enable
0
8
GPIOAIS
GPIO Interrupt Sense
0x404
read-write
n
0x0
0x0
GPIOALOCK
GPIO Lock
0x520
read-write
n
0x0
0x0
GPIO_LOCK
GPIO Lock
0
32
GPIO_LOCK_UNLOCKED
The GPIOCR register is unlocked and may be modified
0x0
GPIO_LOCK_LOCKED
The GPIOCR register is locked and may not be modified
0x1
GPIO_LOCK_KEY
Unlocks the GPIO_CR register
0x4c4f434b
GPIOAMIS
GPIO Masked Interrupt Status
0x418
read-write
n
0x0
0x0
GPIO_MIS_GPIO
GPIO Masked Interrupt Status
0
8
GPIOAODR
GPIO Open Drain Select
0x50C
read-write
n
0x0
0x0
GPIOAPCTL
GPIO Port Control
0x52C
read-write
n
0x0
0x0
GPIOAPDR
GPIO Pull-Down Select
0x514
read-write
n
0x0
0x0
GPIOAPUR
GPIO Pull-Up Select
0x510
read-write
n
0x0
0x0
GPIOARIS
GPIO Raw Interrupt Status
0x414
read-write
n
0x0
0x0
GPIO_RIS_GPIO
GPIO Interrupt Raw Status
0
8
GPIOASLR
GPIO Slew Rate Control Select
0x518
read-write
n
0x0
0x0
IBE
GPIO Interrupt Both Edges
0x408
-1
read-write
n
0x0
0x0
ICR
GPIO Interrupt Clear
0x41C
-1
write-only
n
0x0
0x0
GPIO_ICR_GPIO
GPIO Interrupt Clear
0
8
write-only
IEV
GPIO Interrupt Event
0x40C
-1
read-write
n
0x0
0x0
IM
GPIO Interrupt Mask
0x410
-1
read-write
n
0x0
0x0
GPIO_IM_GPIO
GPIO Interrupt Mask Enable
0
8
IS
GPIO Interrupt Sense
0x404
-1
read-write
n
0x0
0x0
LOCK
GPIO Lock
0x520
-1
read-write
n
0x0
0x0
GPIO_LOCK
GPIO Lock
0
32
GPIO_LOCK_UNLOCKED
The GPIOCR register is unlocked and may be modified
0x0
GPIO_LOCK_LOCKED
The GPIOCR register is locked and may not be modified
0x1
GPIO_LOCK_KEY
Unlocks the GPIO_CR register
0x4c4f434b
MIS
GPIO Masked Interrupt Status
0x418
-1
read-write
n
0x0
0x0
GPIO_MIS_GPIO
GPIO Masked Interrupt Status
0
8
ODR
GPIO Open Drain Select
0x50C
-1
read-write
n
0x0
0x0
PCTL
GPIO Port Control
0x52C
-1
read-write
n
0x0
0x0
PDR
GPIO Pull-Down Select
0x514
-1
read-write
n
0x0
0x0
PUR
GPIO Pull-Up Select
0x510
-1
read-write
n
0x0
0x0
RIS
GPIO Raw Interrupt Status
0x414
-1
read-write
n
0x0
0x0
GPIO_RIS_GPIO
GPIO Interrupt Raw Status
0
8
SLR
GPIO Slew Rate Control Select
0x518
-1
read-write
n
0x0
0x0
GPIOJ_AHB
Register map for GPIOA peripheral
GPIO
0x0
0x0
0x1000
registers
n
GPIOJ
54
ADCCTL
GPIO ADC Control
0x530
-1
read-write
n
0x0
0x0
AFSEL
GPIO Alternate Function Select
0x420
-1
read-write
n
0x0
0x0
AMSEL
GPIO Analog Mode Select
0x528
-1
read-write
n
0x0
0x0
CR
GPIO Commit
0x524
-1
read-write
n
0x0
0x0
DATA
GPIO Data
0x3FC
-1
read-write
n
0x0
0x0
DEN
GPIO Digital Enable
0x51C
-1
read-write
n
0x0
0x0
DIR
GPIO Direction
0x400
-1
read-write
n
0x0
0x0
DMACTL
GPIO DMA Control
0x534
-1
read-write
n
0x0
0x0
DR2R
GPIO 2-mA Drive Select
0x500
-1
read-write
n
0x0
0x0
DR4R
GPIO 4-mA Drive Select
0x504
-1
read-write
n
0x0
0x0
DR8R
GPIO 8-mA Drive Select
0x508
-1
read-write
n
0x0
0x0
GPIOAADCCTL
GPIO ADC Control
0x530
read-write
n
0x0
0x0
GPIOAAFSEL
GPIO Alternate Function Select
0x420
read-write
n
0x0
0x0
GPIOAAMSEL
GPIO Analog Mode Select
0x528
read-write
n
0x0
0x0
GPIOACR
GPIO Commit
0x524
read-write
n
0x0
0x0
GPIOADATA
GPIO Data
0x3FC
read-write
n
0x0
0x0
GPIOADEN
GPIO Digital Enable
0x51C
read-write
n
0x0
0x0
GPIOADIR
GPIO Direction
0x400
read-write
n
0x0
0x0
GPIOADMACTL
GPIO DMA Control
0x534
read-write
n
0x0
0x0
GPIOADR2R
GPIO 2-mA Drive Select
0x500
read-write
n
0x0
0x0
GPIOADR4R
GPIO 4-mA Drive Select
0x504
read-write
n
0x0
0x0
GPIOADR8R
GPIO 8-mA Drive Select
0x508
read-write
n
0x0
0x0
GPIOAIBE
GPIO Interrupt Both Edges
0x408
read-write
n
0x0
0x0
GPIOAICR
GPIO Interrupt Clear
0x41C
write-only
n
0x0
0x0
GPIO_ICR_GPIO
GPIO Interrupt Clear
0
8
write-only
GPIOAIEV
GPIO Interrupt Event
0x40C
read-write
n
0x0
0x0
GPIOAIM
GPIO Interrupt Mask
0x410
read-write
n
0x0
0x0
GPIO_IM_GPIO
GPIO Interrupt Mask Enable
0
8
GPIOAIS
GPIO Interrupt Sense
0x404
read-write
n
0x0
0x0
GPIOALOCK
GPIO Lock
0x520
read-write
n
0x0
0x0
GPIO_LOCK
GPIO Lock
0
32
GPIO_LOCK_UNLOCKED
The GPIOCR register is unlocked and may be modified
0x0
GPIO_LOCK_LOCKED
The GPIOCR register is locked and may not be modified
0x1
GPIO_LOCK_KEY
Unlocks the GPIO_CR register
0x4c4f434b
GPIOAMIS
GPIO Masked Interrupt Status
0x418
read-write
n
0x0
0x0
GPIO_MIS_GPIO
GPIO Masked Interrupt Status
0
8
GPIOAODR
GPIO Open Drain Select
0x50C
read-write
n
0x0
0x0
GPIOAPCTL
GPIO Port Control
0x52C
read-write
n
0x0
0x0
GPIOAPDR
GPIO Pull-Down Select
0x514
read-write
n
0x0
0x0
GPIOAPUR
GPIO Pull-Up Select
0x510
read-write
n
0x0
0x0
GPIOARIS
GPIO Raw Interrupt Status
0x414
read-write
n
0x0
0x0
GPIO_RIS_GPIO
GPIO Interrupt Raw Status
0
8
GPIOASLR
GPIO Slew Rate Control Select
0x518
read-write
n
0x0
0x0
IBE
GPIO Interrupt Both Edges
0x408
-1
read-write
n
0x0
0x0
ICR
GPIO Interrupt Clear
0x41C
-1
write-only
n
0x0
0x0
GPIO_ICR_GPIO
GPIO Interrupt Clear
0
8
write-only
IEV
GPIO Interrupt Event
0x40C
-1
read-write
n
0x0
0x0
IM
GPIO Interrupt Mask
0x410
-1
read-write
n
0x0
0x0
GPIO_IM_GPIO
GPIO Interrupt Mask Enable
0
8
IS
GPIO Interrupt Sense
0x404
-1
read-write
n
0x0
0x0
LOCK
GPIO Lock
0x520
-1
read-write
n
0x0
0x0
GPIO_LOCK
GPIO Lock
0
32
GPIO_LOCK_UNLOCKED
The GPIOCR register is unlocked and may be modified
0x0
GPIO_LOCK_LOCKED
The GPIOCR register is locked and may not be modified
0x1
GPIO_LOCK_KEY
Unlocks the GPIO_CR register
0x4c4f434b
MIS
GPIO Masked Interrupt Status
0x418
-1
read-write
n
0x0
0x0
GPIO_MIS_GPIO
GPIO Masked Interrupt Status
0
8
ODR
GPIO Open Drain Select
0x50C
-1
read-write
n
0x0
0x0
PCTL
GPIO Port Control
0x52C
-1
read-write
n
0x0
0x0
PDR
GPIO Pull-Down Select
0x514
-1
read-write
n
0x0
0x0
PUR
GPIO Pull-Up Select
0x510
-1
read-write
n
0x0
0x0
RIS
GPIO Raw Interrupt Status
0x414
-1
read-write
n
0x0
0x0
GPIO_RIS_GPIO
GPIO Interrupt Raw Status
0
8
SLR
GPIO Slew Rate Control Select
0x518
-1
read-write
n
0x0
0x0
GPIOK
Register map for GPIOA peripheral
GPIO
0x0
0x0
0x1000
registers
n
GPIOK
55
ADCCTL
GPIO ADC Control
0x530
-1
read-write
n
0x0
0x0
AFSEL
GPIO Alternate Function Select
0x420
-1
read-write
n
0x0
0x0
AMSEL
GPIO Analog Mode Select
0x528
-1
read-write
n
0x0
0x0
CR
GPIO Commit
0x524
-1
read-write
n
0x0
0x0
DATA
GPIO Data
0x3FC
-1
read-write
n
0x0
0x0
DEN
GPIO Digital Enable
0x51C
-1
read-write
n
0x0
0x0
DIR
GPIO Direction
0x400
-1
read-write
n
0x0
0x0
DMACTL
GPIO DMA Control
0x534
-1
read-write
n
0x0
0x0
DR2R
GPIO 2-mA Drive Select
0x500
-1
read-write
n
0x0
0x0
DR4R
GPIO 4-mA Drive Select
0x504
-1
read-write
n
0x0
0x0
DR8R
GPIO 8-mA Drive Select
0x508
-1
read-write
n
0x0
0x0
GPIOAADCCTL
GPIO ADC Control
0x530
read-write
n
0x0
0x0
GPIOAAFSEL
GPIO Alternate Function Select
0x420
read-write
n
0x0
0x0
GPIOAAMSEL
GPIO Analog Mode Select
0x528
read-write
n
0x0
0x0
GPIOACR
GPIO Commit
0x524
read-write
n
0x0
0x0
GPIOADATA
GPIO Data
0x3FC
read-write
n
0x0
0x0
GPIOADEN
GPIO Digital Enable
0x51C
read-write
n
0x0
0x0
GPIOADIR
GPIO Direction
0x400
read-write
n
0x0
0x0
GPIOADMACTL
GPIO DMA Control
0x534
read-write
n
0x0
0x0
GPIOADR2R
GPIO 2-mA Drive Select
0x500
read-write
n
0x0
0x0
GPIOADR4R
GPIO 4-mA Drive Select
0x504
read-write
n
0x0
0x0
GPIOADR8R
GPIO 8-mA Drive Select
0x508
read-write
n
0x0
0x0
GPIOAIBE
GPIO Interrupt Both Edges
0x408
read-write
n
0x0
0x0
GPIOAICR
GPIO Interrupt Clear
0x41C
write-only
n
0x0
0x0
GPIO_ICR_GPIO
GPIO Interrupt Clear
0
8
write-only
GPIOAIEV
GPIO Interrupt Event
0x40C
read-write
n
0x0
0x0
GPIOAIM
GPIO Interrupt Mask
0x410
read-write
n
0x0
0x0
GPIO_IM_GPIO
GPIO Interrupt Mask Enable
0
8
GPIOAIS
GPIO Interrupt Sense
0x404
read-write
n
0x0
0x0
GPIOALOCK
GPIO Lock
0x520
read-write
n
0x0
0x0
GPIO_LOCK
GPIO Lock
0
32
GPIO_LOCK_UNLOCKED
The GPIOCR register is unlocked and may be modified
0x0
GPIO_LOCK_LOCKED
The GPIOCR register is locked and may not be modified
0x1
GPIO_LOCK_KEY
Unlocks the GPIO_CR register
0x4c4f434b
GPIOAMIS
GPIO Masked Interrupt Status
0x418
read-write
n
0x0
0x0
GPIO_MIS_GPIO
GPIO Masked Interrupt Status
0
8
GPIOAODR
GPIO Open Drain Select
0x50C
read-write
n
0x0
0x0
GPIOAPCTL
GPIO Port Control
0x52C
read-write
n
0x0
0x0
GPIOAPDR
GPIO Pull-Down Select
0x514
read-write
n
0x0
0x0
GPIOAPUR
GPIO Pull-Up Select
0x510
read-write
n
0x0
0x0
GPIOARIS
GPIO Raw Interrupt Status
0x414
read-write
n
0x0
0x0
GPIO_RIS_GPIO
GPIO Interrupt Raw Status
0
8
GPIOASLR
GPIO Slew Rate Control Select
0x518
read-write
n
0x0
0x0
IBE
GPIO Interrupt Both Edges
0x408
-1
read-write
n
0x0
0x0
ICR
GPIO Interrupt Clear
0x41C
-1
write-only
n
0x0
0x0
GPIO_ICR_GPIO
GPIO Interrupt Clear
0
8
write-only
IEV
GPIO Interrupt Event
0x40C
-1
read-write
n
0x0
0x0
IM
GPIO Interrupt Mask
0x410
-1
read-write
n
0x0
0x0
GPIO_IM_GPIO
GPIO Interrupt Mask Enable
0
8
IS
GPIO Interrupt Sense
0x404
-1
read-write
n
0x0
0x0
LOCK
GPIO Lock
0x520
-1
read-write
n
0x0
0x0
GPIO_LOCK
GPIO Lock
0
32
GPIO_LOCK_UNLOCKED
The GPIOCR register is unlocked and may be modified
0x0
GPIO_LOCK_LOCKED
The GPIOCR register is locked and may not be modified
0x1
GPIO_LOCK_KEY
Unlocks the GPIO_CR register
0x4c4f434b
MIS
GPIO Masked Interrupt Status
0x418
-1
read-write
n
0x0
0x0
GPIO_MIS_GPIO
GPIO Masked Interrupt Status
0
8
ODR
GPIO Open Drain Select
0x50C
-1
read-write
n
0x0
0x0
PCTL
GPIO Port Control
0x52C
-1
read-write
n
0x0
0x0
PDR
GPIO Pull-Down Select
0x514
-1
read-write
n
0x0
0x0
PUR
GPIO Pull-Up Select
0x510
-1
read-write
n
0x0
0x0
RIS
GPIO Raw Interrupt Status
0x414
-1
read-write
n
0x0
0x0
GPIO_RIS_GPIO
GPIO Interrupt Raw Status
0
8
SLR
GPIO Slew Rate Control Select
0x518
-1
read-write
n
0x0
0x0
HIB
Register map for HIB peripheral
HIB
0x0
0x0
0x1000
registers
n
HIB
43
CTL
Hibernation Control
0x10
-1
read-write
n
0x0
0x0
HIB_CTL_BATCHK
Check Battery Status
10
11
HIB_CTL_BATWKEN
Wake on Low Battery
9
10
HIB_CTL_CLK32EN
Clocking Enable
6
7
HIB_CTL_HIBREQ
Hibernation Request
1
2
HIB_CTL_OSCBYP
Oscillator Bypass
16
17
HIB_CTL_OSCDRV
Oscillator Drive Capability
17
18
HIB_CTL_PINWEN
External Wake Pin Enable
4
5
HIB_CTL_RTCEN
RTC Timer Enable
0
1
HIB_CTL_RTCWEN
RTC Wake-up Enable
3
4
HIB_CTL_VABORT
Power Cut Abort Enable
7
8
HIB_CTL_VBATSEL
Select for Low-Battery Comparator
13
15
HIB_CTL_VBATSEL_1_9V
1.9 Volts
0x0
HIB_CTL_VBATSEL_2_1V
2.1 Volts (default)
0x1
HIB_CTL_VBATSEL_2_3V
2.3 Volts
0x2
HIB_CTL_VBATSEL_2_5V
2.5 Volts
0x3
HIB_CTL_VDD3ON
VDD Powered
8
9
HIB_CTL_WRC
Write Complete/Capable
31
32
DATA
Hibernation Data
0x30
-1
read-write
n
0x0
0x0
HIB_DATA_RTD
Hibernation Module NV Data
0
32
HIBCTL
Hibernation Control
0x10
read-write
n
0x0
0x0
HIB_CTL_BATCHK
Check Battery Status
10
11
HIB_CTL_BATWKEN
Wake on Low Battery
9
10
HIB_CTL_CLK32EN
Clocking Enable
6
7
HIB_CTL_HIBREQ
Hibernation Request
1
2
HIB_CTL_OSCBYP
Oscillator Bypass
16
17
HIB_CTL_OSCDRV
Oscillator Drive Capability
17
18
HIB_CTL_PINWEN
External Wake Pin Enable
4
5
HIB_CTL_RTCEN
RTC Timer Enable
0
1
HIB_CTL_RTCWEN
RTC Wake-up Enable
3
4
HIB_CTL_VABORT
Power Cut Abort Enable
7
8
HIB_CTL_VBATSEL
Select for Low-Battery Comparator
13
15
HIB_CTL_VBATSEL_1_9V
1.9 Volts
0x0
HIB_CTL_VBATSEL_2_1V
2.1 Volts (default)
0x1
HIB_CTL_VBATSEL_2_3V
2.3 Volts
0x2
HIB_CTL_VBATSEL_2_5V
2.5 Volts
0x3
HIB_CTL_VDD3ON
VDD Powered
8
9
HIB_CTL_WRC
Write Complete/Capable
31
32
HIBDATA
Hibernation Data
0x30
read-write
n
0x0
0x0
HIB_DATA_RTD
Hibernation Module NV Data
0
32
HIBIC
Hibernation Interrupt Clear
0x20
read-write
n
0x0
0x0
HIB_IC_EXTW
External Wake-Up Interrupt Clear
3
4
HIB_IC_LOWBAT
Low Battery Voltage Interrupt Clear
2
3
HIB_IC_RTCALT0
RTC Alert0 Masked Interrupt Clear
0
1
HIB_IC_WC
Write Complete/Capable Interrupt Clear
4
5
HIBIM
Hibernation Interrupt Mask
0x14
read-write
n
0x0
0x0
HIB_IM_EXTW
External Wake-Up Interrupt Mask
3
4
HIB_IM_LOWBAT
Low Battery Voltage Interrupt Mask
2
3
HIB_IM_RTCALT0
RTC Alert 0 Interrupt Mask
0
1
HIB_IM_WC
External Write Complete/Capable Interrupt Mask
4
5
HIBMIS
Hibernation Masked Interrupt Status
0x1C
read-write
n
0x0
0x0
HIB_MIS_EXTW
External Wake-Up Masked Interrupt Status
3
4
HIB_MIS_LOWBAT
Low Battery Voltage Masked Interrupt Status
2
3
HIB_MIS_RTCALT0
RTC Alert 0 Masked Interrupt Status
0
1
HIB_MIS_WC
Write Complete/Capable Masked Interrupt Status
4
5
HIBRIS
Hibernation Raw Interrupt Status
0x18
read-write
n
0x0
0x0
HIB_RIS_EXTW
External Wake-Up Raw Interrupt Status
3
4
HIB_RIS_LOWBAT
Low Battery Voltage Raw Interrupt Status
2
3
HIB_RIS_RTCALT0
RTC Alert 0 Raw Interrupt Status
0
1
HIB_RIS_WC
Write Complete/Capable Raw Interrupt Status
4
5
HIBRTCC
Hibernation RTC Counter
0x0
read-write
n
0x0
0x0
HIB_RTCC
RTC Counter
0
32
HIBRTCLD
Hibernation RTC Load
0xC
read-write
n
0x0
0x0
HIB_RTCLD
RTC Load
0
32
HIBRTCM0
Hibernation RTC Match 0
0x4
read-write
n
0x0
0x0
HIB_RTCM0
RTC Match 0
0
32
HIBRTCSS
Hibernation RTC Sub Seconds
0x28
read-write
n
0x0
0x0
HIB_RTCSS_RTCSSC
RTC Sub Seconds Count
0
15
HIB_RTCSS_RTCSSM
RTC Sub Seconds Match
16
31
HIBRTCT
Hibernation RTC Trim
0x24
read-write
n
0x0
0x0
HIB_RTCT_TRIM
RTC Trim Value
0
16
IC
Hibernation Interrupt Clear
0x20
-1
read-write
n
0x0
0x0
HIB_IC_EXTW
External Wake-Up Interrupt Clear
3
4
HIB_IC_LOWBAT
Low Battery Voltage Interrupt Clear
2
3
HIB_IC_RTCALT0
RTC Alert0 Masked Interrupt Clear
0
1
HIB_IC_WC
Write Complete/Capable Interrupt Clear
4
5
IM
Hibernation Interrupt Mask
0x14
-1
read-write
n
0x0
0x0
HIB_IM_EXTW
External Wake-Up Interrupt Mask
3
4
HIB_IM_LOWBAT
Low Battery Voltage Interrupt Mask
2
3
HIB_IM_RTCALT0
RTC Alert 0 Interrupt Mask
0
1
HIB_IM_WC
External Write Complete/Capable Interrupt Mask
4
5
MIS
Hibernation Masked Interrupt Status
0x1C
-1
read-write
n
0x0
0x0
HIB_MIS_EXTW
External Wake-Up Masked Interrupt Status
3
4
HIB_MIS_LOWBAT
Low Battery Voltage Masked Interrupt Status
2
3
HIB_MIS_RTCALT0
RTC Alert 0 Masked Interrupt Status
0
1
HIB_MIS_WC
Write Complete/Capable Masked Interrupt Status
4
5
RIS
Hibernation Raw Interrupt Status
0x18
-1
read-write
n
0x0
0x0
HIB_RIS_EXTW
External Wake-Up Raw Interrupt Status
3
4
HIB_RIS_LOWBAT
Low Battery Voltage Raw Interrupt Status
2
3
HIB_RIS_RTCALT0
RTC Alert 0 Raw Interrupt Status
0
1
HIB_RIS_WC
Write Complete/Capable Raw Interrupt Status
4
5
RTCC
Hibernation RTC Counter
0x0
-1
read-write
n
0x0
0x0
HIB_RTCC
RTC Counter
0
32
RTCLD
Hibernation RTC Load
0xC
-1
read-write
n
0x0
0x0
HIB_RTCLD
RTC Load
0
32
RTCM0
Hibernation RTC Match 0
0x4
-1
read-write
n
0x0
0x0
HIB_RTCM0
RTC Match 0
0
32
RTCSS
Hibernation RTC Sub Seconds
0x28
-1
read-write
n
0x0
0x0
HIB_RTCSS_RTCSSC
RTC Sub Seconds Count
0
15
HIB_RTCSS_RTCSSM
RTC Sub Seconds Match
16
31
RTCT
Hibernation RTC Trim
0x24
-1
read-write
n
0x0
0x0
HIB_RTCT_TRIM
RTC Trim Value
0
16
I2C0
Register map for I2C0 peripheral
I2C
0x0
0x0
0x1000
registers
n
I2C0
8
I2C0MBMON
I2C Master Bus Monitor
0x2C
read-write
n
0x0
0x0
I2C_MBMON_SCL
I2C SCL Status
0
1
I2C_MBMON_SDA
I2C SDA Status
1
2
I2C0MCLKOCNT
I2C Master Clock Low Timeout Count
0x24
read-write
n
0x0
0x0
I2C_MCLKOCNT_CNTL
I2C Master Count
0
8
I2C0MCR
I2C Master Configuration
0x20
read-write
n
0x0
0x0
I2C_MCR_GFE
I2C Glitch Filter Enable
6
7
I2C_MCR_LPBK
I2C Loopback
0
1
I2C_MCR_MFE
I2C Master Function Enable
4
5
I2C_MCR_SFE
I2C Slave Function Enable
5
6
I2C0MCR2
I2C Master Configuration 2
0x38
read-write
n
0x0
0x0
I2C_MCR2_GFPW
I2C Glitch Filter Pulse Width
4
7
I2C_MCR2_GFPW_BYPASS
Bypass
0x0
I2C_MCR2_GFPW_1
1 clock
0x1
I2C_MCR2_GFPW_2
2 clocks
0x2
I2C_MCR2_GFPW_3
3 clocks
0x3
I2C_MCR2_GFPW_4
4 clocks
0x4
I2C_MCR2_GFPW_8
8 clocks
0x5
I2C_MCR2_GFPW_16
16 clocks
0x6
I2C_MCR2_GFPW_32
32 clocks
0x7
I2C_MCR2_GFPW_31
31 clocks
0x7
I2C0MCS
I2C Master Control/Status
0x4
read-write
n
0x0
0x0
I2C_MCS_ACK
Data Acknowledge Enable
3
4
I2C_MCS_ADRACK
Acknowledge Address
2
3
I2C_MCS_ARBLST
Arbitration Lost
4
5
I2C_MCS_CLKTO
Clock Timeout Error
7
8
I2C_MCS_IDLE
I2C Idle
5
6
I2C_MCS_RUN
I2C Master Enable
0
1
I2C_MCS_START
Generate START
1
2
I2C0MDR
I2C Master Data
0x8
read-write
n
0x0
0x0
I2C_MDR_DATA
This byte contains the data transferred during a transaction
0
8
I2C0MICR
I2C Master Interrupt Clear
0x1C
write-only
n
0x0
0x0
I2C_MICR_CLKIC
Clock Timeout Interrupt Clear
1
2
write-only
I2C_MICR_IC
Master Interrupt Clear
0
1
write-only
I2C0MIMR
I2C Master Interrupt Mask
0x10
read-write
n
0x0
0x0
I2C_MIMR_CLKIM
Clock Timeout Interrupt Mask
1
2
I2C_MIMR_IM
Master Interrupt Mask
0
1
I2C0MMIS
I2C Master Masked Interrupt Status
0x18
read-write
n
0x0
0x0
I2C_MMIS_CLKMIS
Clock Timeout Masked Interrupt Status
1
2
I2C_MMIS_MIS
Masked Interrupt Status
0
1
I2C0MRIS
I2C Master Raw Interrupt Status
0x14
read-write
n
0x0
0x0
I2C_MRIS_CLKRIS
Clock Timeout Raw Interrupt Status
1
2
I2C_MRIS_RIS
Master Raw Interrupt Status
0
1
I2C0MSA
I2C Master Slave Address
0x0
read-write
n
0x0
0x0
I2C_MSA_RS
Receive not send
0
1
I2C_MSA_SA
I2C Slave Address
1
8
I2C0MTPR
I2C Master Timer Period
0xC
read-write
n
0x0
0x0
I2C_MTPR_HS
High-Speed Enable
7
8
I2C_MTPR_TPR
Timer Period
0
7
I2C0PC
I2C Peripheral Configuration
0xFC4
read-write
n
0x0
0x0
I2C_PC_HS
High-Speed Capable
0
1
I2C0PP
I2C Peripheral Properties
0xFC0
read-write
n
0x0
0x0
I2C_PP_HS
High-Speed Capable
0
1
I2C0SACKCTL
I2C Slave ACK Control
0x820
read-write
n
0x0
0x0
I2C_SACKCTL_ACKOEN
I2C Slave ACK Override Enable
0
1
I2C_SACKCTL_ACKOVAL
I2C Slave ACK Override Value
1
2
I2C0SCSR
I2C Slave Control/Status
0x804
read-write
n
0x0
0x0
I2C_SCSR_FBR
First Byte Received
2
3
I2C_SCSR_OAR2SEL
OAR2 Address Matched
3
4
I2C_SCSR_RREQ
Receive Request
0
1
I2C0SDR
I2C Slave Data
0x808
read-write
n
0x0
0x0
I2C_SDR_DATA
Data for Transfer
0
8
I2C0SICR
I2C Slave Interrupt Clear
0x818
write-only
n
0x0
0x0
I2C_SICR_DATAIC
Data Interrupt Clear
0
1
write-only
I2C_SICR_STARTIC
Start Condition Interrupt Clear
1
2
write-only
I2C_SICR_STOPIC
Stop Condition Interrupt Clear
2
3
write-only
I2C0SIMR
I2C Slave Interrupt Mask
0x80C
read-write
n
0x0
0x0
I2C_SIMR_DATAIM
Data Interrupt Mask
0
1
I2C_SIMR_STARTIM
Start Condition Interrupt Mask
1
2
I2C_SIMR_STOPIM
Stop Condition Interrupt Mask
2
3
I2C0SMIS
I2C Slave Masked Interrupt Status
0x814
read-write
n
0x0
0x0
I2C_SMIS_DATAMIS
Data Masked Interrupt Status
0
1
I2C_SMIS_STARTMIS
Start Condition Masked Interrupt Status
1
2
I2C_SMIS_STOPMIS
Stop Condition Masked Interrupt Status
2
3
I2C0SOAR
I2C Slave Own Address
0x800
read-write
n
0x0
0x0
I2C_SOAR_OAR
I2C Slave Own Address
0
7
I2C0SOAR2
I2C Slave Own Address 2
0x81C
read-write
n
0x0
0x0
I2C_SOAR2_OAR2
I2C Slave Own Address 2
0
7
I2C_SOAR2_OAR2EN
I2C Slave Own Address 2 Enable
7
8
I2C0SRIS
I2C Slave Raw Interrupt Status
0x810
read-write
n
0x0
0x0
I2C_SRIS_DATARIS
Data Raw Interrupt Status
0
1
I2C_SRIS_STARTRIS
Start Condition Raw Interrupt Status
1
2
I2C_SRIS_STOPRIS
Stop Condition Raw Interrupt Status
2
3
MBMON
I2C Master Bus Monitor
0x2C
-1
read-write
n
0x0
0x0
I2C_MBMON_SCL
I2C SCL Status
0
1
I2C_MBMON_SDA
I2C SDA Status
1
2
MCLKOCNT
I2C Master Clock Low Timeout Count
0x24
-1
read-write
n
0x0
0x0
I2C_MCLKOCNT_CNTL
I2C Master Count
0
8
MCR
I2C Master Configuration
0x20
-1
read-write
n
0x0
0x0
I2C_MCR_GFE
I2C Glitch Filter Enable
6
7
I2C_MCR_LPBK
I2C Loopback
0
1
I2C_MCR_MFE
I2C Master Function Enable
4
5
I2C_MCR_SFE
I2C Slave Function Enable
5
6
MCR2
I2C Master Configuration 2
0x38
-1
read-write
n
0x0
0x0
I2C_MCR2_GFPW
I2C Glitch Filter Pulse Width
4
7
I2C_MCR2_GFPW_BYPASS
Bypass
0x0
I2C_MCR2_GFPW_1
1 clock
0x1
I2C_MCR2_GFPW_2
2 clocks
0x2
I2C_MCR2_GFPW_3
3 clocks
0x3
I2C_MCR2_GFPW_4
4 clocks
0x4
I2C_MCR2_GFPW_8
8 clocks
0x5
I2C_MCR2_GFPW_16
16 clocks
0x6
I2C_MCR2_GFPW_31
31 clocks
0x7
MCS
I2C Master Control/Status
0x4
-1
read-write
n
0x0
0x0
I2C_MCS_ACK
Data Acknowledge Enable
3
4
I2C_MCS_ADRACK
Acknowledge Address
2
3
I2C_MCS_ARBLST
Arbitration Lost
4
5
I2C_MCS_BUSBSY
Bus Busy
6
7
I2C_MCS_BUSY
I2C Busy
0
1
I2C_MCS_CLKTO
Clock Timeout Error
7
8
I2C_MCS_DATACK
Acknowledge Data
3
4
I2C_MCS_ERROR
Error
1
2
I2C_MCS_HS
High-Speed Enable
4
5
I2C_MCS_IDLE
I2C Idle
5
6
I2C_MCS_RUN
I2C Master Enable
0
1
I2C_MCS_START
Generate START
1
2
I2C_MCS_STOP
Generate STOP
2
3
MDR
I2C Master Data
0x8
-1
read-write
n
0x0
0x0
I2C_MDR_DATA
This byte contains the data transferred during a transaction
0
8
MICR
I2C Master Interrupt Clear
0x1C
-1
write-only
n
0x0
0x0
I2C_MICR_CLKIC
Clock Timeout Interrupt Clear
1
2
write-only
I2C_MICR_IC
Master Interrupt Clear
0
1
write-only
MIMR
I2C Master Interrupt Mask
0x10
-1
read-write
n
0x0
0x0
I2C_MIMR_CLKIM
Clock Timeout Interrupt Mask
1
2
I2C_MIMR_IM
Master Interrupt Mask
0
1
MMIS
I2C Master Masked Interrupt Status
0x18
-1
read-write
n
0x0
0x0
I2C_MMIS_CLKMIS
Clock Timeout Masked Interrupt Status
1
2
I2C_MMIS_MIS
Masked Interrupt Status
0
1
MRIS
I2C Master Raw Interrupt Status
0x14
-1
read-write
n
0x0
0x0
I2C_MRIS_CLKRIS
Clock Timeout Raw Interrupt Status
1
2
I2C_MRIS_RIS
Master Raw Interrupt Status
0
1
MSA
I2C Master Slave Address
0x0
-1
read-write
n
0x0
0x0
I2C_MSA_RS
Receive not send
0
1
I2C_MSA_SA
I2C Slave Address
1
8
MTPR
I2C Master Timer Period
0xC
-1
read-write
n
0x0
0x0
I2C_MTPR_HS
High-Speed Enable
7
8
I2C_MTPR_TPR
Timer Period
0
7
PC
I2C Peripheral Configuration
0xFC4
-1
read-write
n
0x0
0x0
I2C_PC_HS
High-Speed Capable
0
1
PP
I2C Peripheral Properties
0xFC0
-1
read-write
n
0x0
0x0
I2C_PP_HS
High-Speed Capable
0
1
SACKCTL
I2C Slave ACK Control
0x820
-1
read-write
n
0x0
0x0
I2C_SACKCTL_ACKOEN
I2C Slave ACK Override Enable
0
1
I2C_SACKCTL_ACKOVAL
I2C Slave ACK Override Value
1
2
SCSR
I2C Slave Control/Status
0x804
-1
read-write
n
0x0
0x0
I2C_SCSR_DA
Device Active
0
1
I2C_SCSR_FBR
First Byte Received
2
3
I2C_SCSR_OAR2SEL
OAR2 Address Matched
3
4
I2C_SCSR_RREQ
Receive Request
0
1
I2C_SCSR_TREQ
Transmit Request
1
2
SDR
I2C Slave Data
0x808
-1
read-write
n
0x0
0x0
I2C_SDR_DATA
Data for Transfer
0
8
SICR
I2C Slave Interrupt Clear
0x818
-1
write-only
n
0x0
0x0
I2C_SICR_DATAIC
Data Interrupt Clear
0
1
write-only
I2C_SICR_STARTIC
Start Condition Interrupt Clear
1
2
write-only
I2C_SICR_STOPIC
Stop Condition Interrupt Clear
2
3
write-only
SIMR
I2C Slave Interrupt Mask
0x80C
-1
read-write
n
0x0
0x0
I2C_SIMR_DATAIM
Data Interrupt Mask
0
1
I2C_SIMR_STARTIM
Start Condition Interrupt Mask
1
2
I2C_SIMR_STOPIM
Stop Condition Interrupt Mask
2
3
SMIS
I2C Slave Masked Interrupt Status
0x814
-1
read-write
n
0x0
0x0
I2C_SMIS_DATAMIS
Data Masked Interrupt Status
0
1
I2C_SMIS_STARTMIS
Start Condition Masked Interrupt Status
1
2
I2C_SMIS_STOPMIS
Stop Condition Masked Interrupt Status
2
3
SOAR
I2C Slave Own Address
0x800
-1
read-write
n
0x0
0x0
I2C_SOAR_OAR
I2C Slave Own Address
0
7
SOAR2
I2C Slave Own Address 2
0x81C
-1
read-write
n
0x0
0x0
I2C_SOAR2_OAR2
I2C Slave Own Address 2
0
7
I2C_SOAR2_OAR2EN
I2C Slave Own Address 2 Enable
7
8
SRIS
I2C Slave Raw Interrupt Status
0x810
-1
read-write
n
0x0
0x0
I2C_SRIS_DATARIS
Data Raw Interrupt Status
0
1
I2C_SRIS_STARTRIS
Start Condition Raw Interrupt Status
1
2
I2C_SRIS_STOPRIS
Stop Condition Raw Interrupt Status
2
3
I2C1
Register map for I2C0 peripheral
I2C
0x0
0x0
0x1000
registers
n
I2C1
37
I2C0MBMON
I2C Master Bus Monitor
0x2C
read-write
n
0x0
0x0
I2C_MBMON_SCL
I2C SCL Status
0
1
I2C_MBMON_SDA
I2C SDA Status
1
2
I2C0MCLKOCNT
I2C Master Clock Low Timeout Count
0x24
read-write
n
0x0
0x0
I2C_MCLKOCNT_CNTL
I2C Master Count
0
8
I2C0MCR
I2C Master Configuration
0x20
read-write
n
0x0
0x0
I2C_MCR_GFE
I2C Glitch Filter Enable
6
7
I2C_MCR_LPBK
I2C Loopback
0
1
I2C_MCR_MFE
I2C Master Function Enable
4
5
I2C_MCR_SFE
I2C Slave Function Enable
5
6
I2C0MCR2
I2C Master Configuration 2
0x38
read-write
n
0x0
0x0
I2C_MCR2_GFPW
I2C Glitch Filter Pulse Width
4
7
I2C_MCR2_GFPW_BYPASS
Bypass
0x0
I2C_MCR2_GFPW_1
1 clock
0x1
I2C_MCR2_GFPW_2
2 clocks
0x2
I2C_MCR2_GFPW_3
3 clocks
0x3
I2C_MCR2_GFPW_4
4 clocks
0x4
I2C_MCR2_GFPW_8
8 clocks
0x5
I2C_MCR2_GFPW_16
16 clocks
0x6
I2C_MCR2_GFPW_32
32 clocks
0x7
I2C_MCR2_GFPW_31
31 clocks
0x7
I2C0MCS
I2C Master Control/Status
0x4
read-write
n
0x0
0x0
I2C_MCS_ACK
Data Acknowledge Enable
3
4
I2C_MCS_ADRACK
Acknowledge Address
2
3
I2C_MCS_ARBLST
Arbitration Lost
4
5
I2C_MCS_CLKTO
Clock Timeout Error
7
8
I2C_MCS_IDLE
I2C Idle
5
6
I2C_MCS_RUN
I2C Master Enable
0
1
I2C_MCS_START
Generate START
1
2
I2C0MDR
I2C Master Data
0x8
read-write
n
0x0
0x0
I2C_MDR_DATA
This byte contains the data transferred during a transaction
0
8
I2C0MICR
I2C Master Interrupt Clear
0x1C
write-only
n
0x0
0x0
I2C_MICR_CLKIC
Clock Timeout Interrupt Clear
1
2
write-only
I2C_MICR_IC
Master Interrupt Clear
0
1
write-only
I2C0MIMR
I2C Master Interrupt Mask
0x10
read-write
n
0x0
0x0
I2C_MIMR_CLKIM
Clock Timeout Interrupt Mask
1
2
I2C_MIMR_IM
Master Interrupt Mask
0
1
I2C0MMIS
I2C Master Masked Interrupt Status
0x18
read-write
n
0x0
0x0
I2C_MMIS_CLKMIS
Clock Timeout Masked Interrupt Status
1
2
I2C_MMIS_MIS
Masked Interrupt Status
0
1
I2C0MRIS
I2C Master Raw Interrupt Status
0x14
read-write
n
0x0
0x0
I2C_MRIS_CLKRIS
Clock Timeout Raw Interrupt Status
1
2
I2C_MRIS_RIS
Master Raw Interrupt Status
0
1
I2C0MSA
I2C Master Slave Address
0x0
read-write
n
0x0
0x0
I2C_MSA_RS
Receive not send
0
1
I2C_MSA_SA
I2C Slave Address
1
8
I2C0MTPR
I2C Master Timer Period
0xC
read-write
n
0x0
0x0
I2C_MTPR_HS
High-Speed Enable
7
8
I2C_MTPR_TPR
Timer Period
0
7
I2C0PC
I2C Peripheral Configuration
0xFC4
read-write
n
0x0
0x0
I2C_PC_HS
High-Speed Capable
0
1
I2C0PP
I2C Peripheral Properties
0xFC0
read-write
n
0x0
0x0
I2C_PP_HS
High-Speed Capable
0
1
I2C0SACKCTL
I2C Slave ACK Control
0x820
read-write
n
0x0
0x0
I2C_SACKCTL_ACKOEN
I2C Slave ACK Override Enable
0
1
I2C_SACKCTL_ACKOVAL
I2C Slave ACK Override Value
1
2
I2C0SCSR
I2C Slave Control/Status
0x804
read-write
n
0x0
0x0
I2C_SCSR_FBR
First Byte Received
2
3
I2C_SCSR_OAR2SEL
OAR2 Address Matched
3
4
I2C_SCSR_RREQ
Receive Request
0
1
I2C0SDR
I2C Slave Data
0x808
read-write
n
0x0
0x0
I2C_SDR_DATA
Data for Transfer
0
8
I2C0SICR
I2C Slave Interrupt Clear
0x818
write-only
n
0x0
0x0
I2C_SICR_DATAIC
Data Interrupt Clear
0
1
write-only
I2C_SICR_STARTIC
Start Condition Interrupt Clear
1
2
write-only
I2C_SICR_STOPIC
Stop Condition Interrupt Clear
2
3
write-only
I2C0SIMR
I2C Slave Interrupt Mask
0x80C
read-write
n
0x0
0x0
I2C_SIMR_DATAIM
Data Interrupt Mask
0
1
I2C_SIMR_STARTIM
Start Condition Interrupt Mask
1
2
I2C_SIMR_STOPIM
Stop Condition Interrupt Mask
2
3
I2C0SMIS
I2C Slave Masked Interrupt Status
0x814
read-write
n
0x0
0x0
I2C_SMIS_DATAMIS
Data Masked Interrupt Status
0
1
I2C_SMIS_STARTMIS
Start Condition Masked Interrupt Status
1
2
I2C_SMIS_STOPMIS
Stop Condition Masked Interrupt Status
2
3
I2C0SOAR
I2C Slave Own Address
0x800
read-write
n
0x0
0x0
I2C_SOAR_OAR
I2C Slave Own Address
0
7
I2C0SOAR2
I2C Slave Own Address 2
0x81C
read-write
n
0x0
0x0
I2C_SOAR2_OAR2
I2C Slave Own Address 2
0
7
I2C_SOAR2_OAR2EN
I2C Slave Own Address 2 Enable
7
8
I2C0SRIS
I2C Slave Raw Interrupt Status
0x810
read-write
n
0x0
0x0
I2C_SRIS_DATARIS
Data Raw Interrupt Status
0
1
I2C_SRIS_STARTRIS
Start Condition Raw Interrupt Status
1
2
I2C_SRIS_STOPRIS
Stop Condition Raw Interrupt Status
2
3
MBMON
I2C Master Bus Monitor
0x2C
-1
read-write
n
0x0
0x0
I2C_MBMON_SCL
I2C SCL Status
0
1
I2C_MBMON_SDA
I2C SDA Status
1
2
MCLKOCNT
I2C Master Clock Low Timeout Count
0x24
-1
read-write
n
0x0
0x0
I2C_MCLKOCNT_CNTL
I2C Master Count
0
8
MCR
I2C Master Configuration
0x20
-1
read-write
n
0x0
0x0
I2C_MCR_GFE
I2C Glitch Filter Enable
6
7
I2C_MCR_LPBK
I2C Loopback
0
1
I2C_MCR_MFE
I2C Master Function Enable
4
5
I2C_MCR_SFE
I2C Slave Function Enable
5
6
MCR2
I2C Master Configuration 2
0x38
-1
read-write
n
0x0
0x0
I2C_MCR2_GFPW
I2C Glitch Filter Pulse Width
4
7
I2C_MCR2_GFPW_BYPASS
Bypass
0x0
I2C_MCR2_GFPW_1
1 clock
0x1
I2C_MCR2_GFPW_2
2 clocks
0x2
I2C_MCR2_GFPW_3
3 clocks
0x3
I2C_MCR2_GFPW_4
4 clocks
0x4
I2C_MCR2_GFPW_8
8 clocks
0x5
I2C_MCR2_GFPW_16
16 clocks
0x6
I2C_MCR2_GFPW_31
31 clocks
0x7
MCS
I2C Master Control/Status
0x4
-1
read-write
n
0x0
0x0
I2C_MCS_ACK
Data Acknowledge Enable
3
4
I2C_MCS_ADRACK
Acknowledge Address
2
3
I2C_MCS_ARBLST
Arbitration Lost
4
5
I2C_MCS_BUSBSY
Bus Busy
6
7
I2C_MCS_BUSY
I2C Busy
0
1
I2C_MCS_CLKTO
Clock Timeout Error
7
8
I2C_MCS_DATACK
Acknowledge Data
3
4
I2C_MCS_ERROR
Error
1
2
I2C_MCS_HS
High-Speed Enable
4
5
I2C_MCS_IDLE
I2C Idle
5
6
I2C_MCS_RUN
I2C Master Enable
0
1
I2C_MCS_START
Generate START
1
2
I2C_MCS_STOP
Generate STOP
2
3
MDR
I2C Master Data
0x8
-1
read-write
n
0x0
0x0
I2C_MDR_DATA
This byte contains the data transferred during a transaction
0
8
MICR
I2C Master Interrupt Clear
0x1C
-1
write-only
n
0x0
0x0
I2C_MICR_CLKIC
Clock Timeout Interrupt Clear
1
2
write-only
I2C_MICR_IC
Master Interrupt Clear
0
1
write-only
MIMR
I2C Master Interrupt Mask
0x10
-1
read-write
n
0x0
0x0
I2C_MIMR_CLKIM
Clock Timeout Interrupt Mask
1
2
I2C_MIMR_IM
Master Interrupt Mask
0
1
MMIS
I2C Master Masked Interrupt Status
0x18
-1
read-write
n
0x0
0x0
I2C_MMIS_CLKMIS
Clock Timeout Masked Interrupt Status
1
2
I2C_MMIS_MIS
Masked Interrupt Status
0
1
MRIS
I2C Master Raw Interrupt Status
0x14
-1
read-write
n
0x0
0x0
I2C_MRIS_CLKRIS
Clock Timeout Raw Interrupt Status
1
2
I2C_MRIS_RIS
Master Raw Interrupt Status
0
1
MSA
I2C Master Slave Address
0x0
-1
read-write
n
0x0
0x0
I2C_MSA_RS
Receive not send
0
1
I2C_MSA_SA
I2C Slave Address
1
8
MTPR
I2C Master Timer Period
0xC
-1
read-write
n
0x0
0x0
I2C_MTPR_HS
High-Speed Enable
7
8
I2C_MTPR_TPR
Timer Period
0
7
PC
I2C Peripheral Configuration
0xFC4
-1
read-write
n
0x0
0x0
I2C_PC_HS
High-Speed Capable
0
1
PP
I2C Peripheral Properties
0xFC0
-1
read-write
n
0x0
0x0
I2C_PP_HS
High-Speed Capable
0
1
SACKCTL
I2C Slave ACK Control
0x820
-1
read-write
n
0x0
0x0
I2C_SACKCTL_ACKOEN
I2C Slave ACK Override Enable
0
1
I2C_SACKCTL_ACKOVAL
I2C Slave ACK Override Value
1
2
SCSR
I2C Slave Control/Status
0x804
-1
read-write
n
0x0
0x0
I2C_SCSR_DA
Device Active
0
1
I2C_SCSR_FBR
First Byte Received
2
3
I2C_SCSR_OAR2SEL
OAR2 Address Matched
3
4
I2C_SCSR_RREQ
Receive Request
0
1
I2C_SCSR_TREQ
Transmit Request
1
2
SDR
I2C Slave Data
0x808
-1
read-write
n
0x0
0x0
I2C_SDR_DATA
Data for Transfer
0
8
SICR
I2C Slave Interrupt Clear
0x818
-1
write-only
n
0x0
0x0
I2C_SICR_DATAIC
Data Interrupt Clear
0
1
write-only
I2C_SICR_STARTIC
Start Condition Interrupt Clear
1
2
write-only
I2C_SICR_STOPIC
Stop Condition Interrupt Clear
2
3
write-only
SIMR
I2C Slave Interrupt Mask
0x80C
-1
read-write
n
0x0
0x0
I2C_SIMR_DATAIM
Data Interrupt Mask
0
1
I2C_SIMR_STARTIM
Start Condition Interrupt Mask
1
2
I2C_SIMR_STOPIM
Stop Condition Interrupt Mask
2
3
SMIS
I2C Slave Masked Interrupt Status
0x814
-1
read-write
n
0x0
0x0
I2C_SMIS_DATAMIS
Data Masked Interrupt Status
0
1
I2C_SMIS_STARTMIS
Start Condition Masked Interrupt Status
1
2
I2C_SMIS_STOPMIS
Stop Condition Masked Interrupt Status
2
3
SOAR
I2C Slave Own Address
0x800
-1
read-write
n
0x0
0x0
I2C_SOAR_OAR
I2C Slave Own Address
0
7
SOAR2
I2C Slave Own Address 2
0x81C
-1
read-write
n
0x0
0x0
I2C_SOAR2_OAR2
I2C Slave Own Address 2
0
7
I2C_SOAR2_OAR2EN
I2C Slave Own Address 2 Enable
7
8
SRIS
I2C Slave Raw Interrupt Status
0x810
-1
read-write
n
0x0
0x0
I2C_SRIS_DATARIS
Data Raw Interrupt Status
0
1
I2C_SRIS_STARTRIS
Start Condition Raw Interrupt Status
1
2
I2C_SRIS_STOPRIS
Stop Condition Raw Interrupt Status
2
3
I2C2
Register map for I2C0 peripheral
I2C
0x0
0x0
0x1000
registers
n
I2C2
68
I2C0MBMON
I2C Master Bus Monitor
0x2C
read-write
n
0x0
0x0
I2C_MBMON_SCL
I2C SCL Status
0
1
I2C_MBMON_SDA
I2C SDA Status
1
2
I2C0MCLKOCNT
I2C Master Clock Low Timeout Count
0x24
read-write
n
0x0
0x0
I2C_MCLKOCNT_CNTL
I2C Master Count
0
8
I2C0MCR
I2C Master Configuration
0x20
read-write
n
0x0
0x0
I2C_MCR_GFE
I2C Glitch Filter Enable
6
7
I2C_MCR_LPBK
I2C Loopback
0
1
I2C_MCR_MFE
I2C Master Function Enable
4
5
I2C_MCR_SFE
I2C Slave Function Enable
5
6
I2C0MCR2
I2C Master Configuration 2
0x38
read-write
n
0x0
0x0
I2C_MCR2_GFPW
I2C Glitch Filter Pulse Width
4
7
I2C_MCR2_GFPW_BYPASS
Bypass
0x0
I2C_MCR2_GFPW_1
1 clock
0x1
I2C_MCR2_GFPW_2
2 clocks
0x2
I2C_MCR2_GFPW_3
3 clocks
0x3
I2C_MCR2_GFPW_4
4 clocks
0x4
I2C_MCR2_GFPW_8
8 clocks
0x5
I2C_MCR2_GFPW_16
16 clocks
0x6
I2C_MCR2_GFPW_32
32 clocks
0x7
I2C_MCR2_GFPW_31
31 clocks
0x7
I2C0MCS
I2C Master Control/Status
0x4
read-write
n
0x0
0x0
I2C_MCS_ACK
Data Acknowledge Enable
3
4
I2C_MCS_ADRACK
Acknowledge Address
2
3
I2C_MCS_ARBLST
Arbitration Lost
4
5
I2C_MCS_CLKTO
Clock Timeout Error
7
8
I2C_MCS_IDLE
I2C Idle
5
6
I2C_MCS_RUN
I2C Master Enable
0
1
I2C_MCS_START
Generate START
1
2
I2C0MDR
I2C Master Data
0x8
read-write
n
0x0
0x0
I2C_MDR_DATA
This byte contains the data transferred during a transaction
0
8
I2C0MICR
I2C Master Interrupt Clear
0x1C
write-only
n
0x0
0x0
I2C_MICR_CLKIC
Clock Timeout Interrupt Clear
1
2
write-only
I2C_MICR_IC
Master Interrupt Clear
0
1
write-only
I2C0MIMR
I2C Master Interrupt Mask
0x10
read-write
n
0x0
0x0
I2C_MIMR_CLKIM
Clock Timeout Interrupt Mask
1
2
I2C_MIMR_IM
Master Interrupt Mask
0
1
I2C0MMIS
I2C Master Masked Interrupt Status
0x18
read-write
n
0x0
0x0
I2C_MMIS_CLKMIS
Clock Timeout Masked Interrupt Status
1
2
I2C_MMIS_MIS
Masked Interrupt Status
0
1
I2C0MRIS
I2C Master Raw Interrupt Status
0x14
read-write
n
0x0
0x0
I2C_MRIS_CLKRIS
Clock Timeout Raw Interrupt Status
1
2
I2C_MRIS_RIS
Master Raw Interrupt Status
0
1
I2C0MSA
I2C Master Slave Address
0x0
read-write
n
0x0
0x0
I2C_MSA_RS
Receive not send
0
1
I2C_MSA_SA
I2C Slave Address
1
8
I2C0MTPR
I2C Master Timer Period
0xC
read-write
n
0x0
0x0
I2C_MTPR_HS
High-Speed Enable
7
8
I2C_MTPR_TPR
Timer Period
0
7
I2C0PC
I2C Peripheral Configuration
0xFC4
read-write
n
0x0
0x0
I2C_PC_HS
High-Speed Capable
0
1
I2C0PP
I2C Peripheral Properties
0xFC0
read-write
n
0x0
0x0
I2C_PP_HS
High-Speed Capable
0
1
I2C0SACKCTL
I2C Slave ACK Control
0x820
read-write
n
0x0
0x0
I2C_SACKCTL_ACKOEN
I2C Slave ACK Override Enable
0
1
I2C_SACKCTL_ACKOVAL
I2C Slave ACK Override Value
1
2
I2C0SCSR
I2C Slave Control/Status
0x804
read-write
n
0x0
0x0
I2C_SCSR_FBR
First Byte Received
2
3
I2C_SCSR_OAR2SEL
OAR2 Address Matched
3
4
I2C_SCSR_RREQ
Receive Request
0
1
I2C0SDR
I2C Slave Data
0x808
read-write
n
0x0
0x0
I2C_SDR_DATA
Data for Transfer
0
8
I2C0SICR
I2C Slave Interrupt Clear
0x818
write-only
n
0x0
0x0
I2C_SICR_DATAIC
Data Interrupt Clear
0
1
write-only
I2C_SICR_STARTIC
Start Condition Interrupt Clear
1
2
write-only
I2C_SICR_STOPIC
Stop Condition Interrupt Clear
2
3
write-only
I2C0SIMR
I2C Slave Interrupt Mask
0x80C
read-write
n
0x0
0x0
I2C_SIMR_DATAIM
Data Interrupt Mask
0
1
I2C_SIMR_STARTIM
Start Condition Interrupt Mask
1
2
I2C_SIMR_STOPIM
Stop Condition Interrupt Mask
2
3
I2C0SMIS
I2C Slave Masked Interrupt Status
0x814
read-write
n
0x0
0x0
I2C_SMIS_DATAMIS
Data Masked Interrupt Status
0
1
I2C_SMIS_STARTMIS
Start Condition Masked Interrupt Status
1
2
I2C_SMIS_STOPMIS
Stop Condition Masked Interrupt Status
2
3
I2C0SOAR
I2C Slave Own Address
0x800
read-write
n
0x0
0x0
I2C_SOAR_OAR
I2C Slave Own Address
0
7
I2C0SOAR2
I2C Slave Own Address 2
0x81C
read-write
n
0x0
0x0
I2C_SOAR2_OAR2
I2C Slave Own Address 2
0
7
I2C_SOAR2_OAR2EN
I2C Slave Own Address 2 Enable
7
8
I2C0SRIS
I2C Slave Raw Interrupt Status
0x810
read-write
n
0x0
0x0
I2C_SRIS_DATARIS
Data Raw Interrupt Status
0
1
I2C_SRIS_STARTRIS
Start Condition Raw Interrupt Status
1
2
I2C_SRIS_STOPRIS
Stop Condition Raw Interrupt Status
2
3
MBMON
I2C Master Bus Monitor
0x2C
-1
read-write
n
0x0
0x0
I2C_MBMON_SCL
I2C SCL Status
0
1
I2C_MBMON_SDA
I2C SDA Status
1
2
MCLKOCNT
I2C Master Clock Low Timeout Count
0x24
-1
read-write
n
0x0
0x0
I2C_MCLKOCNT_CNTL
I2C Master Count
0
8
MCR
I2C Master Configuration
0x20
-1
read-write
n
0x0
0x0
I2C_MCR_GFE
I2C Glitch Filter Enable
6
7
I2C_MCR_LPBK
I2C Loopback
0
1
I2C_MCR_MFE
I2C Master Function Enable
4
5
I2C_MCR_SFE
I2C Slave Function Enable
5
6
MCR2
I2C Master Configuration 2
0x38
-1
read-write
n
0x0
0x0
I2C_MCR2_GFPW
I2C Glitch Filter Pulse Width
4
7
I2C_MCR2_GFPW_BYPASS
Bypass
0x0
I2C_MCR2_GFPW_1
1 clock
0x1
I2C_MCR2_GFPW_2
2 clocks
0x2
I2C_MCR2_GFPW_3
3 clocks
0x3
I2C_MCR2_GFPW_4
4 clocks
0x4
I2C_MCR2_GFPW_8
8 clocks
0x5
I2C_MCR2_GFPW_16
16 clocks
0x6
I2C_MCR2_GFPW_31
31 clocks
0x7
MCS
I2C Master Control/Status
0x4
-1
read-write
n
0x0
0x0
I2C_MCS_ACK
Data Acknowledge Enable
3
4
I2C_MCS_ADRACK
Acknowledge Address
2
3
I2C_MCS_ARBLST
Arbitration Lost
4
5
I2C_MCS_BUSBSY
Bus Busy
6
7
I2C_MCS_BUSY
I2C Busy
0
1
I2C_MCS_CLKTO
Clock Timeout Error
7
8
I2C_MCS_DATACK
Acknowledge Data
3
4
I2C_MCS_ERROR
Error
1
2
I2C_MCS_HS
High-Speed Enable
4
5
I2C_MCS_IDLE
I2C Idle
5
6
I2C_MCS_RUN
I2C Master Enable
0
1
I2C_MCS_START
Generate START
1
2
I2C_MCS_STOP
Generate STOP
2
3
MDR
I2C Master Data
0x8
-1
read-write
n
0x0
0x0
I2C_MDR_DATA
This byte contains the data transferred during a transaction
0
8
MICR
I2C Master Interrupt Clear
0x1C
-1
write-only
n
0x0
0x0
I2C_MICR_CLKIC
Clock Timeout Interrupt Clear
1
2
write-only
I2C_MICR_IC
Master Interrupt Clear
0
1
write-only
MIMR
I2C Master Interrupt Mask
0x10
-1
read-write
n
0x0
0x0
I2C_MIMR_CLKIM
Clock Timeout Interrupt Mask
1
2
I2C_MIMR_IM
Master Interrupt Mask
0
1
MMIS
I2C Master Masked Interrupt Status
0x18
-1
read-write
n
0x0
0x0
I2C_MMIS_CLKMIS
Clock Timeout Masked Interrupt Status
1
2
I2C_MMIS_MIS
Masked Interrupt Status
0
1
MRIS
I2C Master Raw Interrupt Status
0x14
-1
read-write
n
0x0
0x0
I2C_MRIS_CLKRIS
Clock Timeout Raw Interrupt Status
1
2
I2C_MRIS_RIS
Master Raw Interrupt Status
0
1
MSA
I2C Master Slave Address
0x0
-1
read-write
n
0x0
0x0
I2C_MSA_RS
Receive not send
0
1
I2C_MSA_SA
I2C Slave Address
1
8
MTPR
I2C Master Timer Period
0xC
-1
read-write
n
0x0
0x0
I2C_MTPR_HS
High-Speed Enable
7
8
I2C_MTPR_TPR
Timer Period
0
7
PC
I2C Peripheral Configuration
0xFC4
-1
read-write
n
0x0
0x0
I2C_PC_HS
High-Speed Capable
0
1
PP
I2C Peripheral Properties
0xFC0
-1
read-write
n
0x0
0x0
I2C_PP_HS
High-Speed Capable
0
1
SACKCTL
I2C Slave ACK Control
0x820
-1
read-write
n
0x0
0x0
I2C_SACKCTL_ACKOEN
I2C Slave ACK Override Enable
0
1
I2C_SACKCTL_ACKOVAL
I2C Slave ACK Override Value
1
2
SCSR
I2C Slave Control/Status
0x804
-1
read-write
n
0x0
0x0
I2C_SCSR_DA
Device Active
0
1
I2C_SCSR_FBR
First Byte Received
2
3
I2C_SCSR_OAR2SEL
OAR2 Address Matched
3
4
I2C_SCSR_RREQ
Receive Request
0
1
I2C_SCSR_TREQ
Transmit Request
1
2
SDR
I2C Slave Data
0x808
-1
read-write
n
0x0
0x0
I2C_SDR_DATA
Data for Transfer
0
8
SICR
I2C Slave Interrupt Clear
0x818
-1
write-only
n
0x0
0x0
I2C_SICR_DATAIC
Data Interrupt Clear
0
1
write-only
I2C_SICR_STARTIC
Start Condition Interrupt Clear
1
2
write-only
I2C_SICR_STOPIC
Stop Condition Interrupt Clear
2
3
write-only
SIMR
I2C Slave Interrupt Mask
0x80C
-1
read-write
n
0x0
0x0
I2C_SIMR_DATAIM
Data Interrupt Mask
0
1
I2C_SIMR_STARTIM
Start Condition Interrupt Mask
1
2
I2C_SIMR_STOPIM
Stop Condition Interrupt Mask
2
3
SMIS
I2C Slave Masked Interrupt Status
0x814
-1
read-write
n
0x0
0x0
I2C_SMIS_DATAMIS
Data Masked Interrupt Status
0
1
I2C_SMIS_STARTMIS
Start Condition Masked Interrupt Status
1
2
I2C_SMIS_STOPMIS
Stop Condition Masked Interrupt Status
2
3
SOAR
I2C Slave Own Address
0x800
-1
read-write
n
0x0
0x0
I2C_SOAR_OAR
I2C Slave Own Address
0
7
SOAR2
I2C Slave Own Address 2
0x81C
-1
read-write
n
0x0
0x0
I2C_SOAR2_OAR2
I2C Slave Own Address 2
0
7
I2C_SOAR2_OAR2EN
I2C Slave Own Address 2 Enable
7
8
SRIS
I2C Slave Raw Interrupt Status
0x810
-1
read-write
n
0x0
0x0
I2C_SRIS_DATARIS
Data Raw Interrupt Status
0
1
I2C_SRIS_STARTRIS
Start Condition Raw Interrupt Status
1
2
I2C_SRIS_STOPRIS
Stop Condition Raw Interrupt Status
2
3
I2C3
Register map for I2C0 peripheral
I2C
0x0
0x0
0x1000
registers
n
I2C3
69
I2C0MBMON
I2C Master Bus Monitor
0x2C
read-write
n
0x0
0x0
I2C_MBMON_SCL
I2C SCL Status
0
1
I2C_MBMON_SDA
I2C SDA Status
1
2
I2C0MCLKOCNT
I2C Master Clock Low Timeout Count
0x24
read-write
n
0x0
0x0
I2C_MCLKOCNT_CNTL
I2C Master Count
0
8
I2C0MCR
I2C Master Configuration
0x20
read-write
n
0x0
0x0
I2C_MCR_GFE
I2C Glitch Filter Enable
6
7
I2C_MCR_LPBK
I2C Loopback
0
1
I2C_MCR_MFE
I2C Master Function Enable
4
5
I2C_MCR_SFE
I2C Slave Function Enable
5
6
I2C0MCR2
I2C Master Configuration 2
0x38
read-write
n
0x0
0x0
I2C_MCR2_GFPW
I2C Glitch Filter Pulse Width
4
7
I2C_MCR2_GFPW_BYPASS
Bypass
0x0
I2C_MCR2_GFPW_1
1 clock
0x1
I2C_MCR2_GFPW_2
2 clocks
0x2
I2C_MCR2_GFPW_3
3 clocks
0x3
I2C_MCR2_GFPW_4
4 clocks
0x4
I2C_MCR2_GFPW_8
8 clocks
0x5
I2C_MCR2_GFPW_16
16 clocks
0x6
I2C_MCR2_GFPW_32
32 clocks
0x7
I2C_MCR2_GFPW_31
31 clocks
0x7
I2C0MCS
I2C Master Control/Status
0x4
read-write
n
0x0
0x0
I2C_MCS_ACK
Data Acknowledge Enable
3
4
I2C_MCS_ADRACK
Acknowledge Address
2
3
I2C_MCS_ARBLST
Arbitration Lost
4
5
I2C_MCS_CLKTO
Clock Timeout Error
7
8
I2C_MCS_IDLE
I2C Idle
5
6
I2C_MCS_RUN
I2C Master Enable
0
1
I2C_MCS_START
Generate START
1
2
I2C0MDR
I2C Master Data
0x8
read-write
n
0x0
0x0
I2C_MDR_DATA
This byte contains the data transferred during a transaction
0
8
I2C0MICR
I2C Master Interrupt Clear
0x1C
write-only
n
0x0
0x0
I2C_MICR_CLKIC
Clock Timeout Interrupt Clear
1
2
write-only
I2C_MICR_IC
Master Interrupt Clear
0
1
write-only
I2C0MIMR
I2C Master Interrupt Mask
0x10
read-write
n
0x0
0x0
I2C_MIMR_CLKIM
Clock Timeout Interrupt Mask
1
2
I2C_MIMR_IM
Master Interrupt Mask
0
1
I2C0MMIS
I2C Master Masked Interrupt Status
0x18
read-write
n
0x0
0x0
I2C_MMIS_CLKMIS
Clock Timeout Masked Interrupt Status
1
2
I2C_MMIS_MIS
Masked Interrupt Status
0
1
I2C0MRIS
I2C Master Raw Interrupt Status
0x14
read-write
n
0x0
0x0
I2C_MRIS_CLKRIS
Clock Timeout Raw Interrupt Status
1
2
I2C_MRIS_RIS
Master Raw Interrupt Status
0
1
I2C0MSA
I2C Master Slave Address
0x0
read-write
n
0x0
0x0
I2C_MSA_RS
Receive not send
0
1
I2C_MSA_SA
I2C Slave Address
1
8
I2C0MTPR
I2C Master Timer Period
0xC
read-write
n
0x0
0x0
I2C_MTPR_HS
High-Speed Enable
7
8
I2C_MTPR_TPR
Timer Period
0
7
I2C0PC
I2C Peripheral Configuration
0xFC4
read-write
n
0x0
0x0
I2C_PC_HS
High-Speed Capable
0
1
I2C0PP
I2C Peripheral Properties
0xFC0
read-write
n
0x0
0x0
I2C_PP_HS
High-Speed Capable
0
1
I2C0SACKCTL
I2C Slave ACK Control
0x820
read-write
n
0x0
0x0
I2C_SACKCTL_ACKOEN
I2C Slave ACK Override Enable
0
1
I2C_SACKCTL_ACKOVAL
I2C Slave ACK Override Value
1
2
I2C0SCSR
I2C Slave Control/Status
0x804
read-write
n
0x0
0x0
I2C_SCSR_FBR
First Byte Received
2
3
I2C_SCSR_OAR2SEL
OAR2 Address Matched
3
4
I2C_SCSR_RREQ
Receive Request
0
1
I2C0SDR
I2C Slave Data
0x808
read-write
n
0x0
0x0
I2C_SDR_DATA
Data for Transfer
0
8
I2C0SICR
I2C Slave Interrupt Clear
0x818
write-only
n
0x0
0x0
I2C_SICR_DATAIC
Data Interrupt Clear
0
1
write-only
I2C_SICR_STARTIC
Start Condition Interrupt Clear
1
2
write-only
I2C_SICR_STOPIC
Stop Condition Interrupt Clear
2
3
write-only
I2C0SIMR
I2C Slave Interrupt Mask
0x80C
read-write
n
0x0
0x0
I2C_SIMR_DATAIM
Data Interrupt Mask
0
1
I2C_SIMR_STARTIM
Start Condition Interrupt Mask
1
2
I2C_SIMR_STOPIM
Stop Condition Interrupt Mask
2
3
I2C0SMIS
I2C Slave Masked Interrupt Status
0x814
read-write
n
0x0
0x0
I2C_SMIS_DATAMIS
Data Masked Interrupt Status
0
1
I2C_SMIS_STARTMIS
Start Condition Masked Interrupt Status
1
2
I2C_SMIS_STOPMIS
Stop Condition Masked Interrupt Status
2
3
I2C0SOAR
I2C Slave Own Address
0x800
read-write
n
0x0
0x0
I2C_SOAR_OAR
I2C Slave Own Address
0
7
I2C0SOAR2
I2C Slave Own Address 2
0x81C
read-write
n
0x0
0x0
I2C_SOAR2_OAR2
I2C Slave Own Address 2
0
7
I2C_SOAR2_OAR2EN
I2C Slave Own Address 2 Enable
7
8
I2C0SRIS
I2C Slave Raw Interrupt Status
0x810
read-write
n
0x0
0x0
I2C_SRIS_DATARIS
Data Raw Interrupt Status
0
1
I2C_SRIS_STARTRIS
Start Condition Raw Interrupt Status
1
2
I2C_SRIS_STOPRIS
Stop Condition Raw Interrupt Status
2
3
MBMON
I2C Master Bus Monitor
0x2C
-1
read-write
n
0x0
0x0
I2C_MBMON_SCL
I2C SCL Status
0
1
I2C_MBMON_SDA
I2C SDA Status
1
2
MCLKOCNT
I2C Master Clock Low Timeout Count
0x24
-1
read-write
n
0x0
0x0
I2C_MCLKOCNT_CNTL
I2C Master Count
0
8
MCR
I2C Master Configuration
0x20
-1
read-write
n
0x0
0x0
I2C_MCR_GFE
I2C Glitch Filter Enable
6
7
I2C_MCR_LPBK
I2C Loopback
0
1
I2C_MCR_MFE
I2C Master Function Enable
4
5
I2C_MCR_SFE
I2C Slave Function Enable
5
6
MCR2
I2C Master Configuration 2
0x38
-1
read-write
n
0x0
0x0
I2C_MCR2_GFPW
I2C Glitch Filter Pulse Width
4
7
I2C_MCR2_GFPW_BYPASS
Bypass
0x0
I2C_MCR2_GFPW_1
1 clock
0x1
I2C_MCR2_GFPW_2
2 clocks
0x2
I2C_MCR2_GFPW_3
3 clocks
0x3
I2C_MCR2_GFPW_4
4 clocks
0x4
I2C_MCR2_GFPW_8
8 clocks
0x5
I2C_MCR2_GFPW_16
16 clocks
0x6
I2C_MCR2_GFPW_31
31 clocks
0x7
MCS
I2C Master Control/Status
0x4
-1
read-write
n
0x0
0x0
I2C_MCS_ACK
Data Acknowledge Enable
3
4
I2C_MCS_ADRACK
Acknowledge Address
2
3
I2C_MCS_ARBLST
Arbitration Lost
4
5
I2C_MCS_BUSBSY
Bus Busy
6
7
I2C_MCS_BUSY
I2C Busy
0
1
I2C_MCS_CLKTO
Clock Timeout Error
7
8
I2C_MCS_DATACK
Acknowledge Data
3
4
I2C_MCS_ERROR
Error
1
2
I2C_MCS_HS
High-Speed Enable
4
5
I2C_MCS_IDLE
I2C Idle
5
6
I2C_MCS_RUN
I2C Master Enable
0
1
I2C_MCS_START
Generate START
1
2
I2C_MCS_STOP
Generate STOP
2
3
MDR
I2C Master Data
0x8
-1
read-write
n
0x0
0x0
I2C_MDR_DATA
This byte contains the data transferred during a transaction
0
8
MICR
I2C Master Interrupt Clear
0x1C
-1
write-only
n
0x0
0x0
I2C_MICR_CLKIC
Clock Timeout Interrupt Clear
1
2
write-only
I2C_MICR_IC
Master Interrupt Clear
0
1
write-only
MIMR
I2C Master Interrupt Mask
0x10
-1
read-write
n
0x0
0x0
I2C_MIMR_CLKIM
Clock Timeout Interrupt Mask
1
2
I2C_MIMR_IM
Master Interrupt Mask
0
1
MMIS
I2C Master Masked Interrupt Status
0x18
-1
read-write
n
0x0
0x0
I2C_MMIS_CLKMIS
Clock Timeout Masked Interrupt Status
1
2
I2C_MMIS_MIS
Masked Interrupt Status
0
1
MRIS
I2C Master Raw Interrupt Status
0x14
-1
read-write
n
0x0
0x0
I2C_MRIS_CLKRIS
Clock Timeout Raw Interrupt Status
1
2
I2C_MRIS_RIS
Master Raw Interrupt Status
0
1
MSA
I2C Master Slave Address
0x0
-1
read-write
n
0x0
0x0
I2C_MSA_RS
Receive not send
0
1
I2C_MSA_SA
I2C Slave Address
1
8
MTPR
I2C Master Timer Period
0xC
-1
read-write
n
0x0
0x0
I2C_MTPR_HS
High-Speed Enable
7
8
I2C_MTPR_TPR
Timer Period
0
7
PC
I2C Peripheral Configuration
0xFC4
-1
read-write
n
0x0
0x0
I2C_PC_HS
High-Speed Capable
0
1
PP
I2C Peripheral Properties
0xFC0
-1
read-write
n
0x0
0x0
I2C_PP_HS
High-Speed Capable
0
1
SACKCTL
I2C Slave ACK Control
0x820
-1
read-write
n
0x0
0x0
I2C_SACKCTL_ACKOEN
I2C Slave ACK Override Enable
0
1
I2C_SACKCTL_ACKOVAL
I2C Slave ACK Override Value
1
2
SCSR
I2C Slave Control/Status
0x804
-1
read-write
n
0x0
0x0
I2C_SCSR_DA
Device Active
0
1
I2C_SCSR_FBR
First Byte Received
2
3
I2C_SCSR_OAR2SEL
OAR2 Address Matched
3
4
I2C_SCSR_RREQ
Receive Request
0
1
I2C_SCSR_TREQ
Transmit Request
1
2
SDR
I2C Slave Data
0x808
-1
read-write
n
0x0
0x0
I2C_SDR_DATA
Data for Transfer
0
8
SICR
I2C Slave Interrupt Clear
0x818
-1
write-only
n
0x0
0x0
I2C_SICR_DATAIC
Data Interrupt Clear
0
1
write-only
I2C_SICR_STARTIC
Start Condition Interrupt Clear
1
2
write-only
I2C_SICR_STOPIC
Stop Condition Interrupt Clear
2
3
write-only
SIMR
I2C Slave Interrupt Mask
0x80C
-1
read-write
n
0x0
0x0
I2C_SIMR_DATAIM
Data Interrupt Mask
0
1
I2C_SIMR_STARTIM
Start Condition Interrupt Mask
1
2
I2C_SIMR_STOPIM
Stop Condition Interrupt Mask
2
3
SMIS
I2C Slave Masked Interrupt Status
0x814
-1
read-write
n
0x0
0x0
I2C_SMIS_DATAMIS
Data Masked Interrupt Status
0
1
I2C_SMIS_STARTMIS
Start Condition Masked Interrupt Status
1
2
I2C_SMIS_STOPMIS
Stop Condition Masked Interrupt Status
2
3
SOAR
I2C Slave Own Address
0x800
-1
read-write
n
0x0
0x0
I2C_SOAR_OAR
I2C Slave Own Address
0
7
SOAR2
I2C Slave Own Address 2
0x81C
-1
read-write
n
0x0
0x0
I2C_SOAR2_OAR2
I2C Slave Own Address 2
0
7
I2C_SOAR2_OAR2EN
I2C Slave Own Address 2 Enable
7
8
SRIS
I2C Slave Raw Interrupt Status
0x810
-1
read-write
n
0x0
0x0
I2C_SRIS_DATARIS
Data Raw Interrupt Status
0
1
I2C_SRIS_STARTRIS
Start Condition Raw Interrupt Status
1
2
I2C_SRIS_STOPRIS
Stop Condition Raw Interrupt Status
2
3
I2C4
Register map for I2C0 peripheral
I2C
0x0
0x0
0x1000
registers
n
I2C4
109
I2C0MBMON
I2C Master Bus Monitor
0x2C
read-write
n
0x0
0x0
I2C_MBMON_SCL
I2C SCL Status
0
1
I2C_MBMON_SDA
I2C SDA Status
1
2
I2C0MCLKOCNT
I2C Master Clock Low Timeout Count
0x24
read-write
n
0x0
0x0
I2C_MCLKOCNT_CNTL
I2C Master Count
0
8
I2C0MCR
I2C Master Configuration
0x20
read-write
n
0x0
0x0
I2C_MCR_GFE
I2C Glitch Filter Enable
6
7
I2C_MCR_LPBK
I2C Loopback
0
1
I2C_MCR_MFE
I2C Master Function Enable
4
5
I2C_MCR_SFE
I2C Slave Function Enable
5
6
I2C0MCR2
I2C Master Configuration 2
0x38
read-write
n
0x0
0x0
I2C_MCR2_GFPW
I2C Glitch Filter Pulse Width
4
7
I2C_MCR2_GFPW_BYPASS
Bypass
0x0
I2C_MCR2_GFPW_1
1 clock
0x1
I2C_MCR2_GFPW_2
2 clocks
0x2
I2C_MCR2_GFPW_3
3 clocks
0x3
I2C_MCR2_GFPW_4
4 clocks
0x4
I2C_MCR2_GFPW_8
8 clocks
0x5
I2C_MCR2_GFPW_16
16 clocks
0x6
I2C_MCR2_GFPW_32
32 clocks
0x7
I2C_MCR2_GFPW_31
31 clocks
0x7
I2C0MCS
I2C Master Control/Status
0x4
read-write
n
0x0
0x0
I2C_MCS_ACK
Data Acknowledge Enable
3
4
I2C_MCS_ADRACK
Acknowledge Address
2
3
I2C_MCS_ARBLST
Arbitration Lost
4
5
I2C_MCS_CLKTO
Clock Timeout Error
7
8
I2C_MCS_IDLE
I2C Idle
5
6
I2C_MCS_RUN
I2C Master Enable
0
1
I2C_MCS_START
Generate START
1
2
I2C0MDR
I2C Master Data
0x8
read-write
n
0x0
0x0
I2C_MDR_DATA
This byte contains the data transferred during a transaction
0
8
I2C0MICR
I2C Master Interrupt Clear
0x1C
write-only
n
0x0
0x0
I2C_MICR_CLKIC
Clock Timeout Interrupt Clear
1
2
write-only
I2C_MICR_IC
Master Interrupt Clear
0
1
write-only
I2C0MIMR
I2C Master Interrupt Mask
0x10
read-write
n
0x0
0x0
I2C_MIMR_CLKIM
Clock Timeout Interrupt Mask
1
2
I2C_MIMR_IM
Master Interrupt Mask
0
1
I2C0MMIS
I2C Master Masked Interrupt Status
0x18
read-write
n
0x0
0x0
I2C_MMIS_CLKMIS
Clock Timeout Masked Interrupt Status
1
2
I2C_MMIS_MIS
Masked Interrupt Status
0
1
I2C0MRIS
I2C Master Raw Interrupt Status
0x14
read-write
n
0x0
0x0
I2C_MRIS_CLKRIS
Clock Timeout Raw Interrupt Status
1
2
I2C_MRIS_RIS
Master Raw Interrupt Status
0
1
I2C0MSA
I2C Master Slave Address
0x0
read-write
n
0x0
0x0
I2C_MSA_RS
Receive not send
0
1
I2C_MSA_SA
I2C Slave Address
1
8
I2C0MTPR
I2C Master Timer Period
0xC
read-write
n
0x0
0x0
I2C_MTPR_HS
High-Speed Enable
7
8
I2C_MTPR_TPR
Timer Period
0
7
I2C0PC
I2C Peripheral Configuration
0xFC4
read-write
n
0x0
0x0
I2C_PC_HS
High-Speed Capable
0
1
I2C0PP
I2C Peripheral Properties
0xFC0
read-write
n
0x0
0x0
I2C_PP_HS
High-Speed Capable
0
1
I2C0SACKCTL
I2C Slave ACK Control
0x820
read-write
n
0x0
0x0
I2C_SACKCTL_ACKOEN
I2C Slave ACK Override Enable
0
1
I2C_SACKCTL_ACKOVAL
I2C Slave ACK Override Value
1
2
I2C0SCSR
I2C Slave Control/Status
0x804
read-write
n
0x0
0x0
I2C_SCSR_FBR
First Byte Received
2
3
I2C_SCSR_OAR2SEL
OAR2 Address Matched
3
4
I2C_SCSR_RREQ
Receive Request
0
1
I2C0SDR
I2C Slave Data
0x808
read-write
n
0x0
0x0
I2C_SDR_DATA
Data for Transfer
0
8
I2C0SICR
I2C Slave Interrupt Clear
0x818
write-only
n
0x0
0x0
I2C_SICR_DATAIC
Data Interrupt Clear
0
1
write-only
I2C_SICR_STARTIC
Start Condition Interrupt Clear
1
2
write-only
I2C_SICR_STOPIC
Stop Condition Interrupt Clear
2
3
write-only
I2C0SIMR
I2C Slave Interrupt Mask
0x80C
read-write
n
0x0
0x0
I2C_SIMR_DATAIM
Data Interrupt Mask
0
1
I2C_SIMR_STARTIM
Start Condition Interrupt Mask
1
2
I2C_SIMR_STOPIM
Stop Condition Interrupt Mask
2
3
I2C0SMIS
I2C Slave Masked Interrupt Status
0x814
read-write
n
0x0
0x0
I2C_SMIS_DATAMIS
Data Masked Interrupt Status
0
1
I2C_SMIS_STARTMIS
Start Condition Masked Interrupt Status
1
2
I2C_SMIS_STOPMIS
Stop Condition Masked Interrupt Status
2
3
I2C0SOAR
I2C Slave Own Address
0x800
read-write
n
0x0
0x0
I2C_SOAR_OAR
I2C Slave Own Address
0
7
I2C0SOAR2
I2C Slave Own Address 2
0x81C
read-write
n
0x0
0x0
I2C_SOAR2_OAR2
I2C Slave Own Address 2
0
7
I2C_SOAR2_OAR2EN
I2C Slave Own Address 2 Enable
7
8
I2C0SRIS
I2C Slave Raw Interrupt Status
0x810
read-write
n
0x0
0x0
I2C_SRIS_DATARIS
Data Raw Interrupt Status
0
1
I2C_SRIS_STARTRIS
Start Condition Raw Interrupt Status
1
2
I2C_SRIS_STOPRIS
Stop Condition Raw Interrupt Status
2
3
MBMON
I2C Master Bus Monitor
0x2C
-1
read-write
n
0x0
0x0
I2C_MBMON_SCL
I2C SCL Status
0
1
I2C_MBMON_SDA
I2C SDA Status
1
2
MCLKOCNT
I2C Master Clock Low Timeout Count
0x24
-1
read-write
n
0x0
0x0
I2C_MCLKOCNT_CNTL
I2C Master Count
0
8
MCR
I2C Master Configuration
0x20
-1
read-write
n
0x0
0x0
I2C_MCR_GFE
I2C Glitch Filter Enable
6
7
I2C_MCR_LPBK
I2C Loopback
0
1
I2C_MCR_MFE
I2C Master Function Enable
4
5
I2C_MCR_SFE
I2C Slave Function Enable
5
6
MCR2
I2C Master Configuration 2
0x38
-1
read-write
n
0x0
0x0
I2C_MCR2_GFPW
I2C Glitch Filter Pulse Width
4
7
I2C_MCR2_GFPW_BYPASS
Bypass
0x0
I2C_MCR2_GFPW_1
1 clock
0x1
I2C_MCR2_GFPW_2
2 clocks
0x2
I2C_MCR2_GFPW_3
3 clocks
0x3
I2C_MCR2_GFPW_4
4 clocks
0x4
I2C_MCR2_GFPW_8
8 clocks
0x5
I2C_MCR2_GFPW_16
16 clocks
0x6
I2C_MCR2_GFPW_31
31 clocks
0x7
MCS
I2C Master Control/Status
0x4
-1
read-write
n
0x0
0x0
I2C_MCS_ACK
Data Acknowledge Enable
3
4
I2C_MCS_ADRACK
Acknowledge Address
2
3
I2C_MCS_ARBLST
Arbitration Lost
4
5
I2C_MCS_BUSBSY
Bus Busy
6
7
I2C_MCS_BUSY
I2C Busy
0
1
I2C_MCS_CLKTO
Clock Timeout Error
7
8
I2C_MCS_DATACK
Acknowledge Data
3
4
I2C_MCS_ERROR
Error
1
2
I2C_MCS_HS
High-Speed Enable
4
5
I2C_MCS_IDLE
I2C Idle
5
6
I2C_MCS_RUN
I2C Master Enable
0
1
I2C_MCS_START
Generate START
1
2
I2C_MCS_STOP
Generate STOP
2
3
MDR
I2C Master Data
0x8
-1
read-write
n
0x0
0x0
I2C_MDR_DATA
This byte contains the data transferred during a transaction
0
8
MICR
I2C Master Interrupt Clear
0x1C
-1
write-only
n
0x0
0x0
I2C_MICR_CLKIC
Clock Timeout Interrupt Clear
1
2
write-only
I2C_MICR_IC
Master Interrupt Clear
0
1
write-only
MIMR
I2C Master Interrupt Mask
0x10
-1
read-write
n
0x0
0x0
I2C_MIMR_CLKIM
Clock Timeout Interrupt Mask
1
2
I2C_MIMR_IM
Master Interrupt Mask
0
1
MMIS
I2C Master Masked Interrupt Status
0x18
-1
read-write
n
0x0
0x0
I2C_MMIS_CLKMIS
Clock Timeout Masked Interrupt Status
1
2
I2C_MMIS_MIS
Masked Interrupt Status
0
1
MRIS
I2C Master Raw Interrupt Status
0x14
-1
read-write
n
0x0
0x0
I2C_MRIS_CLKRIS
Clock Timeout Raw Interrupt Status
1
2
I2C_MRIS_RIS
Master Raw Interrupt Status
0
1
MSA
I2C Master Slave Address
0x0
-1
read-write
n
0x0
0x0
I2C_MSA_RS
Receive not send
0
1
I2C_MSA_SA
I2C Slave Address
1
8
MTPR
I2C Master Timer Period
0xC
-1
read-write
n
0x0
0x0
I2C_MTPR_HS
High-Speed Enable
7
8
I2C_MTPR_TPR
Timer Period
0
7
PC
I2C Peripheral Configuration
0xFC4
-1
read-write
n
0x0
0x0
I2C_PC_HS
High-Speed Capable
0
1
PP
I2C Peripheral Properties
0xFC0
-1
read-write
n
0x0
0x0
I2C_PP_HS
High-Speed Capable
0
1
SACKCTL
I2C Slave ACK Control
0x820
-1
read-write
n
0x0
0x0
I2C_SACKCTL_ACKOEN
I2C Slave ACK Override Enable
0
1
I2C_SACKCTL_ACKOVAL
I2C Slave ACK Override Value
1
2
SCSR
I2C Slave Control/Status
0x804
-1
read-write
n
0x0
0x0
I2C_SCSR_DA
Device Active
0
1
I2C_SCSR_FBR
First Byte Received
2
3
I2C_SCSR_OAR2SEL
OAR2 Address Matched
3
4
I2C_SCSR_RREQ
Receive Request
0
1
I2C_SCSR_TREQ
Transmit Request
1
2
SDR
I2C Slave Data
0x808
-1
read-write
n
0x0
0x0
I2C_SDR_DATA
Data for Transfer
0
8
SICR
I2C Slave Interrupt Clear
0x818
-1
write-only
n
0x0
0x0
I2C_SICR_DATAIC
Data Interrupt Clear
0
1
write-only
I2C_SICR_STARTIC
Start Condition Interrupt Clear
1
2
write-only
I2C_SICR_STOPIC
Stop Condition Interrupt Clear
2
3
write-only
SIMR
I2C Slave Interrupt Mask
0x80C
-1
read-write
n
0x0
0x0
I2C_SIMR_DATAIM
Data Interrupt Mask
0
1
I2C_SIMR_STARTIM
Start Condition Interrupt Mask
1
2
I2C_SIMR_STOPIM
Stop Condition Interrupt Mask
2
3
SMIS
I2C Slave Masked Interrupt Status
0x814
-1
read-write
n
0x0
0x0
I2C_SMIS_DATAMIS
Data Masked Interrupt Status
0
1
I2C_SMIS_STARTMIS
Start Condition Masked Interrupt Status
1
2
I2C_SMIS_STOPMIS
Stop Condition Masked Interrupt Status
2
3
SOAR
I2C Slave Own Address
0x800
-1
read-write
n
0x0
0x0
I2C_SOAR_OAR
I2C Slave Own Address
0
7
SOAR2
I2C Slave Own Address 2
0x81C
-1
read-write
n
0x0
0x0
I2C_SOAR2_OAR2
I2C Slave Own Address 2
0
7
I2C_SOAR2_OAR2EN
I2C Slave Own Address 2 Enable
7
8
SRIS
I2C Slave Raw Interrupt Status
0x810
-1
read-write
n
0x0
0x0
I2C_SRIS_DATARIS
Data Raw Interrupt Status
0
1
I2C_SRIS_STARTRIS
Start Condition Raw Interrupt Status
1
2
I2C_SRIS_STOPRIS
Stop Condition Raw Interrupt Status
2
3
I2C5
Register map for I2C0 peripheral
I2C
0x0
0x0
0x1000
registers
n
I2C5
110
I2C0MBMON
I2C Master Bus Monitor
0x2C
read-write
n
0x0
0x0
I2C_MBMON_SCL
I2C SCL Status
0
1
I2C_MBMON_SDA
I2C SDA Status
1
2
I2C0MCLKOCNT
I2C Master Clock Low Timeout Count
0x24
read-write
n
0x0
0x0
I2C_MCLKOCNT_CNTL
I2C Master Count
0
8
I2C0MCR
I2C Master Configuration
0x20
read-write
n
0x0
0x0
I2C_MCR_GFE
I2C Glitch Filter Enable
6
7
I2C_MCR_LPBK
I2C Loopback
0
1
I2C_MCR_MFE
I2C Master Function Enable
4
5
I2C_MCR_SFE
I2C Slave Function Enable
5
6
I2C0MCR2
I2C Master Configuration 2
0x38
read-write
n
0x0
0x0
I2C_MCR2_GFPW
I2C Glitch Filter Pulse Width
4
7
I2C_MCR2_GFPW_BYPASS
Bypass
0x0
I2C_MCR2_GFPW_1
1 clock
0x1
I2C_MCR2_GFPW_2
2 clocks
0x2
I2C_MCR2_GFPW_3
3 clocks
0x3
I2C_MCR2_GFPW_4
4 clocks
0x4
I2C_MCR2_GFPW_8
8 clocks
0x5
I2C_MCR2_GFPW_16
16 clocks
0x6
I2C_MCR2_GFPW_32
32 clocks
0x7
I2C_MCR2_GFPW_31
31 clocks
0x7
I2C0MCS
I2C Master Control/Status
0x4
read-write
n
0x0
0x0
I2C_MCS_ACK
Data Acknowledge Enable
3
4
I2C_MCS_ADRACK
Acknowledge Address
2
3
I2C_MCS_ARBLST
Arbitration Lost
4
5
I2C_MCS_CLKTO
Clock Timeout Error
7
8
I2C_MCS_IDLE
I2C Idle
5
6
I2C_MCS_RUN
I2C Master Enable
0
1
I2C_MCS_START
Generate START
1
2
I2C0MDR
I2C Master Data
0x8
read-write
n
0x0
0x0
I2C_MDR_DATA
This byte contains the data transferred during a transaction
0
8
I2C0MICR
I2C Master Interrupt Clear
0x1C
write-only
n
0x0
0x0
I2C_MICR_CLKIC
Clock Timeout Interrupt Clear
1
2
write-only
I2C_MICR_IC
Master Interrupt Clear
0
1
write-only
I2C0MIMR
I2C Master Interrupt Mask
0x10
read-write
n
0x0
0x0
I2C_MIMR_CLKIM
Clock Timeout Interrupt Mask
1
2
I2C_MIMR_IM
Master Interrupt Mask
0
1
I2C0MMIS
I2C Master Masked Interrupt Status
0x18
read-write
n
0x0
0x0
I2C_MMIS_CLKMIS
Clock Timeout Masked Interrupt Status
1
2
I2C_MMIS_MIS
Masked Interrupt Status
0
1
I2C0MRIS
I2C Master Raw Interrupt Status
0x14
read-write
n
0x0
0x0
I2C_MRIS_CLKRIS
Clock Timeout Raw Interrupt Status
1
2
I2C_MRIS_RIS
Master Raw Interrupt Status
0
1
I2C0MSA
I2C Master Slave Address
0x0
read-write
n
0x0
0x0
I2C_MSA_RS
Receive not send
0
1
I2C_MSA_SA
I2C Slave Address
1
8
I2C0MTPR
I2C Master Timer Period
0xC
read-write
n
0x0
0x0
I2C_MTPR_HS
High-Speed Enable
7
8
I2C_MTPR_TPR
Timer Period
0
7
I2C0PC
I2C Peripheral Configuration
0xFC4
read-write
n
0x0
0x0
I2C_PC_HS
High-Speed Capable
0
1
I2C0PP
I2C Peripheral Properties
0xFC0
read-write
n
0x0
0x0
I2C_PP_HS
High-Speed Capable
0
1
I2C0SACKCTL
I2C Slave ACK Control
0x820
read-write
n
0x0
0x0
I2C_SACKCTL_ACKOEN
I2C Slave ACK Override Enable
0
1
I2C_SACKCTL_ACKOVAL
I2C Slave ACK Override Value
1
2
I2C0SCSR
I2C Slave Control/Status
0x804
read-write
n
0x0
0x0
I2C_SCSR_FBR
First Byte Received
2
3
I2C_SCSR_OAR2SEL
OAR2 Address Matched
3
4
I2C_SCSR_RREQ
Receive Request
0
1
I2C0SDR
I2C Slave Data
0x808
read-write
n
0x0
0x0
I2C_SDR_DATA
Data for Transfer
0
8
I2C0SICR
I2C Slave Interrupt Clear
0x818
write-only
n
0x0
0x0
I2C_SICR_DATAIC
Data Interrupt Clear
0
1
write-only
I2C_SICR_STARTIC
Start Condition Interrupt Clear
1
2
write-only
I2C_SICR_STOPIC
Stop Condition Interrupt Clear
2
3
write-only
I2C0SIMR
I2C Slave Interrupt Mask
0x80C
read-write
n
0x0
0x0
I2C_SIMR_DATAIM
Data Interrupt Mask
0
1
I2C_SIMR_STARTIM
Start Condition Interrupt Mask
1
2
I2C_SIMR_STOPIM
Stop Condition Interrupt Mask
2
3
I2C0SMIS
I2C Slave Masked Interrupt Status
0x814
read-write
n
0x0
0x0
I2C_SMIS_DATAMIS
Data Masked Interrupt Status
0
1
I2C_SMIS_STARTMIS
Start Condition Masked Interrupt Status
1
2
I2C_SMIS_STOPMIS
Stop Condition Masked Interrupt Status
2
3
I2C0SOAR
I2C Slave Own Address
0x800
read-write
n
0x0
0x0
I2C_SOAR_OAR
I2C Slave Own Address
0
7
I2C0SOAR2
I2C Slave Own Address 2
0x81C
read-write
n
0x0
0x0
I2C_SOAR2_OAR2
I2C Slave Own Address 2
0
7
I2C_SOAR2_OAR2EN
I2C Slave Own Address 2 Enable
7
8
I2C0SRIS
I2C Slave Raw Interrupt Status
0x810
read-write
n
0x0
0x0
I2C_SRIS_DATARIS
Data Raw Interrupt Status
0
1
I2C_SRIS_STARTRIS
Start Condition Raw Interrupt Status
1
2
I2C_SRIS_STOPRIS
Stop Condition Raw Interrupt Status
2
3
MBMON
I2C Master Bus Monitor
0x2C
-1
read-write
n
0x0
0x0
I2C_MBMON_SCL
I2C SCL Status
0
1
I2C_MBMON_SDA
I2C SDA Status
1
2
MCLKOCNT
I2C Master Clock Low Timeout Count
0x24
-1
read-write
n
0x0
0x0
I2C_MCLKOCNT_CNTL
I2C Master Count
0
8
MCR
I2C Master Configuration
0x20
-1
read-write
n
0x0
0x0
I2C_MCR_GFE
I2C Glitch Filter Enable
6
7
I2C_MCR_LPBK
I2C Loopback
0
1
I2C_MCR_MFE
I2C Master Function Enable
4
5
I2C_MCR_SFE
I2C Slave Function Enable
5
6
MCR2
I2C Master Configuration 2
0x38
-1
read-write
n
0x0
0x0
I2C_MCR2_GFPW
I2C Glitch Filter Pulse Width
4
7
I2C_MCR2_GFPW_BYPASS
Bypass
0x0
I2C_MCR2_GFPW_1
1 clock
0x1
I2C_MCR2_GFPW_2
2 clocks
0x2
I2C_MCR2_GFPW_3
3 clocks
0x3
I2C_MCR2_GFPW_4
4 clocks
0x4
I2C_MCR2_GFPW_8
8 clocks
0x5
I2C_MCR2_GFPW_16
16 clocks
0x6
I2C_MCR2_GFPW_31
31 clocks
0x7
MCS
I2C Master Control/Status
0x4
-1
read-write
n
0x0
0x0
I2C_MCS_ACK
Data Acknowledge Enable
3
4
I2C_MCS_ADRACK
Acknowledge Address
2
3
I2C_MCS_ARBLST
Arbitration Lost
4
5
I2C_MCS_BUSBSY
Bus Busy
6
7
I2C_MCS_BUSY
I2C Busy
0
1
I2C_MCS_CLKTO
Clock Timeout Error
7
8
I2C_MCS_DATACK
Acknowledge Data
3
4
I2C_MCS_ERROR
Error
1
2
I2C_MCS_HS
High-Speed Enable
4
5
I2C_MCS_IDLE
I2C Idle
5
6
I2C_MCS_RUN
I2C Master Enable
0
1
I2C_MCS_START
Generate START
1
2
I2C_MCS_STOP
Generate STOP
2
3
MDR
I2C Master Data
0x8
-1
read-write
n
0x0
0x0
I2C_MDR_DATA
This byte contains the data transferred during a transaction
0
8
MICR
I2C Master Interrupt Clear
0x1C
-1
write-only
n
0x0
0x0
I2C_MICR_CLKIC
Clock Timeout Interrupt Clear
1
2
write-only
I2C_MICR_IC
Master Interrupt Clear
0
1
write-only
MIMR
I2C Master Interrupt Mask
0x10
-1
read-write
n
0x0
0x0
I2C_MIMR_CLKIM
Clock Timeout Interrupt Mask
1
2
I2C_MIMR_IM
Master Interrupt Mask
0
1
MMIS
I2C Master Masked Interrupt Status
0x18
-1
read-write
n
0x0
0x0
I2C_MMIS_CLKMIS
Clock Timeout Masked Interrupt Status
1
2
I2C_MMIS_MIS
Masked Interrupt Status
0
1
MRIS
I2C Master Raw Interrupt Status
0x14
-1
read-write
n
0x0
0x0
I2C_MRIS_CLKRIS
Clock Timeout Raw Interrupt Status
1
2
I2C_MRIS_RIS
Master Raw Interrupt Status
0
1
MSA
I2C Master Slave Address
0x0
-1
read-write
n
0x0
0x0
I2C_MSA_RS
Receive not send
0
1
I2C_MSA_SA
I2C Slave Address
1
8
MTPR
I2C Master Timer Period
0xC
-1
read-write
n
0x0
0x0
I2C_MTPR_HS
High-Speed Enable
7
8
I2C_MTPR_TPR
Timer Period
0
7
PC
I2C Peripheral Configuration
0xFC4
-1
read-write
n
0x0
0x0
I2C_PC_HS
High-Speed Capable
0
1
PP
I2C Peripheral Properties
0xFC0
-1
read-write
n
0x0
0x0
I2C_PP_HS
High-Speed Capable
0
1
SACKCTL
I2C Slave ACK Control
0x820
-1
read-write
n
0x0
0x0
I2C_SACKCTL_ACKOEN
I2C Slave ACK Override Enable
0
1
I2C_SACKCTL_ACKOVAL
I2C Slave ACK Override Value
1
2
SCSR
I2C Slave Control/Status
0x804
-1
read-write
n
0x0
0x0
I2C_SCSR_DA
Device Active
0
1
I2C_SCSR_FBR
First Byte Received
2
3
I2C_SCSR_OAR2SEL
OAR2 Address Matched
3
4
I2C_SCSR_RREQ
Receive Request
0
1
I2C_SCSR_TREQ
Transmit Request
1
2
SDR
I2C Slave Data
0x808
-1
read-write
n
0x0
0x0
I2C_SDR_DATA
Data for Transfer
0
8
SICR
I2C Slave Interrupt Clear
0x818
-1
write-only
n
0x0
0x0
I2C_SICR_DATAIC
Data Interrupt Clear
0
1
write-only
I2C_SICR_STARTIC
Start Condition Interrupt Clear
1
2
write-only
I2C_SICR_STOPIC
Stop Condition Interrupt Clear
2
3
write-only
SIMR
I2C Slave Interrupt Mask
0x80C
-1
read-write
n
0x0
0x0
I2C_SIMR_DATAIM
Data Interrupt Mask
0
1
I2C_SIMR_STARTIM
Start Condition Interrupt Mask
1
2
I2C_SIMR_STOPIM
Stop Condition Interrupt Mask
2
3
SMIS
I2C Slave Masked Interrupt Status
0x814
-1
read-write
n
0x0
0x0
I2C_SMIS_DATAMIS
Data Masked Interrupt Status
0
1
I2C_SMIS_STARTMIS
Start Condition Masked Interrupt Status
1
2
I2C_SMIS_STOPMIS
Stop Condition Masked Interrupt Status
2
3
SOAR
I2C Slave Own Address
0x800
-1
read-write
n
0x0
0x0
I2C_SOAR_OAR
I2C Slave Own Address
0
7
SOAR2
I2C Slave Own Address 2
0x81C
-1
read-write
n
0x0
0x0
I2C_SOAR2_OAR2
I2C Slave Own Address 2
0
7
I2C_SOAR2_OAR2EN
I2C Slave Own Address 2 Enable
7
8
SRIS
I2C Slave Raw Interrupt Status
0x810
-1
read-write
n
0x0
0x0
I2C_SRIS_DATARIS
Data Raw Interrupt Status
0
1
I2C_SRIS_STARTRIS
Start Condition Raw Interrupt Status
1
2
I2C_SRIS_STOPRIS
Stop Condition Raw Interrupt Status
2
3
SSI0
Register map for SSI0 peripheral
SSI
0x0
0x0
0x1000
registers
n
SSI0
7
CC
SSI Clock Configuration
0xFC8
-1
read-write
n
0x0
0x0
SSI_CC_CS
SSI Baud Clock Source
0
4
SSI_CC_CS_SYSPLL
System clock (based on clock source and divisor factor)
0x0
SSI_CC_CS_PIOSC
PIOSC
0x5
CPSR
SSI Clock Prescale
0x10
-1
read-write
n
0x0
0x0
SSI_CPSR_CPSDVSR
SSI Clock Prescale Divisor
0
8
CR0
SSI Control 0
0x0
-1
read-write
n
0x0
0x0
SSI_CR0_DSS
SSI Data Size Select
0
4
SSI_CR0_DSS_4
4-bit data
0x3
SSI_CR0_DSS_5
5-bit data
0x4
SSI_CR0_DSS_6
6-bit data
0x5
SSI_CR0_DSS_7
7-bit data
0x6
SSI_CR0_DSS_8
8-bit data
0x7
SSI_CR0_DSS_9
9-bit data
0x8
SSI_CR0_DSS_10
10-bit data
0x9
SSI_CR0_DSS_11
11-bit data
0xa
SSI_CR0_DSS_12
12-bit data
0xb
SSI_CR0_DSS_13
13-bit data
0xc
SSI_CR0_DSS_14
14-bit data
0xd
SSI_CR0_DSS_15
15-bit data
0xe
SSI_CR0_DSS_16
16-bit data
0xf
SSI_CR0_FRF
SSI Frame Format Select
4
6
SSI_CR0_FRF_MOTO
Freescale SPI Frame Format
0x0
SSI_CR0_FRF_TI
Synchronous Serial Frame Format
0x1
SSI_CR0_FRF_NMW
MICROWIRE Frame Format
0x2
SSI_CR0_SCR
SSI Serial Clock Rate
8
16
SSI_CR0_SPH
SSI Serial Clock Phase
7
8
SSI_CR0_SPO
SSI Serial Clock Polarity
6
7
CR1
SSI Control 1
0x4
-1
read-write
n
0x0
0x0
SSI_CR1_EOT
End of Transmission
4
5
SSI_CR1_LBM
SSI Loopback Mode
0
1
SSI_CR1_MS
SSI Master/Slave Select
2
3
SSI_CR1_SSE
SSI Synchronous Serial Port Enable
1
2
DMACTL
SSI DMA Control
0x24
-1
read-write
n
0x0
0x0
SSI_DMACTL_RXDMAE
Receive DMA Enable
0
1
SSI_DMACTL_TXDMAE
Transmit DMA Enable
1
2
DR
SSI Data
0x8
-1
read-write
n
0x0
0x0
SSI_DR_DATA
SSI Receive/Transmit Data
0
16
ICR
SSI Interrupt Clear
0x20
-1
write-only
n
0x0
0x0
SSI_ICR_RORIC
SSI Receive Overrun Interrupt Clear
0
1
write-only
SSI_ICR_RTIC
SSI Receive Time-Out Interrupt Clear
1
2
write-only
IM
SSI Interrupt Mask
0x14
-1
read-write
n
0x0
0x0
SSI_IM_RORIM
SSI Receive Overrun Interrupt Mask
0
1
SSI_IM_RTIM
SSI Receive Time-Out Interrupt Mask
1
2
SSI_IM_RXIM
SSI Receive FIFO Interrupt Mask
2
3
SSI_IM_TXIM
SSI Transmit FIFO Interrupt Mask
3
4
MIS
SSI Masked Interrupt Status
0x1C
-1
read-write
n
0x0
0x0
SSI_MIS_RORMIS
SSI Receive Overrun Masked Interrupt Status
0
1
SSI_MIS_RTMIS
SSI Receive Time-Out Masked Interrupt Status
1
2
SSI_MIS_RXMIS
SSI Receive FIFO Masked Interrupt Status
2
3
SSI_MIS_TXMIS
SSI Transmit FIFO Masked Interrupt Status
3
4
RIS
SSI Raw Interrupt Status
0x18
-1
read-write
n
0x0
0x0
SSI_RIS_RORRIS
SSI Receive Overrun Raw Interrupt Status
0
1
SSI_RIS_RTRIS
SSI Receive Time-Out Raw Interrupt Status
1
2
SSI_RIS_RXRIS
SSI Receive FIFO Raw Interrupt Status
2
3
SSI_RIS_TXRIS
SSI Transmit FIFO Raw Interrupt Status
3
4
SR
SSI Status
0xC
-1
read-write
n
0x0
0x0
SSI_SR_BSY
SSI Busy Bit
4
5
SSI_SR_RFF
SSI Receive FIFO Full
3
4
SSI_SR_RNE
SSI Receive FIFO Not Empty
2
3
SSI_SR_TFE
SSI Transmit FIFO Empty
0
1
SSI_SR_TNF
SSI Transmit FIFO Not Full
1
2
SSI0CC
SSI Clock Configuration
0xFC8
read-write
n
0x0
0x0
SSI_CC_CS
SSI Baud Clock Source
0
4
SSI_CC_CS_SYSPLL
System clock (based on clock source and divisor factor)
0x0
SSI_CC_CS_PIOSC
PIOSC
0x5
SSI0CPSR
SSI Clock Prescale
0x10
read-write
n
0x0
0x0
SSI_CPSR_CPSDVSR
SSI Clock Prescale Divisor
0
8
SSI0CR0
SSI Control 0
0x0
read-write
n
0x0
0x0
SSI_CR0_DSS
SSI Data Size Select
0
4
SSI_CR0_DSS_4
4-bit data
0x3
SSI_CR0_DSS_5
5-bit data
0x4
SSI_CR0_DSS_6
6-bit data
0x5
SSI_CR0_DSS_7
7-bit data
0x6
SSI_CR0_DSS_8
8-bit data
0x7
SSI_CR0_DSS_9
9-bit data
0x8
SSI_CR0_DSS_10
10-bit data
0x9
SSI_CR0_DSS_11
11-bit data
0xa
SSI_CR0_DSS_12
12-bit data
0xb
SSI_CR0_DSS_13
13-bit data
0xc
SSI_CR0_DSS_14
14-bit data
0xd
SSI_CR0_DSS_15
15-bit data
0xe
SSI_CR0_DSS_16
16-bit data
0xf
SSI_CR0_FRF
SSI Frame Format Select
4
6
SSI_CR0_FRF_MOTO
Freescale SPI Frame Format
0x0
SSI_CR0_FRF_TI
Synchronous Serial Frame Format
0x1
SSI_CR0_FRF_NMW
MICROWIRE Frame Format
0x2
SSI_CR0_SCR
SSI Serial Clock Rate
8
16
SSI_CR0_SPH
SSI Serial Clock Phase
7
8
SSI_CR0_SPO
SSI Serial Clock Polarity
6
7
SSI0CR1
SSI Control 1
0x4
read-write
n
0x0
0x0
SSI_CR1_EOT
End of Transmission
4
5
SSI_CR1_LBM
SSI Loopback Mode
0
1
SSI_CR1_MS
SSI Master/Slave Select
2
3
SSI_CR1_SOD
SSI Slave Mode Output Disable
3
4
SSI_CR1_SSE
SSI Synchronous Serial Port Enable
1
2
SSI0DMACTL
SSI DMA Control
0x24
read-write
n
0x0
0x0
SSI_DMACTL_RXDMAE
Receive DMA Enable
0
1
SSI_DMACTL_TXDMAE
Transmit DMA Enable
1
2
SSI0DR
SSI Data
0x8
read-write
n
0x0
0x0
SSI_DR_DATA
SSI Receive/Transmit Data
0
16
SSI0ICR
SSI Interrupt Clear
0x20
write-only
n
0x0
0x0
SSI_ICR_RORIC
SSI Receive Overrun Interrupt Clear
0
1
write-only
SSI_ICR_RTIC
SSI Receive Time-Out Interrupt Clear
1
2
write-only
SSI0IM
SSI Interrupt Mask
0x14
read-write
n
0x0
0x0
SSI_IM_RORIM
SSI Receive Overrun Interrupt Mask
0
1
SSI_IM_RTIM
SSI Receive Time-Out Interrupt Mask
1
2
SSI_IM_RXIM
SSI Receive FIFO Interrupt Mask
2
3
SSI_IM_TXIM
SSI Transmit FIFO Interrupt Mask
3
4
SSI0MIS
SSI Masked Interrupt Status
0x1C
read-write
n
0x0
0x0
SSI_MIS_RORMIS
SSI Receive Overrun Masked Interrupt Status
0
1
SSI_MIS_RTMIS
SSI Receive Time-Out Masked Interrupt Status
1
2
SSI_MIS_RXMIS
SSI Receive FIFO Masked Interrupt Status
2
3
SSI_MIS_TXMIS
SSI Transmit FIFO Masked Interrupt Status
3
4
SSI0RIS
SSI Raw Interrupt Status
0x18
read-write
n
0x0
0x0
SSI_RIS_RORRIS
SSI Receive Overrun Raw Interrupt Status
0
1
SSI_RIS_RTRIS
SSI Receive Time-Out Raw Interrupt Status
1
2
SSI_RIS_RXRIS
SSI Receive FIFO Raw Interrupt Status
2
3
SSI_RIS_TXRIS
SSI Transmit FIFO Raw Interrupt Status
3
4
SSI0SR
SSI Status
0xC
read-write
n
0x0
0x0
SSI_SR_BSY
SSI Busy Bit
4
5
SSI_SR_RFF
SSI Receive FIFO Full
3
4
SSI_SR_RNE
SSI Receive FIFO Not Empty
2
3
SSI_SR_TFE
SSI Transmit FIFO Empty
0
1
SSI_SR_TNF
SSI Transmit FIFO Not Full
1
2
SSI1
Register map for SSI0 peripheral
SSI
0x0
0x0
0x1000
registers
n
SSI1
34
CC
SSI Clock Configuration
0xFC8
-1
read-write
n
0x0
0x0
SSI_CC_CS
SSI Baud Clock Source
0
4
SSI_CC_CS_SYSPLL
System clock (based on clock source and divisor factor)
0x0
SSI_CC_CS_PIOSC
PIOSC
0x5
CPSR
SSI Clock Prescale
0x10
-1
read-write
n
0x0
0x0
SSI_CPSR_CPSDVSR
SSI Clock Prescale Divisor
0
8
CR0
SSI Control 0
0x0
-1
read-write
n
0x0
0x0
SSI_CR0_DSS
SSI Data Size Select
0
4
SSI_CR0_DSS_4
4-bit data
0x3
SSI_CR0_DSS_5
5-bit data
0x4
SSI_CR0_DSS_6
6-bit data
0x5
SSI_CR0_DSS_7
7-bit data
0x6
SSI_CR0_DSS_8
8-bit data
0x7
SSI_CR0_DSS_9
9-bit data
0x8
SSI_CR0_DSS_10
10-bit data
0x9
SSI_CR0_DSS_11
11-bit data
0xa
SSI_CR0_DSS_12
12-bit data
0xb
SSI_CR0_DSS_13
13-bit data
0xc
SSI_CR0_DSS_14
14-bit data
0xd
SSI_CR0_DSS_15
15-bit data
0xe
SSI_CR0_DSS_16
16-bit data
0xf
SSI_CR0_FRF
SSI Frame Format Select
4
6
SSI_CR0_FRF_MOTO
Freescale SPI Frame Format
0x0
SSI_CR0_FRF_TI
Synchronous Serial Frame Format
0x1
SSI_CR0_FRF_NMW
MICROWIRE Frame Format
0x2
SSI_CR0_SCR
SSI Serial Clock Rate
8
16
SSI_CR0_SPH
SSI Serial Clock Phase
7
8
SSI_CR0_SPO
SSI Serial Clock Polarity
6
7
CR1
SSI Control 1
0x4
-1
read-write
n
0x0
0x0
SSI_CR1_EOT
End of Transmission
4
5
SSI_CR1_LBM
SSI Loopback Mode
0
1
SSI_CR1_MS
SSI Master/Slave Select
2
3
SSI_CR1_SSE
SSI Synchronous Serial Port Enable
1
2
DMACTL
SSI DMA Control
0x24
-1
read-write
n
0x0
0x0
SSI_DMACTL_RXDMAE
Receive DMA Enable
0
1
SSI_DMACTL_TXDMAE
Transmit DMA Enable
1
2
DR
SSI Data
0x8
-1
read-write
n
0x0
0x0
SSI_DR_DATA
SSI Receive/Transmit Data
0
16
ICR
SSI Interrupt Clear
0x20
-1
write-only
n
0x0
0x0
SSI_ICR_RORIC
SSI Receive Overrun Interrupt Clear
0
1
write-only
SSI_ICR_RTIC
SSI Receive Time-Out Interrupt Clear
1
2
write-only
IM
SSI Interrupt Mask
0x14
-1
read-write
n
0x0
0x0
SSI_IM_RORIM
SSI Receive Overrun Interrupt Mask
0
1
SSI_IM_RTIM
SSI Receive Time-Out Interrupt Mask
1
2
SSI_IM_RXIM
SSI Receive FIFO Interrupt Mask
2
3
SSI_IM_TXIM
SSI Transmit FIFO Interrupt Mask
3
4
MIS
SSI Masked Interrupt Status
0x1C
-1
read-write
n
0x0
0x0
SSI_MIS_RORMIS
SSI Receive Overrun Masked Interrupt Status
0
1
SSI_MIS_RTMIS
SSI Receive Time-Out Masked Interrupt Status
1
2
SSI_MIS_RXMIS
SSI Receive FIFO Masked Interrupt Status
2
3
SSI_MIS_TXMIS
SSI Transmit FIFO Masked Interrupt Status
3
4
RIS
SSI Raw Interrupt Status
0x18
-1
read-write
n
0x0
0x0
SSI_RIS_RORRIS
SSI Receive Overrun Raw Interrupt Status
0
1
SSI_RIS_RTRIS
SSI Receive Time-Out Raw Interrupt Status
1
2
SSI_RIS_RXRIS
SSI Receive FIFO Raw Interrupt Status
2
3
SSI_RIS_TXRIS
SSI Transmit FIFO Raw Interrupt Status
3
4
SR
SSI Status
0xC
-1
read-write
n
0x0
0x0
SSI_SR_BSY
SSI Busy Bit
4
5
SSI_SR_RFF
SSI Receive FIFO Full
3
4
SSI_SR_RNE
SSI Receive FIFO Not Empty
2
3
SSI_SR_TFE
SSI Transmit FIFO Empty
0
1
SSI_SR_TNF
SSI Transmit FIFO Not Full
1
2
SSI0CC
SSI Clock Configuration
0xFC8
read-write
n
0x0
0x0
SSI_CC_CS
SSI Baud Clock Source
0
4
SSI_CC_CS_SYSPLL
System clock (based on clock source and divisor factor)
0x0
SSI_CC_CS_PIOSC
PIOSC
0x5
SSI0CPSR
SSI Clock Prescale
0x10
read-write
n
0x0
0x0
SSI_CPSR_CPSDVSR
SSI Clock Prescale Divisor
0
8
SSI0CR0
SSI Control 0
0x0
read-write
n
0x0
0x0
SSI_CR0_DSS
SSI Data Size Select
0
4
SSI_CR0_DSS_4
4-bit data
0x3
SSI_CR0_DSS_5
5-bit data
0x4
SSI_CR0_DSS_6
6-bit data
0x5
SSI_CR0_DSS_7
7-bit data
0x6
SSI_CR0_DSS_8
8-bit data
0x7
SSI_CR0_DSS_9
9-bit data
0x8
SSI_CR0_DSS_10
10-bit data
0x9
SSI_CR0_DSS_11
11-bit data
0xa
SSI_CR0_DSS_12
12-bit data
0xb
SSI_CR0_DSS_13
13-bit data
0xc
SSI_CR0_DSS_14
14-bit data
0xd
SSI_CR0_DSS_15
15-bit data
0xe
SSI_CR0_DSS_16
16-bit data
0xf
SSI_CR0_FRF
SSI Frame Format Select
4
6
SSI_CR0_FRF_MOTO
Freescale SPI Frame Format
0x0
SSI_CR0_FRF_TI
Synchronous Serial Frame Format
0x1
SSI_CR0_FRF_NMW
MICROWIRE Frame Format
0x2
SSI_CR0_SCR
SSI Serial Clock Rate
8
16
SSI_CR0_SPH
SSI Serial Clock Phase
7
8
SSI_CR0_SPO
SSI Serial Clock Polarity
6
7
SSI0CR1
SSI Control 1
0x4
read-write
n
0x0
0x0
SSI_CR1_EOT
End of Transmission
4
5
SSI_CR1_LBM
SSI Loopback Mode
0
1
SSI_CR1_MS
SSI Master/Slave Select
2
3
SSI_CR1_SOD
SSI Slave Mode Output Disable
3
4
SSI_CR1_SSE
SSI Synchronous Serial Port Enable
1
2
SSI0DMACTL
SSI DMA Control
0x24
read-write
n
0x0
0x0
SSI_DMACTL_RXDMAE
Receive DMA Enable
0
1
SSI_DMACTL_TXDMAE
Transmit DMA Enable
1
2
SSI0DR
SSI Data
0x8
read-write
n
0x0
0x0
SSI_DR_DATA
SSI Receive/Transmit Data
0
16
SSI0ICR
SSI Interrupt Clear
0x20
write-only
n
0x0
0x0
SSI_ICR_RORIC
SSI Receive Overrun Interrupt Clear
0
1
write-only
SSI_ICR_RTIC
SSI Receive Time-Out Interrupt Clear
1
2
write-only
SSI0IM
SSI Interrupt Mask
0x14
read-write
n
0x0
0x0
SSI_IM_RORIM
SSI Receive Overrun Interrupt Mask
0
1
SSI_IM_RTIM
SSI Receive Time-Out Interrupt Mask
1
2
SSI_IM_RXIM
SSI Receive FIFO Interrupt Mask
2
3
SSI_IM_TXIM
SSI Transmit FIFO Interrupt Mask
3
4
SSI0MIS
SSI Masked Interrupt Status
0x1C
read-write
n
0x0
0x0
SSI_MIS_RORMIS
SSI Receive Overrun Masked Interrupt Status
0
1
SSI_MIS_RTMIS
SSI Receive Time-Out Masked Interrupt Status
1
2
SSI_MIS_RXMIS
SSI Receive FIFO Masked Interrupt Status
2
3
SSI_MIS_TXMIS
SSI Transmit FIFO Masked Interrupt Status
3
4
SSI0RIS
SSI Raw Interrupt Status
0x18
read-write
n
0x0
0x0
SSI_RIS_RORRIS
SSI Receive Overrun Raw Interrupt Status
0
1
SSI_RIS_RTRIS
SSI Receive Time-Out Raw Interrupt Status
1
2
SSI_RIS_RXRIS
SSI Receive FIFO Raw Interrupt Status
2
3
SSI_RIS_TXRIS
SSI Transmit FIFO Raw Interrupt Status
3
4
SSI0SR
SSI Status
0xC
read-write
n
0x0
0x0
SSI_SR_BSY
SSI Busy Bit
4
5
SSI_SR_RFF
SSI Receive FIFO Full
3
4
SSI_SR_RNE
SSI Receive FIFO Not Empty
2
3
SSI_SR_TFE
SSI Transmit FIFO Empty
0
1
SSI_SR_TNF
SSI Transmit FIFO Not Full
1
2
SSI2
Register map for SSI0 peripheral
SSI
0x0
0x0
0x1000
registers
n
SSI2
57
CC
SSI Clock Configuration
0xFC8
-1
read-write
n
0x0
0x0
SSI_CC_CS
SSI Baud Clock Source
0
4
SSI_CC_CS_SYSPLL
System clock (based on clock source and divisor factor)
0x0
SSI_CC_CS_PIOSC
PIOSC
0x5
CPSR
SSI Clock Prescale
0x10
-1
read-write
n
0x0
0x0
SSI_CPSR_CPSDVSR
SSI Clock Prescale Divisor
0
8
CR0
SSI Control 0
0x0
-1
read-write
n
0x0
0x0
SSI_CR0_DSS
SSI Data Size Select
0
4
SSI_CR0_DSS_4
4-bit data
0x3
SSI_CR0_DSS_5
5-bit data
0x4
SSI_CR0_DSS_6
6-bit data
0x5
SSI_CR0_DSS_7
7-bit data
0x6
SSI_CR0_DSS_8
8-bit data
0x7
SSI_CR0_DSS_9
9-bit data
0x8
SSI_CR0_DSS_10
10-bit data
0x9
SSI_CR0_DSS_11
11-bit data
0xa
SSI_CR0_DSS_12
12-bit data
0xb
SSI_CR0_DSS_13
13-bit data
0xc
SSI_CR0_DSS_14
14-bit data
0xd
SSI_CR0_DSS_15
15-bit data
0xe
SSI_CR0_DSS_16
16-bit data
0xf
SSI_CR0_FRF
SSI Frame Format Select
4
6
SSI_CR0_FRF_MOTO
Freescale SPI Frame Format
0x0
SSI_CR0_FRF_TI
Synchronous Serial Frame Format
0x1
SSI_CR0_FRF_NMW
MICROWIRE Frame Format
0x2
SSI_CR0_SCR
SSI Serial Clock Rate
8
16
SSI_CR0_SPH
SSI Serial Clock Phase
7
8
SSI_CR0_SPO
SSI Serial Clock Polarity
6
7
CR1
SSI Control 1
0x4
-1
read-write
n
0x0
0x0
SSI_CR1_EOT
End of Transmission
4
5
SSI_CR1_LBM
SSI Loopback Mode
0
1
SSI_CR1_MS
SSI Master/Slave Select
2
3
SSI_CR1_SSE
SSI Synchronous Serial Port Enable
1
2
DMACTL
SSI DMA Control
0x24
-1
read-write
n
0x0
0x0
SSI_DMACTL_RXDMAE
Receive DMA Enable
0
1
SSI_DMACTL_TXDMAE
Transmit DMA Enable
1
2
DR
SSI Data
0x8
-1
read-write
n
0x0
0x0
SSI_DR_DATA
SSI Receive/Transmit Data
0
16
ICR
SSI Interrupt Clear
0x20
-1
write-only
n
0x0
0x0
SSI_ICR_RORIC
SSI Receive Overrun Interrupt Clear
0
1
write-only
SSI_ICR_RTIC
SSI Receive Time-Out Interrupt Clear
1
2
write-only
IM
SSI Interrupt Mask
0x14
-1
read-write
n
0x0
0x0
SSI_IM_RORIM
SSI Receive Overrun Interrupt Mask
0
1
SSI_IM_RTIM
SSI Receive Time-Out Interrupt Mask
1
2
SSI_IM_RXIM
SSI Receive FIFO Interrupt Mask
2
3
SSI_IM_TXIM
SSI Transmit FIFO Interrupt Mask
3
4
MIS
SSI Masked Interrupt Status
0x1C
-1
read-write
n
0x0
0x0
SSI_MIS_RORMIS
SSI Receive Overrun Masked Interrupt Status
0
1
SSI_MIS_RTMIS
SSI Receive Time-Out Masked Interrupt Status
1
2
SSI_MIS_RXMIS
SSI Receive FIFO Masked Interrupt Status
2
3
SSI_MIS_TXMIS
SSI Transmit FIFO Masked Interrupt Status
3
4
RIS
SSI Raw Interrupt Status
0x18
-1
read-write
n
0x0
0x0
SSI_RIS_RORRIS
SSI Receive Overrun Raw Interrupt Status
0
1
SSI_RIS_RTRIS
SSI Receive Time-Out Raw Interrupt Status
1
2
SSI_RIS_RXRIS
SSI Receive FIFO Raw Interrupt Status
2
3
SSI_RIS_TXRIS
SSI Transmit FIFO Raw Interrupt Status
3
4
SR
SSI Status
0xC
-1
read-write
n
0x0
0x0
SSI_SR_BSY
SSI Busy Bit
4
5
SSI_SR_RFF
SSI Receive FIFO Full
3
4
SSI_SR_RNE
SSI Receive FIFO Not Empty
2
3
SSI_SR_TFE
SSI Transmit FIFO Empty
0
1
SSI_SR_TNF
SSI Transmit FIFO Not Full
1
2
SSI0CC
SSI Clock Configuration
0xFC8
read-write
n
0x0
0x0
SSI_CC_CS
SSI Baud Clock Source
0
4
SSI_CC_CS_SYSPLL
System clock (based on clock source and divisor factor)
0x0
SSI_CC_CS_PIOSC
PIOSC
0x5
SSI0CPSR
SSI Clock Prescale
0x10
read-write
n
0x0
0x0
SSI_CPSR_CPSDVSR
SSI Clock Prescale Divisor
0
8
SSI0CR0
SSI Control 0
0x0
read-write
n
0x0
0x0
SSI_CR0_DSS
SSI Data Size Select
0
4
SSI_CR0_DSS_4
4-bit data
0x3
SSI_CR0_DSS_5
5-bit data
0x4
SSI_CR0_DSS_6
6-bit data
0x5
SSI_CR0_DSS_7
7-bit data
0x6
SSI_CR0_DSS_8
8-bit data
0x7
SSI_CR0_DSS_9
9-bit data
0x8
SSI_CR0_DSS_10
10-bit data
0x9
SSI_CR0_DSS_11
11-bit data
0xa
SSI_CR0_DSS_12
12-bit data
0xb
SSI_CR0_DSS_13
13-bit data
0xc
SSI_CR0_DSS_14
14-bit data
0xd
SSI_CR0_DSS_15
15-bit data
0xe
SSI_CR0_DSS_16
16-bit data
0xf
SSI_CR0_FRF
SSI Frame Format Select
4
6
SSI_CR0_FRF_MOTO
Freescale SPI Frame Format
0x0
SSI_CR0_FRF_TI
Synchronous Serial Frame Format
0x1
SSI_CR0_FRF_NMW
MICROWIRE Frame Format
0x2
SSI_CR0_SCR
SSI Serial Clock Rate
8
16
SSI_CR0_SPH
SSI Serial Clock Phase
7
8
SSI_CR0_SPO
SSI Serial Clock Polarity
6
7
SSI0CR1
SSI Control 1
0x4
read-write
n
0x0
0x0
SSI_CR1_EOT
End of Transmission
4
5
SSI_CR1_LBM
SSI Loopback Mode
0
1
SSI_CR1_MS
SSI Master/Slave Select
2
3
SSI_CR1_SOD
SSI Slave Mode Output Disable
3
4
SSI_CR1_SSE
SSI Synchronous Serial Port Enable
1
2
SSI0DMACTL
SSI DMA Control
0x24
read-write
n
0x0
0x0
SSI_DMACTL_RXDMAE
Receive DMA Enable
0
1
SSI_DMACTL_TXDMAE
Transmit DMA Enable
1
2
SSI0DR
SSI Data
0x8
read-write
n
0x0
0x0
SSI_DR_DATA
SSI Receive/Transmit Data
0
16
SSI0ICR
SSI Interrupt Clear
0x20
write-only
n
0x0
0x0
SSI_ICR_RORIC
SSI Receive Overrun Interrupt Clear
0
1
write-only
SSI_ICR_RTIC
SSI Receive Time-Out Interrupt Clear
1
2
write-only
SSI0IM
SSI Interrupt Mask
0x14
read-write
n
0x0
0x0
SSI_IM_RORIM
SSI Receive Overrun Interrupt Mask
0
1
SSI_IM_RTIM
SSI Receive Time-Out Interrupt Mask
1
2
SSI_IM_RXIM
SSI Receive FIFO Interrupt Mask
2
3
SSI_IM_TXIM
SSI Transmit FIFO Interrupt Mask
3
4
SSI0MIS
SSI Masked Interrupt Status
0x1C
read-write
n
0x0
0x0
SSI_MIS_RORMIS
SSI Receive Overrun Masked Interrupt Status
0
1
SSI_MIS_RTMIS
SSI Receive Time-Out Masked Interrupt Status
1
2
SSI_MIS_RXMIS
SSI Receive FIFO Masked Interrupt Status
2
3
SSI_MIS_TXMIS
SSI Transmit FIFO Masked Interrupt Status
3
4
SSI0RIS
SSI Raw Interrupt Status
0x18
read-write
n
0x0
0x0
SSI_RIS_RORRIS
SSI Receive Overrun Raw Interrupt Status
0
1
SSI_RIS_RTRIS
SSI Receive Time-Out Raw Interrupt Status
1
2
SSI_RIS_RXRIS
SSI Receive FIFO Raw Interrupt Status
2
3
SSI_RIS_TXRIS
SSI Transmit FIFO Raw Interrupt Status
3
4
SSI0SR
SSI Status
0xC
read-write
n
0x0
0x0
SSI_SR_BSY
SSI Busy Bit
4
5
SSI_SR_RFF
SSI Receive FIFO Full
3
4
SSI_SR_RNE
SSI Receive FIFO Not Empty
2
3
SSI_SR_TFE
SSI Transmit FIFO Empty
0
1
SSI_SR_TNF
SSI Transmit FIFO Not Full
1
2
SSI3
Register map for SSI0 peripheral
SSI
0x0
0x0
0x1000
registers
n
SSI3
58
CC
SSI Clock Configuration
0xFC8
-1
read-write
n
0x0
0x0
SSI_CC_CS
SSI Baud Clock Source
0
4
SSI_CC_CS_SYSPLL
System clock (based on clock source and divisor factor)
0x0
SSI_CC_CS_PIOSC
PIOSC
0x5
CPSR
SSI Clock Prescale
0x10
-1
read-write
n
0x0
0x0
SSI_CPSR_CPSDVSR
SSI Clock Prescale Divisor
0
8
CR0
SSI Control 0
0x0
-1
read-write
n
0x0
0x0
SSI_CR0_DSS
SSI Data Size Select
0
4
SSI_CR0_DSS_4
4-bit data
0x3
SSI_CR0_DSS_5
5-bit data
0x4
SSI_CR0_DSS_6
6-bit data
0x5
SSI_CR0_DSS_7
7-bit data
0x6
SSI_CR0_DSS_8
8-bit data
0x7
SSI_CR0_DSS_9
9-bit data
0x8
SSI_CR0_DSS_10
10-bit data
0x9
SSI_CR0_DSS_11
11-bit data
0xa
SSI_CR0_DSS_12
12-bit data
0xb
SSI_CR0_DSS_13
13-bit data
0xc
SSI_CR0_DSS_14
14-bit data
0xd
SSI_CR0_DSS_15
15-bit data
0xe
SSI_CR0_DSS_16
16-bit data
0xf
SSI_CR0_FRF
SSI Frame Format Select
4
6
SSI_CR0_FRF_MOTO
Freescale SPI Frame Format
0x0
SSI_CR0_FRF_TI
Synchronous Serial Frame Format
0x1
SSI_CR0_FRF_NMW
MICROWIRE Frame Format
0x2
SSI_CR0_SCR
SSI Serial Clock Rate
8
16
SSI_CR0_SPH
SSI Serial Clock Phase
7
8
SSI_CR0_SPO
SSI Serial Clock Polarity
6
7
CR1
SSI Control 1
0x4
-1
read-write
n
0x0
0x0
SSI_CR1_EOT
End of Transmission
4
5
SSI_CR1_LBM
SSI Loopback Mode
0
1
SSI_CR1_MS
SSI Master/Slave Select
2
3
SSI_CR1_SSE
SSI Synchronous Serial Port Enable
1
2
DMACTL
SSI DMA Control
0x24
-1
read-write
n
0x0
0x0
SSI_DMACTL_RXDMAE
Receive DMA Enable
0
1
SSI_DMACTL_TXDMAE
Transmit DMA Enable
1
2
DR
SSI Data
0x8
-1
read-write
n
0x0
0x0
SSI_DR_DATA
SSI Receive/Transmit Data
0
16
ICR
SSI Interrupt Clear
0x20
-1
write-only
n
0x0
0x0
SSI_ICR_RORIC
SSI Receive Overrun Interrupt Clear
0
1
write-only
SSI_ICR_RTIC
SSI Receive Time-Out Interrupt Clear
1
2
write-only
IM
SSI Interrupt Mask
0x14
-1
read-write
n
0x0
0x0
SSI_IM_RORIM
SSI Receive Overrun Interrupt Mask
0
1
SSI_IM_RTIM
SSI Receive Time-Out Interrupt Mask
1
2
SSI_IM_RXIM
SSI Receive FIFO Interrupt Mask
2
3
SSI_IM_TXIM
SSI Transmit FIFO Interrupt Mask
3
4
MIS
SSI Masked Interrupt Status
0x1C
-1
read-write
n
0x0
0x0
SSI_MIS_RORMIS
SSI Receive Overrun Masked Interrupt Status
0
1
SSI_MIS_RTMIS
SSI Receive Time-Out Masked Interrupt Status
1
2
SSI_MIS_RXMIS
SSI Receive FIFO Masked Interrupt Status
2
3
SSI_MIS_TXMIS
SSI Transmit FIFO Masked Interrupt Status
3
4
RIS
SSI Raw Interrupt Status
0x18
-1
read-write
n
0x0
0x0
SSI_RIS_RORRIS
SSI Receive Overrun Raw Interrupt Status
0
1
SSI_RIS_RTRIS
SSI Receive Time-Out Raw Interrupt Status
1
2
SSI_RIS_RXRIS
SSI Receive FIFO Raw Interrupt Status
2
3
SSI_RIS_TXRIS
SSI Transmit FIFO Raw Interrupt Status
3
4
SR
SSI Status
0xC
-1
read-write
n
0x0
0x0
SSI_SR_BSY
SSI Busy Bit
4
5
SSI_SR_RFF
SSI Receive FIFO Full
3
4
SSI_SR_RNE
SSI Receive FIFO Not Empty
2
3
SSI_SR_TFE
SSI Transmit FIFO Empty
0
1
SSI_SR_TNF
SSI Transmit FIFO Not Full
1
2
SSI0CC
SSI Clock Configuration
0xFC8
read-write
n
0x0
0x0
SSI_CC_CS
SSI Baud Clock Source
0
4
SSI_CC_CS_SYSPLL
System clock (based on clock source and divisor factor)
0x0
SSI_CC_CS_PIOSC
PIOSC
0x5
SSI0CPSR
SSI Clock Prescale
0x10
read-write
n
0x0
0x0
SSI_CPSR_CPSDVSR
SSI Clock Prescale Divisor
0
8
SSI0CR0
SSI Control 0
0x0
read-write
n
0x0
0x0
SSI_CR0_DSS
SSI Data Size Select
0
4
SSI_CR0_DSS_4
4-bit data
0x3
SSI_CR0_DSS_5
5-bit data
0x4
SSI_CR0_DSS_6
6-bit data
0x5
SSI_CR0_DSS_7
7-bit data
0x6
SSI_CR0_DSS_8
8-bit data
0x7
SSI_CR0_DSS_9
9-bit data
0x8
SSI_CR0_DSS_10
10-bit data
0x9
SSI_CR0_DSS_11
11-bit data
0xa
SSI_CR0_DSS_12
12-bit data
0xb
SSI_CR0_DSS_13
13-bit data
0xc
SSI_CR0_DSS_14
14-bit data
0xd
SSI_CR0_DSS_15
15-bit data
0xe
SSI_CR0_DSS_16
16-bit data
0xf
SSI_CR0_FRF
SSI Frame Format Select
4
6
SSI_CR0_FRF_MOTO
Freescale SPI Frame Format
0x0
SSI_CR0_FRF_TI
Synchronous Serial Frame Format
0x1
SSI_CR0_FRF_NMW
MICROWIRE Frame Format
0x2
SSI_CR0_SCR
SSI Serial Clock Rate
8
16
SSI_CR0_SPH
SSI Serial Clock Phase
7
8
SSI_CR0_SPO
SSI Serial Clock Polarity
6
7
SSI0CR1
SSI Control 1
0x4
read-write
n
0x0
0x0
SSI_CR1_EOT
End of Transmission
4
5
SSI_CR1_LBM
SSI Loopback Mode
0
1
SSI_CR1_MS
SSI Master/Slave Select
2
3
SSI_CR1_SOD
SSI Slave Mode Output Disable
3
4
SSI_CR1_SSE
SSI Synchronous Serial Port Enable
1
2
SSI0DMACTL
SSI DMA Control
0x24
read-write
n
0x0
0x0
SSI_DMACTL_RXDMAE
Receive DMA Enable
0
1
SSI_DMACTL_TXDMAE
Transmit DMA Enable
1
2
SSI0DR
SSI Data
0x8
read-write
n
0x0
0x0
SSI_DR_DATA
SSI Receive/Transmit Data
0
16
SSI0ICR
SSI Interrupt Clear
0x20
write-only
n
0x0
0x0
SSI_ICR_RORIC
SSI Receive Overrun Interrupt Clear
0
1
write-only
SSI_ICR_RTIC
SSI Receive Time-Out Interrupt Clear
1
2
write-only
SSI0IM
SSI Interrupt Mask
0x14
read-write
n
0x0
0x0
SSI_IM_RORIM
SSI Receive Overrun Interrupt Mask
0
1
SSI_IM_RTIM
SSI Receive Time-Out Interrupt Mask
1
2
SSI_IM_RXIM
SSI Receive FIFO Interrupt Mask
2
3
SSI_IM_TXIM
SSI Transmit FIFO Interrupt Mask
3
4
SSI0MIS
SSI Masked Interrupt Status
0x1C
read-write
n
0x0
0x0
SSI_MIS_RORMIS
SSI Receive Overrun Masked Interrupt Status
0
1
SSI_MIS_RTMIS
SSI Receive Time-Out Masked Interrupt Status
1
2
SSI_MIS_RXMIS
SSI Receive FIFO Masked Interrupt Status
2
3
SSI_MIS_TXMIS
SSI Transmit FIFO Masked Interrupt Status
3
4
SSI0RIS
SSI Raw Interrupt Status
0x18
read-write
n
0x0
0x0
SSI_RIS_RORRIS
SSI Receive Overrun Raw Interrupt Status
0
1
SSI_RIS_RTRIS
SSI Receive Time-Out Raw Interrupt Status
1
2
SSI_RIS_RXRIS
SSI Receive FIFO Raw Interrupt Status
2
3
SSI_RIS_TXRIS
SSI Transmit FIFO Raw Interrupt Status
3
4
SSI0SR
SSI Status
0xC
read-write
n
0x0
0x0
SSI_SR_BSY
SSI Busy Bit
4
5
SSI_SR_RFF
SSI Receive FIFO Full
3
4
SSI_SR_RNE
SSI Receive FIFO Not Empty
2
3
SSI_SR_TFE
SSI Transmit FIFO Empty
0
1
SSI_SR_TNF
SSI Transmit FIFO Not Full
1
2
SYSCTL
Register map for SYSCTL peripheral
SYSCTL
0x0
0x0
0x1000
registers
n
SYSCTL
28
DC0
Device Capabilities 0
0x8
-1
read-write
n
0x0
0x0
SYSCTL_DC0_FLASHSZ
Flash Size
0
16
SYSCTL_DC0_FLASHSZ_64KB
64 KB of Flash
0x1f
SYSCTL_DC0_FLASHSZ_96KB
96 KB of Flash
0x2f
SYSCTL_DC0_FLASHSZ_8KB
8 KB of Flash
0x3
SYSCTL_DC0_FLASHSZ_128K
128 KB of Flash
0x3f
SYSCTL_DC0_FLASHSZ_192K
192 KB of Flash
0x5f
SYSCTL_DC0_FLASHSZ_16KB
16 KB of Flash
0x7
SYSCTL_DC0_FLASHSZ_256K
256 KB of Flash
0x7f
SYSCTL_DC0_FLASHSZ_32KB
32 KB of Flash
0xf
SYSCTL_DC0_SRAMSZ
SRAM Size
16
32
SYSCTL_DC0_SRAMSZ_6KB
6 KB of SRAM
0x17
SYSCTL_DC0_SRAMSZ_8KB
8 KB of SRAM
0x1f
SYSCTL_DC0_SRAMSZ_12KB
12 KB of SRAM
0x2f
SYSCTL_DC0_SRAMSZ_16KB
16 KB of SRAM
0x3f
SYSCTL_DC0_SRAMSZ_20KB
20 KB of SRAM
0x4f
SYSCTL_DC0_SRAMSZ_24KB
24 KB of SRAM
0x5f
SYSCTL_DC0_SRAMSZ_2KB
2 KB of SRAM
0x7
SYSCTL_DC0_SRAMSZ_32KB
32 KB of SRAM
0x7f
SYSCTL_DC0_SRAMSZ_4KB
4 KB of SRAM
0xf
DC1
Device Capabilities 1
0x10
-1
read-write
n
0x0
0x0
SYSCTL_DC1_ADC0
ADC Module 0 Present
16
17
SYSCTL_DC1_ADC0SPD
Max ADC0 Speed
8
10
SYSCTL_DC1_ADC0SPD_125K
125K samples/second
0x0
SYSCTL_DC1_ADC0SPD_250K
250K samples/second
0x1
SYSCTL_DC1_ADC0SPD_500K
500K samples/second
0x2
SYSCTL_DC1_ADC0SPD_1M
1M samples/second
0x3
SYSCTL_DC1_ADC1
ADC Module 1 Present
17
18
SYSCTL_DC1_ADC1SPD
Max ADC1 Speed
10
12
SYSCTL_DC1_ADC1SPD_125K
125K samples/second
0x0
SYSCTL_DC1_ADC1SPD_250K
250K samples/second
0x1
SYSCTL_DC1_ADC1SPD_500K
500K samples/second
0x2
SYSCTL_DC1_ADC1SPD_1M
1M samples/second
0x3
SYSCTL_DC1_CAN0
CAN Module 0 Present
24
25
SYSCTL_DC1_CAN1
CAN Module 1 Present
25
26
SYSCTL_DC1_HIB
Hibernation Module Present
6
7
SYSCTL_DC1_JTAG
JTAG Present
0
1
SYSCTL_DC1_MINSYSDIV
System Clock Divider
12
16
SYSCTL_DC1_MINSYSDIV_80
Specifies an 80-MHz CPU clock with a PLL divider of 2.5
0x1
SYSCTL_DC1_MINSYSDIV_66
Specifies a 66-MHz CPU clock with a PLL divider of 3
0x2
SYSCTL_DC1_MINSYSDIV_50
Specifies a 50-MHz CPU clock with a PLL divider of 4
0x3
SYSCTL_DC1_MINSYSDIV_40
Specifies a 40-MHz CPU clock with a PLL divider of 5
0x4
SYSCTL_DC1_MINSYSDIV_25
Specifies a 25-MHz clock with a PLL divider of 8
0x7
SYSCTL_DC1_MINSYSDIV_20
Specifies a 20-MHz clock with a PLL divider of 10
0x9
SYSCTL_DC1_MPU
MPU Present
7
8
SYSCTL_DC1_PLL
PLL Present
4
5
SYSCTL_DC1_PWM0
PWM Module 0 Present
20
21
SYSCTL_DC1_PWM1
PWM Module 1 Present
21
22
SYSCTL_DC1_SWD
SWD Present
1
2
SYSCTL_DC1_SWO
SWO Trace Port Present
2
3
SYSCTL_DC1_TEMP
Temp Sensor Present
5
6
SYSCTL_DC1_WDT0
Watchdog Timer 0 Present
3
4
SYSCTL_DC1_WDT1
Watchdog Timer1 Present
28
29
DC2
Device Capabilities 2
0x14
-1
read-write
n
0x0
0x0
SYSCTL_DC2_COMP0
Analog Comparator 0 Present
24
25
SYSCTL_DC2_COMP1
Analog Comparator 1 Present
25
26
SYSCTL_DC2_COMP2
Analog Comparator 2 Present
26
27
SYSCTL_DC2_EPI0
EPI Module 0 Present
30
31
SYSCTL_DC2_I2C0
I2C Module 0 Present
12
13
SYSCTL_DC2_I2C0HS
I2C Module 0 Speed
13
14
SYSCTL_DC2_I2C1
I2C Module 1 Present
14
15
SYSCTL_DC2_I2C1HS
I2C Module 1 Speed
15
16
SYSCTL_DC2_I2S0
I2S Module 0 Present
28
29
SYSCTL_DC2_QEI0
QEI Module 0 Present
8
9
SYSCTL_DC2_QEI1
QEI Module 1 Present
9
10
SYSCTL_DC2_SSI0
SSI Module 0 Present
4
5
SYSCTL_DC2_SSI1
SSI Module 1 Present
5
6
SYSCTL_DC2_TIMER0
Timer Module 0 Present
16
17
SYSCTL_DC2_TIMER1
Timer Module 1 Present
17
18
SYSCTL_DC2_TIMER2
Timer Module 2 Present
18
19
SYSCTL_DC2_TIMER3
Timer Module 3 Present
19
20
SYSCTL_DC2_UART0
UART Module 0 Present
0
1
SYSCTL_DC2_UART1
UART Module 1 Present
1
2
SYSCTL_DC2_UART2
UART Module 2 Present
2
3
DC3
Device Capabilities 3
0x18
-1
read-write
n
0x0
0x0
SYSCTL_DC3_32KHZ
32KHz Input Clock Available
31
32
SYSCTL_DC3_ADC0AIN0
ADC Module 0 AIN0 Pin Present
16
17
SYSCTL_DC3_ADC0AIN1
ADC Module 0 AIN1 Pin Present
17
18
SYSCTL_DC3_ADC0AIN2
ADC Module 0 AIN2 Pin Present
18
19
SYSCTL_DC3_ADC0AIN3
ADC Module 0 AIN3 Pin Present
19
20
SYSCTL_DC3_ADC0AIN4
ADC Module 0 AIN4 Pin Present
20
21
SYSCTL_DC3_ADC0AIN5
ADC Module 0 AIN5 Pin Present
21
22
SYSCTL_DC3_ADC0AIN6
ADC Module 0 AIN6 Pin Present
22
23
SYSCTL_DC3_ADC0AIN7
ADC Module 0 AIN7 Pin Present
23
24
SYSCTL_DC3_C0MINUS
C0- Pin Present
6
7
SYSCTL_DC3_C0O
C0o Pin Present
8
9
SYSCTL_DC3_C0PLUS
C0+ Pin Present
7
8
SYSCTL_DC3_C1MINUS
C1- Pin Present
9
10
SYSCTL_DC3_C1O
C1o Pin Present
11
12
SYSCTL_DC3_C1PLUS
C1+ Pin Present
10
11
SYSCTL_DC3_C2MINUS
C2- Pin Present
12
13
SYSCTL_DC3_C2O
C2o Pin Present
14
15
SYSCTL_DC3_C2PLUS
C2+ Pin Present
13
14
SYSCTL_DC3_CCP0
T0CCP0 Pin Present
24
25
SYSCTL_DC3_CCP1
T0CCP1 Pin Present
25
26
SYSCTL_DC3_CCP2
T1CCP0 Pin Present
26
27
SYSCTL_DC3_CCP3
T1CCP1 Pin Present
27
28
SYSCTL_DC3_CCP4
T2CCP0 Pin Present
28
29
SYSCTL_DC3_CCP5
T2CCP1 Pin Present
29
30
SYSCTL_DC3_PWM0
PWM0 Pin Present
0
1
SYSCTL_DC3_PWM1
PWM1 Pin Present
1
2
SYSCTL_DC3_PWM2
PWM2 Pin Present
2
3
SYSCTL_DC3_PWM3
PWM3 Pin Present
3
4
SYSCTL_DC3_PWM4
PWM4 Pin Present
4
5
SYSCTL_DC3_PWM5
PWM5 Pin Present
5
6
SYSCTL_DC3_PWMFAULT
PWM Fault Pin Present
15
16
DC4
Device Capabilities 4
0x1C
-1
read-write
n
0x0
0x0
SYSCTL_DC4_CCP6
T3CCP0 Pin Present
14
15
SYSCTL_DC4_CCP7
T3CCP1 Pin Present
15
16
SYSCTL_DC4_E1588
1588 Capable
24
25
SYSCTL_DC4_EMAC0
Ethernet MAC Layer 0 Present
28
29
SYSCTL_DC4_EPHY0
Ethernet PHY Layer 0 Present
30
31
SYSCTL_DC4_GPIOA
GPIO Port A Present
0
1
SYSCTL_DC4_GPIOB
GPIO Port B Present
1
2
SYSCTL_DC4_GPIOC
GPIO Port C Present
2
3
SYSCTL_DC4_GPIOD
GPIO Port D Present
3
4
SYSCTL_DC4_GPIOE
GPIO Port E Present
4
5
SYSCTL_DC4_GPIOF
GPIO Port F Present
5
6
SYSCTL_DC4_GPIOG
GPIO Port G Present
6
7
SYSCTL_DC4_GPIOH
GPIO Port H Present
7
8
SYSCTL_DC4_GPIOJ
GPIO Port J Present
8
9
SYSCTL_DC4_PICAL
PIOSC Calibrate
18
19
SYSCTL_DC4_ROM
Internal Code ROM Present
12
13
SYSCTL_DC4_UDMA
Micro-DMA Module Present
13
14
DC5
Device Capabilities 5
0x20
-1
read-write
n
0x0
0x0
SYSCTL_DC5_PWM0
PWM0 Pin Present
0
1
SYSCTL_DC5_PWM1
PWM1 Pin Present
1
2
SYSCTL_DC5_PWM2
PWM2 Pin Present
2
3
SYSCTL_DC5_PWM3
PWM3 Pin Present
3
4
SYSCTL_DC5_PWM4
PWM4 Pin Present
4
5
SYSCTL_DC5_PWM5
PWM5 Pin Present
5
6
SYSCTL_DC5_PWM6
PWM6 Pin Present
6
7
SYSCTL_DC5_PWM7
PWM7 Pin Present
7
8
SYSCTL_DC5_PWMEFLT
PWM Extended Fault Active
21
22
SYSCTL_DC5_PWMESYNC
PWM Extended SYNC Active
20
21
SYSCTL_DC5_PWMFAULT0
PWM Fault 0 Pin Present
24
25
SYSCTL_DC5_PWMFAULT1
PWM Fault 1 Pin Present
25
26
SYSCTL_DC5_PWMFAULT2
PWM Fault 2 Pin Present
26
27
SYSCTL_DC5_PWMFAULT3
PWM Fault 3 Pin Present
27
28
DC6
Device Capabilities 6
0x24
-1
read-write
n
0x0
0x0
SYSCTL_DC6_USB0
USB Module 0 Present
0
2
SYSCTL_DC6_USB0_DEV
USB0 is Device Only
0x1
SYSCTL_DC6_USB0_HOSTDEV
USB is Device or Host
0x2
SYSCTL_DC6_USB0_OTG
USB0 is OTG
0x3
SYSCTL_DC6_USB0PHY
USB Module 0 PHY Present
4
5
DC7
Device Capabilities 7
0x28
-1
read-write
n
0x0
0x0
SYSCTL_DC7_DMACH0
DMA Channel 0
0
1
SYSCTL_DC7_DMACH1
DMA Channel 1
1
2
SYSCTL_DC7_DMACH10
DMA Channel 10
10
11
SYSCTL_DC7_DMACH11
DMA Channel 11
11
12
SYSCTL_DC7_DMACH12
DMA Channel 12
12
13
SYSCTL_DC7_DMACH13
DMA Channel 13
13
14
SYSCTL_DC7_DMACH14
DMA Channel 14
14
15
SYSCTL_DC7_DMACH15
DMA Channel 15
15
16
SYSCTL_DC7_DMACH16
DMA Channel 16
16
17
SYSCTL_DC7_DMACH17
DMA Channel 17
17
18
SYSCTL_DC7_DMACH18
DMA Channel 18
18
19
SYSCTL_DC7_DMACH19
DMA Channel 19
19
20
SYSCTL_DC7_DMACH2
DMA Channel 2
2
3
SYSCTL_DC7_DMACH20
DMA Channel 20
20
21
SYSCTL_DC7_DMACH21
DMA Channel 21
21
22
SYSCTL_DC7_DMACH22
DMA Channel 22
22
23
SYSCTL_DC7_DMACH23
DMA Channel 23
23
24
SYSCTL_DC7_DMACH24
DMA Channel 24
24
25
SYSCTL_DC7_DMACH25
DMA Channel 25
25
26
SYSCTL_DC7_DMACH26
DMA Channel 26
26
27
SYSCTL_DC7_DMACH27
DMA Channel 27
27
28
SYSCTL_DC7_DMACH28
DMA Channel 28
28
29
SYSCTL_DC7_DMACH29
DMA Channel 29
29
30
SYSCTL_DC7_DMACH3
DMA Channel 3
3
4
SYSCTL_DC7_DMACH30
DMA Channel 30
30
31
SYSCTL_DC7_DMACH4
DMA Channel 4
4
5
SYSCTL_DC7_DMACH5
DMA Channel 5
5
6
SYSCTL_DC7_DMACH6
DMA Channel 6
6
7
SYSCTL_DC7_DMACH7
DMA Channel 7
7
8
SYSCTL_DC7_DMACH8
DMA Channel 8
8
9
SYSCTL_DC7_DMACH9
DMA Channel 9
9
10
DC8
Device Capabilities 8
0x2C
-1
read-write
n
0x0
0x0
SYSCTL_DC8_ADC0AIN0
ADC Module 0 AIN0 Pin Present
0
1
SYSCTL_DC8_ADC0AIN1
ADC Module 0 AIN1 Pin Present
1
2
SYSCTL_DC8_ADC0AIN10
ADC Module 0 AIN10 Pin Present
10
11
SYSCTL_DC8_ADC0AIN11
ADC Module 0 AIN11 Pin Present
11
12
SYSCTL_DC8_ADC0AIN12
ADC Module 0 AIN12 Pin Present
12
13
SYSCTL_DC8_ADC0AIN13
ADC Module 0 AIN13 Pin Present
13
14
SYSCTL_DC8_ADC0AIN14
ADC Module 0 AIN14 Pin Present
14
15
SYSCTL_DC8_ADC0AIN15
ADC Module 0 AIN15 Pin Present
15
16
SYSCTL_DC8_ADC0AIN2
ADC Module 0 AIN2 Pin Present
2
3
SYSCTL_DC8_ADC0AIN3
ADC Module 0 AIN3 Pin Present
3
4
SYSCTL_DC8_ADC0AIN4
ADC Module 0 AIN4 Pin Present
4
5
SYSCTL_DC8_ADC0AIN5
ADC Module 0 AIN5 Pin Present
5
6
SYSCTL_DC8_ADC0AIN6
ADC Module 0 AIN6 Pin Present
6
7
SYSCTL_DC8_ADC0AIN7
ADC Module 0 AIN7 Pin Present
7
8
SYSCTL_DC8_ADC0AIN8
ADC Module 0 AIN8 Pin Present
8
9
SYSCTL_DC8_ADC0AIN9
ADC Module 0 AIN9 Pin Present
9
10
SYSCTL_DC8_ADC1AIN0
ADC Module 1 AIN0 Pin Present
16
17
SYSCTL_DC8_ADC1AIN1
ADC Module 1 AIN1 Pin Present
17
18
SYSCTL_DC8_ADC1AIN10
ADC Module 1 AIN10 Pin Present
26
27
SYSCTL_DC8_ADC1AIN11
ADC Module 1 AIN11 Pin Present
27
28
SYSCTL_DC8_ADC1AIN12
ADC Module 1 AIN12 Pin Present
28
29
SYSCTL_DC8_ADC1AIN13
ADC Module 1 AIN13 Pin Present
29
30
SYSCTL_DC8_ADC1AIN14
ADC Module 1 AIN14 Pin Present
30
31
SYSCTL_DC8_ADC1AIN15
ADC Module 1 AIN15 Pin Present
31
32
SYSCTL_DC8_ADC1AIN2
ADC Module 1 AIN2 Pin Present
18
19
SYSCTL_DC8_ADC1AIN3
ADC Module 1 AIN3 Pin Present
19
20
SYSCTL_DC8_ADC1AIN4
ADC Module 1 AIN4 Pin Present
20
21
SYSCTL_DC8_ADC1AIN5
ADC Module 1 AIN5 Pin Present
21
22
SYSCTL_DC8_ADC1AIN6
ADC Module 1 AIN6 Pin Present
22
23
SYSCTL_DC8_ADC1AIN7
ADC Module 1 AIN7 Pin Present
23
24
SYSCTL_DC8_ADC1AIN8
ADC Module 1 AIN8 Pin Present
24
25
SYSCTL_DC8_ADC1AIN9
ADC Module 1 AIN9 Pin Present
25
26
DC9
Device Capabilities 9
0x190
-1
read-write
n
0x0
0x0
SYSCTL_DC9_ADC0DC0
ADC0 DC0 Present
0
1
SYSCTL_DC9_ADC0DC1
ADC0 DC1 Present
1
2
SYSCTL_DC9_ADC0DC2
ADC0 DC2 Present
2
3
SYSCTL_DC9_ADC0DC3
ADC0 DC3 Present
3
4
SYSCTL_DC9_ADC0DC4
ADC0 DC4 Present
4
5
SYSCTL_DC9_ADC0DC5
ADC0 DC5 Present
5
6
SYSCTL_DC9_ADC0DC6
ADC0 DC6 Present
6
7
SYSCTL_DC9_ADC0DC7
ADC0 DC7 Present
7
8
SYSCTL_DC9_ADC1DC0
ADC1 DC0 Present
16
17
SYSCTL_DC9_ADC1DC1
ADC1 DC1 Present
17
18
SYSCTL_DC9_ADC1DC2
ADC1 DC2 Present
18
19
SYSCTL_DC9_ADC1DC3
ADC1 DC3 Present
19
20
SYSCTL_DC9_ADC1DC4
ADC1 DC4 Present
20
21
SYSCTL_DC9_ADC1DC5
ADC1 DC5 Present
21
22
SYSCTL_DC9_ADC1DC6
ADC1 DC6 Present
22
23
SYSCTL_DC9_ADC1DC7
ADC1 DC7 Present
23
24
DCGC0
Deep Sleep Mode Clock Gating Control Register 0
0x120
-1
read-write
n
0x0
0x0
SYSCTL_DCGC0_ADC0
ADC0 Clock Gating Control
16
17
SYSCTL_DCGC0_ADC1
ADC1 Clock Gating Control
17
18
SYSCTL_DCGC0_CAN0
CAN0 Clock Gating Control
24
25
SYSCTL_DCGC0_HIB
HIB Clock Gating Control
6
7
SYSCTL_DCGC0_WDT0
WDT0 Clock Gating Control
3
4
SYSCTL_DCGC0_WDT1
WDT1 Clock Gating Control
28
29
DCGC1
Deep-Sleep Mode Clock Gating Control Register 1
0x124
-1
read-write
n
0x0
0x0
SYSCTL_DCGC1_COMP0
Analog Comparator 0 Clock Gating
24
25
SYSCTL_DCGC1_COMP1
Analog Comparator 1 Clock Gating
25
26
SYSCTL_DCGC1_COMP2
Analog Comparator 2 Clock Gating
26
27
SYSCTL_DCGC1_I2C0
I2C0 Clock Gating Control
12
13
SYSCTL_DCGC1_I2C1
I2C1 Clock Gating Control
14
15
SYSCTL_DCGC1_SSI0
SSI0 Clock Gating Control
4
5
SYSCTL_DCGC1_SSI1
SSI1 Clock Gating Control
5
6
SYSCTL_DCGC1_TIMER0
Timer 0 Clock Gating Control
16
17
SYSCTL_DCGC1_TIMER1
Timer 1 Clock Gating Control
17
18
SYSCTL_DCGC1_TIMER2
Timer 2 Clock Gating Control
18
19
SYSCTL_DCGC1_TIMER3
Timer 3 Clock Gating Control
19
20
SYSCTL_DCGC1_UART0
UART0 Clock Gating Control
0
1
SYSCTL_DCGC1_UART1
UART1 Clock Gating Control
1
2
SYSCTL_DCGC1_UART2
UART2 Clock Gating Control
2
3
DCGC2
Deep Sleep Mode Clock Gating Control Register 2
0x128
-1
read-write
n
0x0
0x0
SYSCTL_DCGC2_GPIOA
Port A Clock Gating Control
0
1
SYSCTL_DCGC2_GPIOB
Port B Clock Gating Control
1
2
SYSCTL_DCGC2_GPIOC
Port C Clock Gating Control
2
3
SYSCTL_DCGC2_GPIOD
Port D Clock Gating Control
3
4
SYSCTL_DCGC2_GPIOE
Port E Clock Gating Control
4
5
SYSCTL_DCGC2_GPIOF
Port F Clock Gating Control
5
6
SYSCTL_DCGC2_GPIOG
Port G Clock Gating Control
6
7
SYSCTL_DCGC2_GPIOH
Port H Clock Gating Control
7
8
SYSCTL_DCGC2_GPIOJ
Port J Clock Gating Control
8
9
SYSCTL_DCGC2_UDMA
Micro-DMA Clock Gating Control
13
14
DCGCACMP
Analog Comparator Deep-Sleep Mode Clock Gating Control
0x83C
-1
read-write
n
0x0
0x0
SYSCTL_DCGCACMP_D0
Analog Comparator Module 0 Deep-Sleep Mode Clock Gating Control
0
1
DCGCADC
Analog-to-Digital Converter Deep-Sleep Mode Clock Gating Control
0x838
-1
read-write
n
0x0
0x0
SYSCTL_DCGCADC_D0
ADC Module 0 Deep-Sleep Mode Clock Gating Control
0
1
SYSCTL_DCGCADC_D1
ADC Module 1 Deep-Sleep Mode Clock Gating Control
1
2
DCGCCAN
Controller Area Network Deep-Sleep Mode Clock Gating Control
0x834
-1
read-write
n
0x0
0x0
SYSCTL_DCGCCAN_D0
CAN Module 0 Deep-Sleep Mode Clock Gating Control
0
1
DCGCDMA
Micro Direct Memory Access Deep-Sleep Mode Clock Gating Control
0x80C
-1
read-write
n
0x0
0x0
SYSCTL_DCGCDMA_D0
uDMA Module Deep-Sleep Mode Clock Gating Control
0
1
DCGCEEPROM
EEPROM Deep-Sleep Mode Clock Gating Control
0x858
-1
read-write
n
0x0
0x0
SYSCTL_DCGCEEPROM_D0
EEPROM Module Deep-Sleep Mode Clock Gating Control
0
1
DCGCGPIO
General-Purpose Input/Output Deep-Sleep Mode Clock Gating Control
0x808
-1
read-write
n
0x0
0x0
SYSCTL_DCGCGPIO_D0
GPIO Port A Deep-Sleep Mode Clock Gating Control
0
1
SYSCTL_DCGCGPIO_D1
GPIO Port B Deep-Sleep Mode Clock Gating Control
1
2
SYSCTL_DCGCGPIO_D2
GPIO Port C Deep-Sleep Mode Clock Gating Control
2
3
SYSCTL_DCGCGPIO_D3
GPIO Port D Deep-Sleep Mode Clock Gating Control
3
4
SYSCTL_DCGCGPIO_D4
GPIO Port E Deep-Sleep Mode Clock Gating Control
4
5
SYSCTL_DCGCGPIO_D5
GPIO Port F Deep-Sleep Mode Clock Gating Control
5
6
SYSCTL_DCGCGPIO_D6
GPIO Port G Deep-Sleep Mode Clock Gating Control
6
7
SYSCTL_DCGCGPIO_D7
GPIO Port H Deep-Sleep Mode Clock Gating Control
7
8
SYSCTL_DCGCGPIO_D8
GPIO Port J Deep-Sleep Mode Clock Gating Control
8
9
SYSCTL_DCGCGPIO_D9
GPIO Port K Deep-Sleep Mode Clock Gating Control
9
10
DCGCHIB
Hibernation Deep-Sleep Mode Clock Gating Control
0x814
-1
read-write
n
0x0
0x0
SYSCTL_DCGCHIB_D0
Hibernation Module Deep-Sleep Mode Clock Gating Control
0
1
DCGCI2C
Inter-Integrated Circuit Deep-Sleep Mode Clock Gating Control
0x820
-1
read-write
n
0x0
0x0
SYSCTL_DCGCI2C_D0
I2C Module 0 Deep-Sleep Mode Clock Gating Control
0
1
SYSCTL_DCGCI2C_D1
I2C Module 1 Deep-Sleep Mode Clock Gating Control
1
2
SYSCTL_DCGCI2C_D2
I2C Module 2 Deep-Sleep Mode Clock Gating Control
2
3
SYSCTL_DCGCI2C_D3
I2C Module 3 Deep-Sleep Mode Clock Gating Control
3
4
SYSCTL_DCGCI2C_D4
I2C Module 4 Deep-Sleep Mode Clock Gating Control
4
5
SYSCTL_DCGCI2C_D5
I2C Module 5 Deep-Sleep Mode Clock Gating Control
5
6
DCGCSSI
Synchronous Serial Interface Deep-Sleep Mode Clock Gating Control
0x81C
-1
read-write
n
0x0
0x0
SYSCTL_DCGCSSI_D0
SSI Module 0 Deep-Sleep Mode Clock Gating Control
0
1
SYSCTL_DCGCSSI_D1
SSI Module 1 Deep-Sleep Mode Clock Gating Control
1
2
SYSCTL_DCGCSSI_D2
SSI Module 2 Deep-Sleep Mode Clock Gating Control
2
3
SYSCTL_DCGCSSI_D3
SSI Module 3 Deep-Sleep Mode Clock Gating Control
3
4
DCGCTIMER
16/32-Bit General-Purpose Timer Deep-Sleep Mode Clock Gating Control
0x804
-1
read-write
n
0x0
0x0
SYSCTL_DCGCTIMER_D0
16/32-Bit General-Purpose Timer 0 Deep-Sleep Mode Clock Gating Control
0
1
SYSCTL_DCGCTIMER_D1
16/32-Bit General-Purpose Timer 1 Deep-Sleep Mode Clock Gating Control
1
2
SYSCTL_DCGCTIMER_D2
16/32-Bit General-Purpose Timer 2 Deep-Sleep Mode Clock Gating Control
2
3
SYSCTL_DCGCTIMER_D3
16/32-Bit General-Purpose Timer 3 Deep-Sleep Mode Clock Gating Control
3
4
SYSCTL_DCGCTIMER_D4
16/32-Bit General-Purpose Timer 4 Deep-Sleep Mode Clock Gating Control
4
5
SYSCTL_DCGCTIMER_D5
16/32-Bit General-Purpose Timer 5 Deep-Sleep Mode Clock Gating Control
5
6
DCGCUART
Universal Asynchronous Receiver/Transmitter Deep-Sleep Mode Clock Gating Control
0x818
-1
read-write
n
0x0
0x0
SYSCTL_DCGCUART_D0
UART Module 0 Deep-Sleep Mode Clock Gating Control
0
1
SYSCTL_DCGCUART_D1
UART Module 1 Deep-Sleep Mode Clock Gating Control
1
2
SYSCTL_DCGCUART_D2
UART Module 2 Deep-Sleep Mode Clock Gating Control
2
3
SYSCTL_DCGCUART_D3
UART Module 3 Deep-Sleep Mode Clock Gating Control
3
4
SYSCTL_DCGCUART_D4
UART Module 4 Deep-Sleep Mode Clock Gating Control
4
5
SYSCTL_DCGCUART_D5
UART Module 5 Deep-Sleep Mode Clock Gating Control
5
6
SYSCTL_DCGCUART_D6
UART Module 6 Deep-Sleep Mode Clock Gating Control
6
7
SYSCTL_DCGCUART_D7
UART Module 7 Deep-Sleep Mode Clock Gating Control
7
8
DCGCWD
Watchdog Timer Deep-Sleep Mode Clock Gating Control
0x800
-1
read-write
n
0x0
0x0
SYSCTL_DCGCWD_D0
Watchdog Timer 0 Deep-Sleep Mode Clock Gating Control
0
1
SYSCTL_DCGCWD_D1
Watchdog Timer 1 Deep-Sleep Mode Clock Gating Control
1
2
DCGCWTIMER
32/64-Bit Wide General-Purpose Timer Deep-Sleep Mode Clock Gating Control
0x85C
-1
read-write
n
0x0
0x0
SYSCTL_DCGCWTIMER_D0
32/64-Bit Wide General-Purpose Timer 0 Deep-Sleep Mode Clock Gating Control
0
1
SYSCTL_DCGCWTIMER_D1
32/64-Bit Wide General-Purpose Timer 1 Deep-Sleep Mode Clock Gating Control
1
2
SYSCTL_DCGCWTIMER_D2
32/64-Bit Wide General-Purpose Timer 2 Deep-Sleep Mode Clock Gating Control
2
3
SYSCTL_DCGCWTIMER_D3
32/64-Bit Wide General-Purpose Timer 3 Deep-Sleep Mode Clock Gating Control
3
4
SYSCTL_DCGCWTIMER_D4
32/64-Bit Wide General-Purpose Timer 4 Deep-Sleep Mode Clock Gating Control
4
5
SYSCTL_DCGCWTIMER_D5
32/64-Bit Wide General-Purpose Timer 5 Deep-Sleep Mode Clock Gating Control
5
6
DID0
Device Identification 0
0x0
-1
read-write
n
0x0
0x0
SYSCTL_DID0_CLASS
Device Class
16
24
SYSCTL_DID0_CLASS_TM4C123
Tiva TM4C123x and TM4E123x microcontrollers
0x5
SYSCTL_DID0_MAJ
Major Revision
8
16
SYSCTL_DID0_MAJ_REVA
Revision A (initial device)
0x0
SYSCTL_DID0_MAJ_REVB
Revision B (first base layer revision)
0x1
SYSCTL_DID0_MAJ_REVC
Revision C (second base layer revision)
0x2
SYSCTL_DID0_MIN
Minor Revision
0
8
SYSCTL_DID0_MIN_0
Initial device, or a major revision update
0x0
SYSCTL_DID0_MIN_1
First metal layer change
0x1
SYSCTL_DID0_MIN_2
Second metal layer change
0x2
SYSCTL_DID0_VER
DID0 Version
28
31
SYSCTL_DID0_VER_1
Second version of the DID0 register format.
0x1
DID1
Device Identification 1
0x4
-1
read-write
n
0x0
0x0
SYSCTL_DID1_FAM
Family
24
28
SYSCTL_DID1_PINCNT
Package Pin Count
13
16
SYSCTL_DID1_PINCNT_100
100-pin LQFP package
0x2
SYSCTL_DID1_PINCNT_64
64-pin LQFP package
0x3
SYSCTL_DID1_PINCNT_144
144-pin LQFP package
0x4
SYSCTL_DID1_PINCNT_157
157-pin BGA package
0x5
SYSCTL_DID1_PINCNT_128
128-pin TQFP package
0x6
SYSCTL_DID1_PKG
Package Type
3
5
SYSCTL_DID1_PKG_QFP
QFP package
0x1
SYSCTL_DID1_PKG_BGA
BGA package
0x2
SYSCTL_DID1_PRTNO
Part Number
16
24
SYSCTL_DID1_QUAL
Qualification Status
0
2
SYSCTL_DID1_QUAL_ES
Engineering Sample (unqualified)
0x0
SYSCTL_DID1_QUAL_PP
Pilot Production (unqualified)
0x1
SYSCTL_DID1_QUAL_FQ
Fully Qualified
0x2
SYSCTL_DID1_ROHS
RoHS-Compliance
2
3
SYSCTL_DID1_TEMP
Temperature Range
5
8
SYSCTL_DID1_TEMP_I
Industrial temperature range
0x1
SYSCTL_DID1_TEMP_E
Extended temperature range
0x2
SYSCTL_DID1_TEMP_IE
Available in both industrial temperature range (-40C to 85C) and extended temperature range (-40C to 105C) devices. See
0x3
SYSCTL_DID1_VER
DID1 Version
28
32
DSLPCLKCFG
Deep Sleep Clock Configuration
0x144
-1
read-write
n
0x0
0x0
SYSCTL_DSLPCLKCFG_D
Divider Field Override
23
29
SYSCTL_DSLPCLKCFG_O
Clock Source
4
7
SYSCTL_DSLPCLKCFG_O_IGN
MOSC
0x0
SYSCTL_DSLPCLKCFG_O_IO
PIOSC
0x1
SYSCTL_DSLPCLKCFG_O_30
LFIOSC
0x3
SYSCTL_DSLPCLKCFG_O_32
32.768 kHz
0x7
SYSCTL_DSLPCLKCFG_PIOSCPD
PIOSC Power Down Request
1
2
DSLPPWRCFG
Deep-Sleep Power Configuration
0x18C
-1
read-write
n
0x0
0x0
SYSCTL_DSLPPWRCFG_FLASHPM
Flash Power Modes
4
6
SYSCTL_DSLPPWRCFG_FLASHPM_NRM
Active Mode
0x0
SYSCTL_DSLPPWRCFG_FLASHPM_SLP
Low Power Mode
0x2
SYSCTL_DSLPPWRCFG_SRAMPM
SRAM Power Modes
0
2
SYSCTL_DSLPPWRCFG_SRAMPM_NRM
Active Mode
0x0
SYSCTL_DSLPPWRCFG_SRAMPM_SBY
Standby Mode
0x1
SYSCTL_DSLPPWRCFG_SRAMPM_LP
Low Power Mode
0x3
GPIOHBCTL
GPIO High-Performance Bus Control
0x6C
-1
read-write
n
0x0
0x0
SYSCTL_GPIOHBCTL_PORTA
Port A Advanced High-Performance Bus
0
1
SYSCTL_GPIOHBCTL_PORTB
Port B Advanced High-Performance Bus
1
2
SYSCTL_GPIOHBCTL_PORTC
Port C Advanced High-Performance Bus
2
3
SYSCTL_GPIOHBCTL_PORTD
Port D Advanced High-Performance Bus
3
4
SYSCTL_GPIOHBCTL_PORTE
Port E Advanced High-Performance Bus
4
5
SYSCTL_GPIOHBCTL_PORTF
Port F Advanced High-Performance Bus
5
6
SYSCTL_GPIOHBCTL_PORTG
Port G Advanced High-Performance Bus
6
7
SYSCTL_GPIOHBCTL_PORTH
Port H Advanced High-Performance Bus
7
8
SYSCTL_GPIOHBCTL_PORTJ
Port J Advanced High-Performance Bus
8
9
IMC
Interrupt Mask Control
0x54
-1
read-write
n
0x0
0x0
SYSCTL_IMC_BOR0IM
VDD under BOR0 Interrupt Mask
11
12
SYSCTL_IMC_BOR1IM
VDD under BOR1 Interrupt Mask
1
2
SYSCTL_IMC_MOFIM
Main Oscillator Failure Interrupt Mask
3
4
SYSCTL_IMC_MOSCPUPIM
MOSC Power Up Interrupt Mask
8
9
SYSCTL_IMC_PLLLIM
PLL Lock Interrupt Mask
6
7
SYSCTL_IMC_VDDAIM
VDDA Power OK Interrupt Mask
10
11
LDODPCTL
LDO Deep-Sleep Power Control
0x1BC
-1
read-write
n
0x0
0x0
SYSCTL_LDODPCTL_VADJEN
Voltage Adjust Enable
31
32
SYSCTL_LDODPCTL_VLDO
LDO Output Voltage
0
8
SYSCTL_LDODPCTL_VLDO_0_90V
0.90 V
0x12
SYSCTL_LDODPCTL_VLDO_0_95V
0.95 V
0x13
SYSCTL_LDODPCTL_VLDO_1_00V
1.00 V
0x14
SYSCTL_LDODPCTL_VLDO_1_05V
1.05 V
0x15
SYSCTL_LDODPCTL_VLDO_1_10V
1.10 V
0x16
SYSCTL_LDODPCTL_VLDO_1_15V
1.15 V
0x17
SYSCTL_LDODPCTL_VLDO_1_20V
1.20 V
0x18
LDOSPCTL
LDO Sleep Power Control
0x1B4
-1
read-write
n
0x0
0x0
SYSCTL_LDOSPCTL_VADJEN
Voltage Adjust Enable
31
32
SYSCTL_LDOSPCTL_VLDO
LDO Output Voltage
0
8
SYSCTL_LDOSPCTL_VLDO_0_90V
0.90 V
0x12
SYSCTL_LDOSPCTL_VLDO_0_95V
0.95 V
0x13
SYSCTL_LDOSPCTL_VLDO_1_00V
1.00 V
0x14
SYSCTL_LDOSPCTL_VLDO_1_05V
1.05 V
0x15
SYSCTL_LDOSPCTL_VLDO_1_10V
1.10 V
0x16
SYSCTL_LDOSPCTL_VLDO_1_15V
1.15 V
0x17
SYSCTL_LDOSPCTL_VLDO_1_20V
1.20 V
0x18
MISC
Masked Interrupt Status and Clear
0x58
-1
read-write
n
0x0
0x0
SYSCTL_MISC_BOR0MIS
VDD under BOR0 Masked Interrupt Status
11
12
SYSCTL_MISC_BOR1MIS
VDD under BOR1 Masked Interrupt Status
1
2
SYSCTL_MISC_MOFMIS
Main Oscillator Failure Masked Interrupt Status
3
4
SYSCTL_MISC_MOSCPUPMIS
MOSC Power Up Masked Interrupt Status
8
9
SYSCTL_MISC_PLLLMIS
PLL Lock Masked Interrupt Status
6
7
SYSCTL_MISC_VDDAMIS
VDDA Power OK Masked Interrupt Status
10
11
MOSCCTL
Main Oscillator Control
0x7C
-1
read-write
n
0x0
0x0
SYSCTL_MOSCCTL_CVAL
Clock Validation for MOSC
0
1
SYSCTL_MOSCCTL_MOSCIM
MOSC Failure Action
1
2
SYSCTL_MOSCCTL_NOXTAL
No Crystal Connected
2
3
NVMSTAT
Non-Volatile Memory Information
0x1A0
-1
read-write
n
0x0
0x0
SYSCTL_NVMSTAT_FWB
32 Word Flash Write Buffer Available
0
1
PBORCTL
Brown-Out Reset Control
0x30
-1
read-write
n
0x0
0x0
SYSCTL_PBORCTL_BOR0
VDD under BOR0 Event Action
2
3
SYSCTL_PBORCTL_BOR1
VDD under BOR1 Event Action
1
2
PIOSCCAL
Precision Internal Oscillator Calibration
0x150
-1
read-write
n
0x0
0x0
SYSCTL_PIOSCCAL_CAL
Start Calibration
9
10
SYSCTL_PIOSCCAL_UPDATE
Update Trim
8
9
SYSCTL_PIOSCCAL_UT
User Trim Value
0
7
SYSCTL_PIOSCCAL_UTEN
Use User Trim Value
31
32
PIOSCSTAT
Precision Internal Oscillator Statistics
0x154
-1
read-write
n
0x0
0x0
SYSCTL_PIOSCSTAT_CR
Calibration Result
8
10
SYSCTL_PIOSCSTAT_CRNONE
Calibration has not been attempted
0x0
SYSCTL_PIOSCSTAT_CRPASS
The last calibration operation completed to meet 1% accuracy
0x1
SYSCTL_PIOSCSTAT_CRFAIL
The last calibration operation failed to meet 1% accuracy
0x2
SYSCTL_PIOSCSTAT_CT
Calibration Trim Value
0
7
SYSCTL_PIOSCSTAT_DT
Default Trim Value
16
23
PLLFREQ0
PLL Frequency 0
0x160
-1
read-write
n
0x0
0x0
SYSCTL_PLLFREQ0_MFRAC
PLL M Fractional Value
10
20
SYSCTL_PLLFREQ0_MINT
PLL M Integer Value
0
10
PLLFREQ1
PLL Frequency 1
0x164
-1
read-write
n
0x0
0x0
SYSCTL_PLLFREQ1_N
PLL N Value
0
5
SYSCTL_PLLFREQ1_Q
PLL Q Value
8
13
PLLSTAT
PLL Status
0x168
-1
read-write
n
0x0
0x0
SYSCTL_PLLSTAT_LOCK
PLL Lock
0
1
PPACMP
Analog Comparator Peripheral Present
0x33C
-1
read-write
n
0x0
0x0
SYSCTL_PPACMP_P0
Analog Comparator Module Present
0
1
PPADC
Analog-to-Digital Converter Peripheral Present
0x338
-1
read-write
n
0x0
0x0
SYSCTL_PPADC_P0
ADC Module 0 Present
0
1
SYSCTL_PPADC_P1
ADC Module 1 Present
1
2
PPCAN
Controller Area Network Peripheral Present
0x334
-1
read-write
n
0x0
0x0
SYSCTL_PPCAN_P0
CAN Module 0 Present
0
1
SYSCTL_PPCAN_P1
CAN Module 1 Present
1
2
PPDMA
Micro Direct Memory Access Peripheral Present
0x30C
-1
read-write
n
0x0
0x0
SYSCTL_PPDMA_P0
uDMA Module Present
0
1
PPEEPROM
EEPROM Peripheral Present
0x358
-1
read-write
n
0x0
0x0
SYSCTL_PPEEPROM_P0
EEPROM Module Present
0
1
PPGPIO
General-Purpose Input/Output Peripheral Present
0x308
-1
read-write
n
0x0
0x0
SYSCTL_PPGPIO_P0
GPIO Port A Present
0
1
SYSCTL_PPGPIO_P1
GPIO Port B Present
1
2
SYSCTL_PPGPIO_P10
GPIO Port L Present
10
11
SYSCTL_PPGPIO_P11
GPIO Port M Present
11
12
SYSCTL_PPGPIO_P12
GPIO Port N Present
12
13
SYSCTL_PPGPIO_P13
GPIO Port P Present
13
14
SYSCTL_PPGPIO_P14
GPIO Port Q Present
14
15
SYSCTL_PPGPIO_P2
GPIO Port C Present
2
3
SYSCTL_PPGPIO_P3
GPIO Port D Present
3
4
SYSCTL_PPGPIO_P4
GPIO Port E Present
4
5
SYSCTL_PPGPIO_P5
GPIO Port F Present
5
6
SYSCTL_PPGPIO_P6
GPIO Port G Present
6
7
SYSCTL_PPGPIO_P7
GPIO Port H Present
7
8
SYSCTL_PPGPIO_P8
GPIO Port J Present
8
9
SYSCTL_PPGPIO_P9
GPIO Port K Present
9
10
PPHIB
Hibernation Peripheral Present
0x314
-1
read-write
n
0x0
0x0
SYSCTL_PPHIB_P0
Hibernation Module Present
0
1
PPI2C
Inter-Integrated Circuit Peripheral Present
0x320
-1
read-write
n
0x0
0x0
SYSCTL_PPI2C_P0
I2C Module 0 Present
0
1
SYSCTL_PPI2C_P1
I2C Module 1 Present
1
2
SYSCTL_PPI2C_P2
I2C Module 2 Present
2
3
SYSCTL_PPI2C_P3
I2C Module 3 Present
3
4
SYSCTL_PPI2C_P4
I2C Module 4 Present
4
5
SYSCTL_PPI2C_P5
I2C Module 5 Present
5
6
PPPWM
Pulse Width Modulator Peripheral Present
0x340
-1
read-write
n
0x0
0x0
SYSCTL_PPPWM_P0
PWM Module 0 Present
0
1
SYSCTL_PPPWM_P1
PWM Module 1 Present
1
2
PPQEI
Quadrature Encoder Interface Peripheral Present
0x344
-1
read-write
n
0x0
0x0
SYSCTL_PPQEI_P0
QEI Module 0 Present
0
1
SYSCTL_PPQEI_P1
QEI Module 1 Present
1
2
PPSSI
Synchronous Serial Interface Peripheral Present
0x31C
-1
read-write
n
0x0
0x0
SYSCTL_PPSSI_P0
SSI Module 0 Present
0
1
SYSCTL_PPSSI_P1
SSI Module 1 Present
1
2
SYSCTL_PPSSI_P2
SSI Module 2 Present
2
3
SYSCTL_PPSSI_P3
SSI Module 3 Present
3
4
PPTIMER
16/32-Bit General-Purpose Timer Peripheral Present
0x304
-1
read-write
n
0x0
0x0
SYSCTL_PPTIMER_P0
16/32-Bit General-Purpose Timer 0 Present
0
1
SYSCTL_PPTIMER_P1
16/32-Bit General-Purpose Timer 1 Present
1
2
SYSCTL_PPTIMER_P2
16/32-Bit General-Purpose Timer 2 Present
2
3
SYSCTL_PPTIMER_P3
16/32-Bit General-Purpose Timer 3 Present
3
4
SYSCTL_PPTIMER_P4
16/32-Bit General-Purpose Timer 4 Present
4
5
SYSCTL_PPTIMER_P5
16/32-Bit General-Purpose Timer 5 Present
5
6
PPUART
Universal Asynchronous Receiver/Transmitter Peripheral Present
0x318
-1
read-write
n
0x0
0x0
SYSCTL_PPUART_P0
UART Module 0 Present
0
1
SYSCTL_PPUART_P1
UART Module 1 Present
1
2
SYSCTL_PPUART_P2
UART Module 2 Present
2
3
SYSCTL_PPUART_P3
UART Module 3 Present
3
4
SYSCTL_PPUART_P4
UART Module 4 Present
4
5
SYSCTL_PPUART_P5
UART Module 5 Present
5
6
SYSCTL_PPUART_P6
UART Module 6 Present
6
7
SYSCTL_PPUART_P7
UART Module 7 Present
7
8
PPUSB
Universal Serial Bus Peripheral Present
0x328
-1
read-write
n
0x0
0x0
SYSCTL_PPUSB_P0
USB Module Present
0
1
PPWD
Watchdog Timer Peripheral Present
0x300
-1
read-write
n
0x0
0x0
SYSCTL_PPWD_P0
Watchdog Timer 0 Present
0
1
SYSCTL_PPWD_P1
Watchdog Timer 1 Present
1
2
PPWTIMER
32/64-Bit Wide General-Purpose Timer Peripheral Present
0x35C
-1
read-write
n
0x0
0x0
SYSCTL_PPWTIMER_P0
32/64-Bit Wide General-Purpose Timer 0 Present
0
1
SYSCTL_PPWTIMER_P1
32/64-Bit Wide General-Purpose Timer 1 Present
1
2
SYSCTL_PPWTIMER_P2
32/64-Bit Wide General-Purpose Timer 2 Present
2
3
SYSCTL_PPWTIMER_P3
32/64-Bit Wide General-Purpose Timer 3 Present
3
4
SYSCTL_PPWTIMER_P4
32/64-Bit Wide General-Purpose Timer 4 Present
4
5
SYSCTL_PPWTIMER_P5
32/64-Bit Wide General-Purpose Timer 5 Present
5
6
PRACMP
Analog Comparator Peripheral Ready
0xA3C
-1
read-write
n
0x0
0x0
SYSCTL_PRACMP_R0
Analog Comparator Module 0 Peripheral Ready
0
1
PRADC
Analog-to-Digital Converter Peripheral Ready
0xA38
-1
read-write
n
0x0
0x0
SYSCTL_PRADC_R0
ADC Module 0 Peripheral Ready
0
1
SYSCTL_PRADC_R1
ADC Module 1 Peripheral Ready
1
2
PRCAN
Controller Area Network Peripheral Ready
0xA34
-1
read-write
n
0x0
0x0
SYSCTL_PRCAN_R0
CAN Module 0 Peripheral Ready
0
1
PRDMA
Micro Direct Memory Access Peripheral Ready
0xA0C
-1
read-write
n
0x0
0x0
SYSCTL_PRDMA_R0
uDMA Module Peripheral Ready
0
1
PREEPROM
EEPROM Peripheral Ready
0xA58
-1
read-write
n
0x0
0x0
SYSCTL_PREEPROM_R0
EEPROM Module Peripheral Ready
0
1
PRGPIO
General-Purpose Input/Output Peripheral Ready
0xA08
-1
read-write
n
0x0
0x0
SYSCTL_PRGPIO_R0
GPIO Port A Peripheral Ready
0
1
SYSCTL_PRGPIO_R1
GPIO Port B Peripheral Ready
1
2
SYSCTL_PRGPIO_R2
GPIO Port C Peripheral Ready
2
3
SYSCTL_PRGPIO_R3
GPIO Port D Peripheral Ready
3
4
SYSCTL_PRGPIO_R4
GPIO Port E Peripheral Ready
4
5
SYSCTL_PRGPIO_R5
GPIO Port F Peripheral Ready
5
6
SYSCTL_PRGPIO_R6
GPIO Port G Peripheral Ready
6
7
SYSCTL_PRGPIO_R7
GPIO Port H Peripheral Ready
7
8
SYSCTL_PRGPIO_R8
GPIO Port J Peripheral Ready
8
9
SYSCTL_PRGPIO_R9
GPIO Port K Peripheral Ready
9
10
PRHIB
Hibernation Peripheral Ready
0xA14
-1
read-write
n
0x0
0x0
SYSCTL_PRHIB_R0
Hibernation Module Peripheral Ready
0
1
PRI2C
Inter-Integrated Circuit Peripheral Ready
0xA20
-1
read-write
n
0x0
0x0
SYSCTL_PRI2C_R0
I2C Module 0 Peripheral Ready
0
1
SYSCTL_PRI2C_R1
I2C Module 1 Peripheral Ready
1
2
SYSCTL_PRI2C_R2
I2C Module 2 Peripheral Ready
2
3
SYSCTL_PRI2C_R3
I2C Module 3 Peripheral Ready
3
4
SYSCTL_PRI2C_R4
I2C Module 4 Peripheral Ready
4
5
SYSCTL_PRI2C_R5
I2C Module 5 Peripheral Ready
5
6
PRSSI
Synchronous Serial Interface Peripheral Ready
0xA1C
-1
read-write
n
0x0
0x0
SYSCTL_PRSSI_R0
SSI Module 0 Peripheral Ready
0
1
SYSCTL_PRSSI_R1
SSI Module 1 Peripheral Ready
1
2
SYSCTL_PRSSI_R2
SSI Module 2 Peripheral Ready
2
3
SYSCTL_PRSSI_R3
SSI Module 3 Peripheral Ready
3
4
PRTIMER
16/32-Bit General-Purpose Timer Peripheral Ready
0xA04
-1
read-write
n
0x0
0x0
SYSCTL_PRTIMER_R0
16/32-Bit General-Purpose Timer 0 Peripheral Ready
0
1
SYSCTL_PRTIMER_R1
16/32-Bit General-Purpose Timer 1 Peripheral Ready
1
2
SYSCTL_PRTIMER_R2
16/32-Bit General-Purpose Timer 2 Peripheral Ready
2
3
SYSCTL_PRTIMER_R3
16/32-Bit General-Purpose Timer 3 Peripheral Ready
3
4
SYSCTL_PRTIMER_R4
16/32-Bit General-Purpose Timer 4 Peripheral Ready
4
5
SYSCTL_PRTIMER_R5
16/32-Bit General-Purpose Timer 5 Peripheral Ready
5
6
PRUART
Universal Asynchronous Receiver/Transmitter Peripheral Ready
0xA18
-1
read-write
n
0x0
0x0
SYSCTL_PRUART_R0
UART Module 0 Peripheral Ready
0
1
SYSCTL_PRUART_R1
UART Module 1 Peripheral Ready
1
2
SYSCTL_PRUART_R2
UART Module 2 Peripheral Ready
2
3
SYSCTL_PRUART_R3
UART Module 3 Peripheral Ready
3
4
SYSCTL_PRUART_R4
UART Module 4 Peripheral Ready
4
5
SYSCTL_PRUART_R5
UART Module 5 Peripheral Ready
5
6
SYSCTL_PRUART_R6
UART Module 6 Peripheral Ready
6
7
SYSCTL_PRUART_R7
UART Module 7 Peripheral Ready
7
8
PRWD
Watchdog Timer Peripheral Ready
0xA00
-1
read-write
n
0x0
0x0
SYSCTL_PRWD_R0
Watchdog Timer 0 Peripheral Ready
0
1
SYSCTL_PRWD_R1
Watchdog Timer 1 Peripheral Ready
1
2
PRWTIMER
32/64-Bit Wide General-Purpose Timer Peripheral Ready
0xA5C
-1
read-write
n
0x0
0x0
SYSCTL_PRWTIMER_R0
32/64-Bit Wide General-Purpose Timer 0 Peripheral Ready
0
1
SYSCTL_PRWTIMER_R1
32/64-Bit Wide General-Purpose Timer 1 Peripheral Ready
1
2
SYSCTL_PRWTIMER_R2
32/64-Bit Wide General-Purpose Timer 2 Peripheral Ready
2
3
SYSCTL_PRWTIMER_R3
32/64-Bit Wide General-Purpose Timer 3 Peripheral Ready
3
4
SYSCTL_PRWTIMER_R4
32/64-Bit Wide General-Purpose Timer 4 Peripheral Ready
4
5
SYSCTL_PRWTIMER_R5
32/64-Bit Wide General-Purpose Timer 5 Peripheral Ready
5
6
RCC
Run-Mode Clock Configuration
0x60
-1
read-write
n
0x0
0x0
SYSCTL_RCC_ACG
Auto Clock Gating
27
28
SYSCTL_RCC_BYPASS
PLL Bypass
11
12
SYSCTL_RCC_MOSCDIS
Main Oscillator Disable
0
1
SYSCTL_RCC_OSCSRC
Oscillator Source
4
6
SYSCTL_RCC_OSCSRC_MAIN
MOSC
0x0
SYSCTL_RCC_OSCSRC_INT
IOSC
0x1
SYSCTL_RCC_OSCSRC_INT4
IOSC/4
0x2
SYSCTL_RCC_OSCSRC_30
LFIOSC
0x3
SYSCTL_RCC_PWRDN
PLL Power Down
13
14
SYSCTL_RCC_SYSDIV
System Clock Divisor
23
27
SYSCTL_RCC_USESYSDIV
Enable System Clock Divider
22
23
SYSCTL_RCC_XTAL
Crystal Value
6
11
SYSCTL_RCC_XTAL_10MHZ
10 MHz
0x10
SYSCTL_RCC_XTAL_12MHZ
12 MHz
0x11
SYSCTL_RCC_XTAL_12_2MHZ
12.288 MHz
0x12
SYSCTL_RCC_XTAL_13_5MHZ
13.56 MHz
0x13
SYSCTL_RCC_XTAL_14_3MHZ
14.31818 MHz
0x14
SYSCTL_RCC_XTAL_16MHZ
16 MHz
0x15
SYSCTL_RCC_XTAL_16_3MHZ
16.384 MHz
0x16
SYSCTL_RCC_XTAL_18MHZ
18.0 MHz (USB)
0x17
SYSCTL_RCC_XTAL_20MHZ
20.0 MHz (USB)
0x18
SYSCTL_RCC_XTAL_24MHZ
24.0 MHz (USB)
0x19
SYSCTL_RCC_XTAL_25MHZ
25.0 MHz (USB)
0x1a
SYSCTL_RCC_XTAL_4MHZ
4 MHz
0x6
SYSCTL_RCC_XTAL_4_09MHZ
4.096 MHz
0x7
SYSCTL_RCC_XTAL_4_91MHZ
4.9152 MHz
0x8
SYSCTL_RCC_XTAL_5MHZ
5 MHz
0x9
SYSCTL_RCC_XTAL_5_12MHZ
5.12 MHz
0xa
SYSCTL_RCC_XTAL_6MHZ
6 MHz
0xb
SYSCTL_RCC_XTAL_6_14MHZ
6.144 MHz
0xc
SYSCTL_RCC_XTAL_7_37MHZ
7.3728 MHz
0xd
SYSCTL_RCC_XTAL_8MHZ
8 MHz
0xe
SYSCTL_RCC_XTAL_8_19MHZ
8.192 MHz
0xf
RCC2
Run-Mode Clock Configuration 2
0x70
-1
read-write
n
0x0
0x0
SYSCTL_RCC2_BYPASS2
PLL Bypass 2
11
12
SYSCTL_RCC2_DIV400
Divide PLL as 400 MHz vs. 200 MHz
30
31
SYSCTL_RCC2_OSCSRC2
Oscillator Source 2
4
7
SYSCTL_RCC2_OSCSRC2_MO
MOSC
0x0
SYSCTL_RCC2_OSCSRC2_IO
PIOSC
0x1
SYSCTL_RCC2_OSCSRC2_IO4
PIOSC/4
0x2
SYSCTL_RCC2_OSCSRC2_30
LFIOSC
0x3
SYSCTL_RCC2_OSCSRC2_32
32.768 kHz
0x7
SYSCTL_RCC2_PWRDN2
Power-Down PLL 2
13
14
SYSCTL_RCC2_SYSDIV2
System Clock Divisor 2
23
29
SYSCTL_RCC2_SYSDIV2LSB
Additional LSB for SYSDIV2
22
23
SYSCTL_RCC2_USERCC2
Use RCC2
31
32
RCGC0
Run Mode Clock Gating Control Register 0
0x100
-1
read-write
n
0x0
0x0
SYSCTL_RCGC0_ADC0
ADC0 Clock Gating Control
16
17
SYSCTL_RCGC0_ADC0SPD
ADC0 Sample Speed
8
10
SYSCTL_RCGC0_ADC0SPD_125K
125K samples/second
0x0
SYSCTL_RCGC0_ADC0SPD_250K
250K samples/second
0x1
SYSCTL_RCGC0_ADC0SPD_500K
500K samples/second
0x2
SYSCTL_RCGC0_ADC0SPD_1M
1M samples/second
0x3
SYSCTL_RCGC0_ADC1
ADC1 Clock Gating Control
17
18
SYSCTL_RCGC0_ADC1SPD
ADC1 Sample Speed
10
12
SYSCTL_RCGC0_ADC1SPD_125K
125K samples/second
0x0
SYSCTL_RCGC0_ADC1SPD_250K
250K samples/second
0x1
SYSCTL_RCGC0_ADC1SPD_500K
500K samples/second
0x2
SYSCTL_RCGC0_ADC1SPD_1M
1M samples/second
0x3
SYSCTL_RCGC0_CAN0
CAN0 Clock Gating Control
24
25
SYSCTL_RCGC0_HIB
HIB Clock Gating Control
6
7
SYSCTL_RCGC0_WDT0
WDT0 Clock Gating Control
3
4
SYSCTL_RCGC0_WDT1
WDT1 Clock Gating Control
28
29
RCGC1
Run Mode Clock Gating Control Register 1
0x104
-1
read-write
n
0x0
0x0
SYSCTL_RCGC1_COMP0
Analog Comparator 0 Clock Gating
24
25
SYSCTL_RCGC1_COMP1
Analog Comparator 1 Clock Gating
25
26
SYSCTL_RCGC1_COMP2
Analog Comparator 2 Clock Gating
26
27
SYSCTL_RCGC1_I2C0
I2C0 Clock Gating Control
12
13
SYSCTL_RCGC1_I2C1
I2C1 Clock Gating Control
14
15
SYSCTL_RCGC1_SSI0
SSI0 Clock Gating Control
4
5
SYSCTL_RCGC1_SSI1
SSI1 Clock Gating Control
5
6
SYSCTL_RCGC1_TIMER0
Timer 0 Clock Gating Control
16
17
SYSCTL_RCGC1_TIMER1
Timer 1 Clock Gating Control
17
18
SYSCTL_RCGC1_TIMER2
Timer 2 Clock Gating Control
18
19
SYSCTL_RCGC1_TIMER3
Timer 3 Clock Gating Control
19
20
SYSCTL_RCGC1_UART0
UART0 Clock Gating Control
0
1
SYSCTL_RCGC1_UART1
UART1 Clock Gating Control
1
2
SYSCTL_RCGC1_UART2
UART2 Clock Gating Control
2
3
RCGC2
Run Mode Clock Gating Control Register 2
0x108
-1
read-write
n
0x0
0x0
SYSCTL_RCGC2_GPIOA
Port A Clock Gating Control
0
1
SYSCTL_RCGC2_GPIOB
Port B Clock Gating Control
1
2
SYSCTL_RCGC2_GPIOC
Port C Clock Gating Control
2
3
SYSCTL_RCGC2_GPIOD
Port D Clock Gating Control
3
4
SYSCTL_RCGC2_GPIOE
Port E Clock Gating Control
4
5
SYSCTL_RCGC2_GPIOF
Port F Clock Gating Control
5
6
SYSCTL_RCGC2_GPIOG
Port G Clock Gating Control
6
7
SYSCTL_RCGC2_GPIOH
Port H Clock Gating Control
7
8
SYSCTL_RCGC2_GPIOJ
Port J Clock Gating Control
8
9
SYSCTL_RCGC2_UDMA
Micro-DMA Clock Gating Control
13
14
RCGCACMP
Analog Comparator Run Mode Clock Gating Control
0x63C
-1
read-write
n
0x0
0x0
SYSCTL_RCGCACMP_R0
Analog Comparator Module 0 Run Mode Clock Gating Control
0
1
RCGCADC
Analog-to-Digital Converter Run Mode Clock Gating Control
0x638
-1
read-write
n
0x0
0x0
SYSCTL_RCGCADC_R0
ADC Module 0 Run Mode Clock Gating Control
0
1
SYSCTL_RCGCADC_R1
ADC Module 1 Run Mode Clock Gating Control
1
2
RCGCCAN
Controller Area Network Run Mode Clock Gating Control
0x634
-1
read-write
n
0x0
0x0
SYSCTL_RCGCCAN_R0
CAN Module 0 Run Mode Clock Gating Control
0
1
RCGCDMA
Micro Direct Memory Access Run Mode Clock Gating Control
0x60C
-1
read-write
n
0x0
0x0
SYSCTL_RCGCDMA_R0
uDMA Module Run Mode Clock Gating Control
0
1
RCGCEEPROM
EEPROM Run Mode Clock Gating Control
0x658
-1
read-write
n
0x0
0x0
SYSCTL_RCGCEEPROM_R0
EEPROM Module Run Mode Clock Gating Control
0
1
RCGCGPIO
General-Purpose Input/Output Run Mode Clock Gating Control
0x608
-1
read-write
n
0x0
0x0
SYSCTL_RCGCGPIO_R0
GPIO Port A Run Mode Clock Gating Control
0
1
SYSCTL_RCGCGPIO_R1
GPIO Port B Run Mode Clock Gating Control
1
2
SYSCTL_RCGCGPIO_R2
GPIO Port C Run Mode Clock Gating Control
2
3
SYSCTL_RCGCGPIO_R3
GPIO Port D Run Mode Clock Gating Control
3
4
SYSCTL_RCGCGPIO_R4
GPIO Port E Run Mode Clock Gating Control
4
5
SYSCTL_RCGCGPIO_R5
GPIO Port F Run Mode Clock Gating Control
5
6
SYSCTL_RCGCGPIO_R6
GPIO Port G Run Mode Clock Gating Control
6
7
SYSCTL_RCGCGPIO_R7
GPIO Port H Run Mode Clock Gating Control
7
8
SYSCTL_RCGCGPIO_R8
GPIO Port J Run Mode Clock Gating Control
8
9
SYSCTL_RCGCGPIO_R9
GPIO Port K Run Mode Clock Gating Control
9
10
RCGCHIB
Hibernation Run Mode Clock Gating Control
0x614
-1
read-write
n
0x0
0x0
SYSCTL_RCGCHIB_R0
Hibernation Module Run Mode Clock Gating Control
0
1
RCGCI2C
Inter-Integrated Circuit Run Mode Clock Gating Control
0x620
-1
read-write
n
0x0
0x0
SYSCTL_RCGCI2C_R0
I2C Module 0 Run Mode Clock Gating Control
0
1
SYSCTL_RCGCI2C_R1
I2C Module 1 Run Mode Clock Gating Control
1
2
SYSCTL_RCGCI2C_R2
I2C Module 2 Run Mode Clock Gating Control
2
3
SYSCTL_RCGCI2C_R3
I2C Module 3 Run Mode Clock Gating Control
3
4
SYSCTL_RCGCI2C_R4
I2C Module 4 Run Mode Clock Gating Control
4
5
SYSCTL_RCGCI2C_R5
I2C Module 5 Run Mode Clock Gating Control
5
6
RCGCSSI
Synchronous Serial Interface Run Mode Clock Gating Control
0x61C
-1
read-write
n
0x0
0x0
SYSCTL_RCGCSSI_R0
SSI Module 0 Run Mode Clock Gating Control
0
1
SYSCTL_RCGCSSI_R1
SSI Module 1 Run Mode Clock Gating Control
1
2
SYSCTL_RCGCSSI_R2
SSI Module 2 Run Mode Clock Gating Control
2
3
SYSCTL_RCGCSSI_R3
SSI Module 3 Run Mode Clock Gating Control
3
4
RCGCTIMER
16/32-Bit General-Purpose Timer Run Mode Clock Gating Control
0x604
-1
read-write
n
0x0
0x0
SYSCTL_RCGCTIMER_R0
16/32-Bit General-Purpose Timer 0 Run Mode Clock Gating Control
0
1
SYSCTL_RCGCTIMER_R1
16/32-Bit General-Purpose Timer 1 Run Mode Clock Gating Control
1
2
SYSCTL_RCGCTIMER_R2
16/32-Bit General-Purpose Timer 2 Run Mode Clock Gating Control
2
3
SYSCTL_RCGCTIMER_R3
16/32-Bit General-Purpose Timer 3 Run Mode Clock Gating Control
3
4
SYSCTL_RCGCTIMER_R4
16/32-Bit General-Purpose Timer 4 Run Mode Clock Gating Control
4
5
SYSCTL_RCGCTIMER_R5
16/32-Bit General-Purpose Timer 5 Run Mode Clock Gating Control
5
6
RCGCUART
Universal Asynchronous Receiver/Transmitter Run Mode Clock Gating Control
0x618
-1
read-write
n
0x0
0x0
SYSCTL_RCGCUART_R0
UART Module 0 Run Mode Clock Gating Control
0
1
SYSCTL_RCGCUART_R1
UART Module 1 Run Mode Clock Gating Control
1
2
SYSCTL_RCGCUART_R2
UART Module 2 Run Mode Clock Gating Control
2
3
SYSCTL_RCGCUART_R3
UART Module 3 Run Mode Clock Gating Control
3
4
SYSCTL_RCGCUART_R4
UART Module 4 Run Mode Clock Gating Control
4
5
SYSCTL_RCGCUART_R5
UART Module 5 Run Mode Clock Gating Control
5
6
SYSCTL_RCGCUART_R6
UART Module 6 Run Mode Clock Gating Control
6
7
SYSCTL_RCGCUART_R7
UART Module 7 Run Mode Clock Gating Control
7
8
RCGCWD
Watchdog Timer Run Mode Clock Gating Control
0x600
-1
read-write
n
0x0
0x0
SYSCTL_RCGCWD_R0
Watchdog Timer 0 Run Mode Clock Gating Control
0
1
SYSCTL_RCGCWD_R1
Watchdog Timer 1 Run Mode Clock Gating Control
1
2
RCGCWTIMER
32/64-Bit Wide General-Purpose Timer Run Mode Clock Gating Control
0x65C
-1
read-write
n
0x0
0x0
SYSCTL_RCGCWTIMER_R0
32/64-Bit Wide General-Purpose Timer 0 Run Mode Clock Gating Control
0
1
SYSCTL_RCGCWTIMER_R1
32/64-Bit Wide General-Purpose Timer 1 Run Mode Clock Gating Control
1
2
SYSCTL_RCGCWTIMER_R2
32/64-Bit Wide General-Purpose Timer 2 Run Mode Clock Gating Control
2
3
SYSCTL_RCGCWTIMER_R3
32/64-Bit Wide General-Purpose Timer 3 Run Mode Clock Gating Control
3
4
SYSCTL_RCGCWTIMER_R4
32/64-Bit Wide General-Purpose Timer 4 Run Mode Clock Gating Control
4
5
SYSCTL_RCGCWTIMER_R5
32/64-Bit Wide General-Purpose Timer 5 Run Mode Clock Gating Control
5
6
RESC
Reset Cause
0x5C
-1
read-write
n
0x0
0x0
SYSCTL_RESC_BOR
Brown-Out Reset
2
3
SYSCTL_RESC_EXT
External Reset
0
1
SYSCTL_RESC_MOSCFAIL
MOSC Failure Reset
16
17
SYSCTL_RESC_POR
Power-On Reset
1
2
SYSCTL_RESC_SW
Software Reset
4
5
SYSCTL_RESC_WDT0
Watchdog Timer 0 Reset
3
4
SYSCTL_RESC_WDT1
Watchdog Timer 1 Reset
5
6
RIS
Raw Interrupt Status
0x50
-1
read-write
n
0x0
0x0
SYSCTL_RIS_BOR0RIS
VDD under BOR0 Raw Interrupt Status
11
12
SYSCTL_RIS_BOR1RIS
VDD under BOR1 Raw Interrupt Status
1
2
SYSCTL_RIS_MOFRIS
Main Oscillator Failure Raw Interrupt Status
3
4
SYSCTL_RIS_MOSCPUPRIS
MOSC Power Up Raw Interrupt Status
8
9
SYSCTL_RIS_PLLLRIS
PLL Lock Raw Interrupt Status
6
7
SYSCTL_RIS_VDDARIS
VDDA Power OK Event Raw Interrupt Status
10
11
SCGC0
Sleep Mode Clock Gating Control Register 0
0x110
-1
read-write
n
0x0
0x0
SYSCTL_SCGC0_ADC0
ADC0 Clock Gating Control
16
17
SYSCTL_SCGC0_ADC1
ADC1 Clock Gating Control
17
18
SYSCTL_SCGC0_CAN0
CAN0 Clock Gating Control
24
25
SYSCTL_SCGC0_HIB
HIB Clock Gating Control
6
7
SYSCTL_SCGC0_WDT0
WDT0 Clock Gating Control
3
4
SYSCTL_SCGC0_WDT1
WDT1 Clock Gating Control
28
29
SCGC1
Sleep Mode Clock Gating Control Register 1
0x114
-1
read-write
n
0x0
0x0
SYSCTL_SCGC1_COMP0
Analog Comparator 0 Clock Gating
24
25
SYSCTL_SCGC1_COMP1
Analog Comparator 1 Clock Gating
25
26
SYSCTL_SCGC1_COMP2
Analog Comparator 2 Clock Gating
26
27
SYSCTL_SCGC1_I2C0
I2C0 Clock Gating Control
12
13
SYSCTL_SCGC1_I2C1
I2C1 Clock Gating Control
14
15
SYSCTL_SCGC1_SSI0
SSI0 Clock Gating Control
4
5
SYSCTL_SCGC1_SSI1
SSI1 Clock Gating Control
5
6
SYSCTL_SCGC1_TIMER0
Timer 0 Clock Gating Control
16
17
SYSCTL_SCGC1_TIMER1
Timer 1 Clock Gating Control
17
18
SYSCTL_SCGC1_TIMER2
Timer 2 Clock Gating Control
18
19
SYSCTL_SCGC1_TIMER3
Timer 3 Clock Gating Control
19
20
SYSCTL_SCGC1_UART0
UART0 Clock Gating Control
0
1
SYSCTL_SCGC1_UART1
UART1 Clock Gating Control
1
2
SYSCTL_SCGC1_UART2
UART2 Clock Gating Control
2
3
SCGC2
Sleep Mode Clock Gating Control Register 2
0x118
-1
read-write
n
0x0
0x0
SYSCTL_SCGC2_GPIOA
Port A Clock Gating Control
0
1
SYSCTL_SCGC2_GPIOB
Port B Clock Gating Control
1
2
SYSCTL_SCGC2_GPIOC
Port C Clock Gating Control
2
3
SYSCTL_SCGC2_GPIOD
Port D Clock Gating Control
3
4
SYSCTL_SCGC2_GPIOE
Port E Clock Gating Control
4
5
SYSCTL_SCGC2_GPIOF
Port F Clock Gating Control
5
6
SYSCTL_SCGC2_GPIOG
Port G Clock Gating Control
6
7
SYSCTL_SCGC2_GPIOH
Port H Clock Gating Control
7
8
SYSCTL_SCGC2_GPIOJ
Port J Clock Gating Control
8
9
SYSCTL_SCGC2_UDMA
Micro-DMA Clock Gating Control
13
14
SCGCACMP
Analog Comparator Sleep Mode Clock Gating Control
0x73C
-1
read-write
n
0x0
0x0
SYSCTL_SCGCACMP_S0
Analog Comparator Module 0 Sleep Mode Clock Gating Control
0
1
SCGCADC
Analog-to-Digital Converter Sleep Mode Clock Gating Control
0x738
-1
read-write
n
0x0
0x0
SYSCTL_SCGCADC_S0
ADC Module 0 Sleep Mode Clock Gating Control
0
1
SYSCTL_SCGCADC_S1
ADC Module 1 Sleep Mode Clock Gating Control
1
2
SCGCCAN
Controller Area Network Sleep Mode Clock Gating Control
0x734
-1
read-write
n
0x0
0x0
SYSCTL_SCGCCAN_S0
CAN Module 0 Sleep Mode Clock Gating Control
0
1
SCGCDMA
Micro Direct Memory Access Sleep Mode Clock Gating Control
0x70C
-1
read-write
n
0x0
0x0
SYSCTL_SCGCDMA_S0
uDMA Module Sleep Mode Clock Gating Control
0
1
SCGCEEPROM
EEPROM Sleep Mode Clock Gating Control
0x758
-1
read-write
n
0x0
0x0
SYSCTL_SCGCEEPROM_S0
EEPROM Module Sleep Mode Clock Gating Control
0
1
SCGCGPIO
General-Purpose Input/Output Sleep Mode Clock Gating Control
0x708
-1
read-write
n
0x0
0x0
SYSCTL_SCGCGPIO_S0
GPIO Port A Sleep Mode Clock Gating Control
0
1
SYSCTL_SCGCGPIO_S1
GPIO Port B Sleep Mode Clock Gating Control
1
2
SYSCTL_SCGCGPIO_S2
GPIO Port C Sleep Mode Clock Gating Control
2
3
SYSCTL_SCGCGPIO_S3
GPIO Port D Sleep Mode Clock Gating Control
3
4
SYSCTL_SCGCGPIO_S4
GPIO Port E Sleep Mode Clock Gating Control
4
5
SYSCTL_SCGCGPIO_S5
GPIO Port F Sleep Mode Clock Gating Control
5
6
SYSCTL_SCGCGPIO_S6
GPIO Port G Sleep Mode Clock Gating Control
6
7
SYSCTL_SCGCGPIO_S7
GPIO Port H Sleep Mode Clock Gating Control
7
8
SYSCTL_SCGCGPIO_S8
GPIO Port J Sleep Mode Clock Gating Control
8
9
SYSCTL_SCGCGPIO_S9
GPIO Port K Sleep Mode Clock Gating Control
9
10
SCGCHIB
Hibernation Sleep Mode Clock Gating Control
0x714
-1
read-write
n
0x0
0x0
SYSCTL_SCGCHIB_S0
Hibernation Module Sleep Mode Clock Gating Control
0
1
SCGCI2C
Inter-Integrated Circuit Sleep Mode Clock Gating Control
0x720
-1
read-write
n
0x0
0x0
SYSCTL_SCGCI2C_S0
I2C Module 0 Sleep Mode Clock Gating Control
0
1
SYSCTL_SCGCI2C_S1
I2C Module 1 Sleep Mode Clock Gating Control
1
2
SYSCTL_SCGCI2C_S2
I2C Module 2 Sleep Mode Clock Gating Control
2
3
SYSCTL_SCGCI2C_S3
I2C Module 3 Sleep Mode Clock Gating Control
3
4
SYSCTL_SCGCI2C_S4
I2C Module 4 Sleep Mode Clock Gating Control
4
5
SYSCTL_SCGCI2C_S5
I2C Module 5 Sleep Mode Clock Gating Control
5
6
SCGCSSI
Synchronous Serial Interface Sleep Mode Clock Gating Control
0x71C
-1
read-write
n
0x0
0x0
SYSCTL_SCGCSSI_S0
SSI Module 0 Sleep Mode Clock Gating Control
0
1
SYSCTL_SCGCSSI_S1
SSI Module 1 Sleep Mode Clock Gating Control
1
2
SYSCTL_SCGCSSI_S2
SSI Module 2 Sleep Mode Clock Gating Control
2
3
SYSCTL_SCGCSSI_S3
SSI Module 3 Sleep Mode Clock Gating Control
3
4
SCGCTIMER
16/32-Bit General-Purpose Timer Sleep Mode Clock Gating Control
0x704
-1
read-write
n
0x0
0x0
SYSCTL_SCGCTIMER_S0
16/32-Bit General-Purpose Timer 0 Sleep Mode Clock Gating Control
0
1
SYSCTL_SCGCTIMER_S1
16/32-Bit General-Purpose Timer 1 Sleep Mode Clock Gating Control
1
2
SYSCTL_SCGCTIMER_S2
16/32-Bit General-Purpose Timer 2 Sleep Mode Clock Gating Control
2
3
SYSCTL_SCGCTIMER_S3
16/32-Bit General-Purpose Timer 3 Sleep Mode Clock Gating Control
3
4
SYSCTL_SCGCTIMER_S4
16/32-Bit General-Purpose Timer 4 Sleep Mode Clock Gating Control
4
5
SYSCTL_SCGCTIMER_S5
16/32-Bit General-Purpose Timer 5 Sleep Mode Clock Gating Control
5
6
SCGCUART
Universal Asynchronous Receiver/Transmitter Sleep Mode Clock Gating Control
0x718
-1
read-write
n
0x0
0x0
SYSCTL_SCGCUART_S0
UART Module 0 Sleep Mode Clock Gating Control
0
1
SYSCTL_SCGCUART_S1
UART Module 1 Sleep Mode Clock Gating Control
1
2
SYSCTL_SCGCUART_S2
UART Module 2 Sleep Mode Clock Gating Control
2
3
SYSCTL_SCGCUART_S3
UART Module 3 Sleep Mode Clock Gating Control
3
4
SYSCTL_SCGCUART_S4
UART Module 4 Sleep Mode Clock Gating Control
4
5
SYSCTL_SCGCUART_S5
UART Module 5 Sleep Mode Clock Gating Control
5
6
SYSCTL_SCGCUART_S6
UART Module 6 Sleep Mode Clock Gating Control
6
7
SYSCTL_SCGCUART_S7
UART Module 7 Sleep Mode Clock Gating Control
7
8
SCGCWD
Watchdog Timer Sleep Mode Clock Gating Control
0x700
-1
read-write
n
0x0
0x0
SYSCTL_SCGCWD_S0
Watchdog Timer 0 Sleep Mode Clock Gating Control
0
1
SYSCTL_SCGCWD_S1
Watchdog Timer 1 Sleep Mode Clock Gating Control
1
2
SCGCWTIMER
32/64-Bit Wide General-Purpose Timer Sleep Mode Clock Gating Control
0x75C
-1
read-write
n
0x0
0x0
SYSCTL_SCGCWTIMER_S0
32/64-Bit Wide General-Purpose Timer 0 Sleep Mode Clock Gating Control
0
1
SYSCTL_SCGCWTIMER_S1
32/64-Bit Wide General-Purpose Timer 1 Sleep Mode Clock Gating Control
1
2
SYSCTL_SCGCWTIMER_S2
32/64-Bit Wide General-Purpose Timer 2 Sleep Mode Clock Gating Control
2
3
SYSCTL_SCGCWTIMER_S3
32/64-Bit Wide General-Purpose Timer 3 Sleep Mode Clock Gating Control
3
4
SYSCTL_SCGCWTIMER_S4
32/64-Bit Wide General-Purpose Timer 4 Sleep Mode Clock Gating Control
4
5
SYSCTL_SCGCWTIMER_S5
32/64-Bit Wide General-Purpose Timer 5 Sleep Mode Clock Gating Control
5
6
SLPPWRCFG
Sleep Power Configuration
0x188
-1
read-write
n
0x0
0x0
SYSCTL_SLPPWRCFG_FLASHPM
Flash Power Modes
4
6
SYSCTL_SLPPWRCFG_FLASHPM_NRM
Active Mode
0x0
SYSCTL_SLPPWRCFG_FLASHPM_SLP
Low Power Mode
0x2
SYSCTL_SLPPWRCFG_SRAMPM
SRAM Power Modes
0
2
SYSCTL_SLPPWRCFG_SRAMPM_NRM
Active Mode
0x0
SYSCTL_SLPPWRCFG_SRAMPM_SBY
Standby Mode
0x1
SYSCTL_SLPPWRCFG_SRAMPM_LP
Low Power Mode
0x3
SRACMP
Analog Comparator Software Reset
0x53C
-1
read-write
n
0x0
0x0
SYSCTL_SRACMP_R0
Analog Comparator Module 0 Software Reset
0
1
SRADC
Analog-to-Digital Converter Software Reset
0x538
-1
read-write
n
0x0
0x0
SYSCTL_SRADC_R0
ADC Module 0 Software Reset
0
1
SYSCTL_SRADC_R1
ADC Module 1 Software Reset
1
2
SRCAN
Controller Area Network Software Reset
0x534
-1
read-write
n
0x0
0x0
SYSCTL_SRCAN_R0
CAN Module 0 Software Reset
0
1
SRCR0
Software Reset Control 0
0x40
-1
read-write
n
0x0
0x0
SYSCTL_SRCR0_ADC0
ADC0 Reset Control
16
17
SYSCTL_SRCR0_ADC1
ADC1 Reset Control
17
18
SYSCTL_SRCR0_CAN0
CAN0 Reset Control
24
25
SYSCTL_SRCR0_HIB
HIB Reset Control
6
7
SYSCTL_SRCR0_WDT0
WDT0 Reset Control
3
4
SYSCTL_SRCR0_WDT1
WDT1 Reset Control
28
29
SRCR1
Software Reset Control 1
0x44
-1
read-write
n
0x0
0x0
SYSCTL_SRCR1_COMP0
Analog Comp 0 Reset Control
24
25
SYSCTL_SRCR1_COMP1
Analog Comp 1 Reset Control
25
26
SYSCTL_SRCR1_COMP2
Analog Comp 2 Reset Control
26
27
SYSCTL_SRCR1_I2C0
I2C0 Reset Control
12
13
SYSCTL_SRCR1_I2C1
I2C1 Reset Control
14
15
SYSCTL_SRCR1_SSI0
SSI0 Reset Control
4
5
SYSCTL_SRCR1_SSI1
SSI1 Reset Control
5
6
SYSCTL_SRCR1_TIMER0
Timer 0 Reset Control
16
17
SYSCTL_SRCR1_TIMER1
Timer 1 Reset Control
17
18
SYSCTL_SRCR1_TIMER2
Timer 2 Reset Control
18
19
SYSCTL_SRCR1_TIMER3
Timer 3 Reset Control
19
20
SYSCTL_SRCR1_UART0
UART0 Reset Control
0
1
SYSCTL_SRCR1_UART1
UART1 Reset Control
1
2
SYSCTL_SRCR1_UART2
UART2 Reset Control
2
3
SRCR2
Software Reset Control 2
0x48
-1
read-write
n
0x0
0x0
SYSCTL_SRCR2_GPIOA
Port A Reset Control
0
1
SYSCTL_SRCR2_GPIOB
Port B Reset Control
1
2
SYSCTL_SRCR2_GPIOC
Port C Reset Control
2
3
SYSCTL_SRCR2_GPIOD
Port D Reset Control
3
4
SYSCTL_SRCR2_GPIOE
Port E Reset Control
4
5
SYSCTL_SRCR2_GPIOF
Port F Reset Control
5
6
SYSCTL_SRCR2_GPIOG
Port G Reset Control
6
7
SYSCTL_SRCR2_GPIOH
Port H Reset Control
7
8
SYSCTL_SRCR2_GPIOJ
Port J Reset Control
8
9
SYSCTL_SRCR2_UDMA
Micro-DMA Reset Control
13
14
SRDMA
Micro Direct Memory Access Software Reset
0x50C
-1
read-write
n
0x0
0x0
SYSCTL_SRDMA_R0
uDMA Module Software Reset
0
1
SREEPROM
EEPROM Software Reset
0x558
-1
read-write
n
0x0
0x0
SYSCTL_SREEPROM_R0
EEPROM Module Software Reset
0
1
SRGPIO
General-Purpose Input/Output Software Reset
0x508
-1
read-write
n
0x0
0x0
SYSCTL_SRGPIO_R0
GPIO Port A Software Reset
0
1
SYSCTL_SRGPIO_R1
GPIO Port B Software Reset
1
2
SYSCTL_SRGPIO_R2
GPIO Port C Software Reset
2
3
SYSCTL_SRGPIO_R3
GPIO Port D Software Reset
3
4
SYSCTL_SRGPIO_R4
GPIO Port E Software Reset
4
5
SYSCTL_SRGPIO_R5
GPIO Port F Software Reset
5
6
SYSCTL_SRGPIO_R6
GPIO Port G Software Reset
6
7
SYSCTL_SRGPIO_R7
GPIO Port H Software Reset
7
8
SYSCTL_SRGPIO_R8
GPIO Port J Software Reset
8
9
SYSCTL_SRGPIO_R9
GPIO Port K Software Reset
9
10
SRHIB
Hibernation Software Reset
0x514
-1
read-write
n
0x0
0x0
SYSCTL_SRHIB_R0
Hibernation Module Software Reset
0
1
SRI2C
Inter-Integrated Circuit Software Reset
0x520
-1
read-write
n
0x0
0x0
SYSCTL_SRI2C_R0
I2C Module 0 Software Reset
0
1
SYSCTL_SRI2C_R1
I2C Module 1 Software Reset
1
2
SYSCTL_SRI2C_R2
I2C Module 2 Software Reset
2
3
SYSCTL_SRI2C_R3
I2C Module 3 Software Reset
3
4
SYSCTL_SRI2C_R4
I2C Module 4 Software Reset
4
5
SYSCTL_SRI2C_R5
I2C Module 5 Software Reset
5
6
SRSSI
Synchronous Serial Interface Software Reset
0x51C
-1
read-write
n
0x0
0x0
SYSCTL_SRSSI_R0
SSI Module 0 Software Reset
0
1
SYSCTL_SRSSI_R1
SSI Module 1 Software Reset
1
2
SYSCTL_SRSSI_R2
SSI Module 2 Software Reset
2
3
SYSCTL_SRSSI_R3
SSI Module 3 Software Reset
3
4
SRTIMER
16/32-Bit General-Purpose Timer Software Reset
0x504
-1
read-write
n
0x0
0x0
SYSCTL_SRTIMER_R0
16/32-Bit General-Purpose Timer 0 Software Reset
0
1
SYSCTL_SRTIMER_R1
16/32-Bit General-Purpose Timer 1 Software Reset
1
2
SYSCTL_SRTIMER_R2
16/32-Bit General-Purpose Timer 2 Software Reset
2
3
SYSCTL_SRTIMER_R3
16/32-Bit General-Purpose Timer 3 Software Reset
3
4
SYSCTL_SRTIMER_R4
16/32-Bit General-Purpose Timer 4 Software Reset
4
5
SYSCTL_SRTIMER_R5
16/32-Bit General-Purpose Timer 5 Software Reset
5
6
SRUART
Universal Asynchronous Receiver/Transmitter Software Reset
0x518
-1
read-write
n
0x0
0x0
SYSCTL_SRUART_R0
UART Module 0 Software Reset
0
1
SYSCTL_SRUART_R1
UART Module 1 Software Reset
1
2
SYSCTL_SRUART_R2
UART Module 2 Software Reset
2
3
SYSCTL_SRUART_R3
UART Module 3 Software Reset
3
4
SYSCTL_SRUART_R4
UART Module 4 Software Reset
4
5
SYSCTL_SRUART_R5
UART Module 5 Software Reset
5
6
SYSCTL_SRUART_R6
UART Module 6 Software Reset
6
7
SYSCTL_SRUART_R7
UART Module 7 Software Reset
7
8
SRWD
Watchdog Timer Software Reset
0x500
-1
read-write
n
0x0
0x0
SYSCTL_SRWD_R0
Watchdog Timer 0 Software Reset
0
1
SYSCTL_SRWD_R1
Watchdog Timer 1 Software Reset
1
2
SRWTIMER
32/64-Bit Wide General-Purpose Timer Software Reset
0x55C
-1
read-write
n
0x0
0x0
SYSCTL_SRWTIMER_R0
32/64-Bit Wide General-Purpose Timer 0 Software Reset
0
1
SYSCTL_SRWTIMER_R1
32/64-Bit Wide General-Purpose Timer 1 Software Reset
1
2
SYSCTL_SRWTIMER_R2
32/64-Bit Wide General-Purpose Timer 2 Software Reset
2
3
SYSCTL_SRWTIMER_R3
32/64-Bit Wide General-Purpose Timer 3 Software Reset
3
4
SYSCTL_SRWTIMER_R4
32/64-Bit Wide General-Purpose Timer 4 Software Reset
4
5
SYSCTL_SRWTIMER_R5
32/64-Bit Wide General-Purpose Timer 5 Software Reset
5
6
SYSCTLDC0
Device Capabilities 0
0x8
read-write
n
0x0
0x0
SYSCTL_DC0_FLASHSZ
Flash Size
0
16
SYSCTL_DC0_FLASHSZ_64KB
64 KB of Flash
0x1f
SYSCTL_DC0_FLASHSZ_96KB
96 KB of Flash
0x2f
SYSCTL_DC0_FLASHSZ_8KB
8 KB of Flash
0x3
SYSCTL_DC0_FLASHSZ_128K
128 KB of Flash
0x3f
SYSCTL_DC0_FLASHSZ_192K
192 KB of Flash
0x5f
SYSCTL_DC0_FLASHSZ_16KB
16 KB of Flash
0x7
SYSCTL_DC0_FLASHSZ_256K
256 KB of Flash
0x7f
SYSCTL_DC0_FLASHSZ_32KB
32 KB of Flash
0xf
SYSCTL_DC0_SRAMSZ
SRAM Size
16
32
SYSCTL_DC0_SRAMSZ_6KB
6 KB of SRAM
0x17
SYSCTL_DC0_SRAMSZ_8KB
8 KB of SRAM
0x1f
SYSCTL_DC0_SRAMSZ_12KB
12 KB of SRAM
0x2f
SYSCTL_DC0_SRAMSZ_16KB
16 KB of SRAM
0x3f
SYSCTL_DC0_SRAMSZ_20KB
20 KB of SRAM
0x4f
SYSCTL_DC0_SRAMSZ_24KB
24 KB of SRAM
0x5f
SYSCTL_DC0_SRAMSZ_2KB
2 KB of SRAM
0x7
SYSCTL_DC0_SRAMSZ_32KB
32 KB of SRAM
0x7f
SYSCTL_DC0_SRAMSZ_4KB
4 KB of SRAM
0xf
SYSCTLDC1
Device Capabilities 1
0x10
read-write
n
0x0
0x0
SYSCTL_DC1_ADC0
ADC Module 0 Present
16
17
SYSCTL_DC1_ADC0SPD
Max ADC0 Speed
8
10
SYSCTL_DC1_ADC0SPD_125K
125K samples/second
0x0
SYSCTL_DC1_ADC0SPD_250K
250K samples/second
0x1
SYSCTL_DC1_ADC0SPD_500K
500K samples/second
0x2
SYSCTL_DC1_ADC0SPD_1M
1M samples/second
0x3
SYSCTL_DC1_ADC1
ADC Module 1 Present
17
18
SYSCTL_DC1_ADC1SPD
Max ADC1 Speed
10
12
SYSCTL_DC1_ADC1SPD_125K
125K samples/second
0x0
SYSCTL_DC1_ADC1SPD_250K
250K samples/second
0x1
SYSCTL_DC1_ADC1SPD_500K
500K samples/second
0x2
SYSCTL_DC1_ADC1SPD_1M
1M samples/second
0x3
SYSCTL_DC1_CAN0
CAN Module 0 Present
24
25
SYSCTL_DC1_CAN1
CAN Module 1 Present
25
26
SYSCTL_DC1_HIB
Hibernation Module Present
6
7
SYSCTL_DC1_JTAG
JTAG Present
0
1
SYSCTL_DC1_MINSYSDIV
System Clock Divider
12
16
SYSCTL_DC1_MINSYSDIV_100
Divide VCO (400MHZ) by 5 minimum
0x1
SYSCTL_DC1_MINSYSDIV_80
Specifies an 80-MHz CPU clock with a PLL divider of 2.5
0x1
SYSCTL_DC1_MINSYSDIV_66
Specifies a 66-MHz CPU clock with a PLL divider of 3
0x2
SYSCTL_DC1_MINSYSDIV_50
Specifies a 50-MHz CPU clock with a PLL divider of 4
0x3
SYSCTL_DC1_MINSYSDIV_40
Specifies a 40-MHz CPU clock with a PLL divider of 5
0x4
SYSCTL_DC1_MINSYSDIV_25
Specifies a 25-MHz clock with a PLL divider of 8
0x7
SYSCTL_DC1_MINSYSDIV_20
Specifies a 20-MHz clock with a PLL divider of 10
0x9
SYSCTL_DC1_MPU
MPU Present
7
8
SYSCTL_DC1_PLL
PLL Present
4
5
SYSCTL_DC1_PWM0
PWM Module 0 Present
20
21
SYSCTL_DC1_PWM1
PWM Module 1 Present
21
22
SYSCTL_DC1_SWD
SWD Present
1
2
SYSCTL_DC1_SWO
SWO Trace Port Present
2
3
SYSCTL_DC1_TEMP
Temp Sensor Present
5
6
SYSCTL_DC1_WDT0
Watchdog Timer 0 Present
3
4
SYSCTL_DC1_WDT1
Watchdog Timer1 Present
28
29
SYSCTLDC2
Device Capabilities 2
0x14
read-write
n
0x0
0x0
SYSCTL_DC2_COMP0
Analog Comparator 0 Present
24
25
SYSCTL_DC2_COMP1
Analog Comparator 1 Present
25
26
SYSCTL_DC2_COMP2
Analog Comparator 2 Present
26
27
SYSCTL_DC2_EPI0
EPI Module 0 Present
30
31
SYSCTL_DC2_I2C0
I2C Module 0 Present
12
13
SYSCTL_DC2_I2C0HS
I2C Module 0 Speed
13
14
SYSCTL_DC2_I2C1
I2C Module 1 Present
14
15
SYSCTL_DC2_I2C1HS
I2C Module 1 Speed
15
16
SYSCTL_DC2_I2S0
I2S Module 0 Present
28
29
SYSCTL_DC2_QEI0
QEI Module 0 Present
8
9
SYSCTL_DC2_QEI1
QEI Module 1 Present
9
10
SYSCTL_DC2_SSI0
SSI Module 0 Present
4
5
SYSCTL_DC2_SSI1
SSI Module 1 Present
5
6
SYSCTL_DC2_TIMER0
Timer Module 0 Present
16
17
SYSCTL_DC2_TIMER1
Timer Module 1 Present
17
18
SYSCTL_DC2_TIMER2
Timer Module 2 Present
18
19
SYSCTL_DC2_TIMER3
Timer Module 3 Present
19
20
SYSCTL_DC2_UART0
UART Module 0 Present
0
1
SYSCTL_DC2_UART1
UART Module 1 Present
1
2
SYSCTL_DC2_UART2
UART Module 2 Present
2
3
SYSCTLDC3
Device Capabilities 3
0x18
read-write
n
0x0
0x0
SYSCTL_DC3_32KHZ
32KHz Input Clock Available
31
32
SYSCTL_DC3_ADC0AIN0
ADC Module 0 AIN0 Pin Present
16
17
SYSCTL_DC3_ADC0AIN1
ADC Module 0 AIN1 Pin Present
17
18
SYSCTL_DC3_ADC0AIN2
ADC Module 0 AIN2 Pin Present
18
19
SYSCTL_DC3_ADC0AIN3
ADC Module 0 AIN3 Pin Present
19
20
SYSCTL_DC3_ADC0AIN4
ADC Module 0 AIN4 Pin Present
20
21
SYSCTL_DC3_ADC0AIN5
ADC Module 0 AIN5 Pin Present
21
22
SYSCTL_DC3_ADC0AIN6
ADC Module 0 AIN6 Pin Present
22
23
SYSCTL_DC3_ADC0AIN7
ADC Module 0 AIN7 Pin Present
23
24
SYSCTL_DC3_C0MINUS
C0- Pin Present
6
7
SYSCTL_DC3_C0O
C0o Pin Present
8
9
SYSCTL_DC3_C0PLUS
C0+ Pin Present
7
8
SYSCTL_DC3_C1MINUS
C1- Pin Present
9
10
SYSCTL_DC3_C1O
C1o Pin Present
11
12
SYSCTL_DC3_C1PLUS
C1+ Pin Present
10
11
SYSCTL_DC3_C2MINUS
C2- Pin Present
12
13
SYSCTL_DC3_C2O
C2o Pin Present
14
15
SYSCTL_DC3_C2PLUS
C2+ Pin Present
13
14
SYSCTL_DC3_CCP0
T0CCP0 Pin Present
24
25
SYSCTL_DC3_CCP1
T0CCP1 Pin Present
25
26
SYSCTL_DC3_CCP2
T1CCP0 Pin Present
26
27
SYSCTL_DC3_CCP3
T1CCP1 Pin Present
27
28
SYSCTL_DC3_CCP4
T2CCP0 Pin Present
28
29
SYSCTL_DC3_CCP5
T2CCP1 Pin Present
29
30
SYSCTL_DC3_PWM0
PWM0 Pin Present
0
1
SYSCTL_DC3_PWM1
PWM1 Pin Present
1
2
SYSCTL_DC3_PWM2
PWM2 Pin Present
2
3
SYSCTL_DC3_PWM3
PWM3 Pin Present
3
4
SYSCTL_DC3_PWM4
PWM4 Pin Present
4
5
SYSCTL_DC3_PWM5
PWM5 Pin Present
5
6
SYSCTL_DC3_PWMFAULT
PWM Fault Pin Present
15
16
SYSCTLDC4
Device Capabilities 4
0x1C
read-write
n
0x0
0x0
SYSCTL_DC4_CCP6
T3CCP0 Pin Present
14
15
SYSCTL_DC4_CCP7
T3CCP1 Pin Present
15
16
SYSCTL_DC4_E1588
1588 Capable
24
25
SYSCTL_DC4_EMAC0
Ethernet MAC Layer 0 Present
28
29
SYSCTL_DC4_EPHY0
Ethernet PHY Layer 0 Present
30
31
SYSCTL_DC4_GPIOA
GPIO Port A Present
0
1
SYSCTL_DC4_GPIOB
GPIO Port B Present
1
2
SYSCTL_DC4_GPIOC
GPIO Port C Present
2
3
SYSCTL_DC4_GPIOD
GPIO Port D Present
3
4
SYSCTL_DC4_GPIOE
GPIO Port E Present
4
5
SYSCTL_DC4_GPIOF
GPIO Port F Present
5
6
SYSCTL_DC4_GPIOG
GPIO Port G Present
6
7
SYSCTL_DC4_GPIOH
GPIO Port H Present
7
8
SYSCTL_DC4_GPIOJ
GPIO Port J Present
8
9
SYSCTL_DC4_PICAL
PIOSC Calibrate
18
19
SYSCTL_DC4_ROM
Internal Code ROM Present
12
13
SYSCTL_DC4_UDMA
Micro-DMA Module Present
13
14
SYSCTLDC5
Device Capabilities 5
0x20
read-write
n
0x0
0x0
SYSCTL_DC5_PWM0
PWM0 Pin Present
0
1
SYSCTL_DC5_PWM1
PWM1 Pin Present
1
2
SYSCTL_DC5_PWM2
PWM2 Pin Present
2
3
SYSCTL_DC5_PWM3
PWM3 Pin Present
3
4
SYSCTL_DC5_PWM4
PWM4 Pin Present
4
5
SYSCTL_DC5_PWM5
PWM5 Pin Present
5
6
SYSCTL_DC5_PWM6
PWM6 Pin Present
6
7
SYSCTL_DC5_PWM7
PWM7 Pin Present
7
8
SYSCTL_DC5_PWMEFLT
PWM Extended Fault Active
21
22
SYSCTL_DC5_PWMESYNC
PWM Extended SYNC Active
20
21
SYSCTL_DC5_PWMFAULT0
PWM Fault 0 Pin Present
24
25
SYSCTL_DC5_PWMFAULT1
PWM Fault 1 Pin Present
25
26
SYSCTL_DC5_PWMFAULT2
PWM Fault 2 Pin Present
26
27
SYSCTL_DC5_PWMFAULT3
PWM Fault 3 Pin Present
27
28
SYSCTLDC6
Device Capabilities 6
0x24
read-write
n
0x0
0x0
SYSCTL_DC6_USB0
USB Module 0 Present
0
2
SYSCTL_DC6_USB0_DEV
USB0 is Device Only
0x1
SYSCTL_DC6_USB0_HOSTDEV
USB is Device or Host
0x2
SYSCTL_DC6_USB0_OTG
USB0 is OTG
0x3
SYSCTL_DC6_USB0PHY
USB Module 0 PHY Present
4
5
SYSCTLDC7
Device Capabilities 7
0x28
read-write
n
0x0
0x0
SYSCTL_DC7_DMACH0
DMA Channel 0
0
1
SYSCTL_DC7_DMACH1
DMA Channel 1
1
2
SYSCTL_DC7_DMACH10
DMA Channel 10
10
11
SYSCTL_DC7_DMACH11
DMA Channel 11
11
12
SYSCTL_DC7_DMACH12
DMA Channel 12
12
13
SYSCTL_DC7_DMACH13
DMA Channel 13
13
14
SYSCTL_DC7_DMACH14
DMA Channel 14
14
15
SYSCTL_DC7_DMACH15
DMA Channel 15
15
16
SYSCTL_DC7_DMACH16
DMA Channel 16
16
17
SYSCTL_DC7_DMACH17
DMA Channel 17
17
18
SYSCTL_DC7_DMACH18
DMA Channel 18
18
19
SYSCTL_DC7_DMACH19
DMA Channel 19
19
20
SYSCTL_DC7_DMACH2
DMA Channel 2
2
3
SYSCTL_DC7_DMACH20
DMA Channel 20
20
21
SYSCTL_DC7_DMACH21
DMA Channel 21
21
22
SYSCTL_DC7_DMACH22
DMA Channel 22
22
23
SYSCTL_DC7_DMACH23
DMA Channel 23
23
24
SYSCTL_DC7_DMACH24
DMA Channel 24
24
25
SYSCTL_DC7_DMACH25
DMA Channel 25
25
26
SYSCTL_DC7_DMACH26
DMA Channel 26
26
27
SYSCTL_DC7_DMACH27
DMA Channel 27
27
28
SYSCTL_DC7_DMACH28
DMA Channel 28
28
29
SYSCTL_DC7_DMACH29
DMA Channel 29
29
30
SYSCTL_DC7_DMACH3
DMA Channel 3
3
4
SYSCTL_DC7_DMACH30
DMA Channel 30
30
31
SYSCTL_DC7_DMACH4
DMA Channel 4
4
5
SYSCTL_DC7_DMACH5
DMA Channel 5
5
6
SYSCTL_DC7_DMACH6
DMA Channel 6
6
7
SYSCTL_DC7_DMACH7
DMA Channel 7
7
8
SYSCTL_DC7_DMACH8
DMA Channel 8
8
9
SYSCTL_DC7_DMACH9
DMA Channel 9
9
10
SYSCTLDC8
Device Capabilities 8
0x2C
read-write
n
0x0
0x0
SYSCTL_DC8_ADC0AIN0
ADC Module 0 AIN0 Pin Present
0
1
SYSCTL_DC8_ADC0AIN1
ADC Module 0 AIN1 Pin Present
1
2
SYSCTL_DC8_ADC0AIN10
ADC Module 0 AIN10 Pin Present
10
11
SYSCTL_DC8_ADC0AIN11
ADC Module 0 AIN11 Pin Present
11
12
SYSCTL_DC8_ADC0AIN12
ADC Module 0 AIN12 Pin Present
12
13
SYSCTL_DC8_ADC0AIN13
ADC Module 0 AIN13 Pin Present
13
14
SYSCTL_DC8_ADC0AIN14
ADC Module 0 AIN14 Pin Present
14
15
SYSCTL_DC8_ADC0AIN15
ADC Module 0 AIN15 Pin Present
15
16
SYSCTL_DC8_ADC0AIN2
ADC Module 0 AIN2 Pin Present
2
3
SYSCTL_DC8_ADC0AIN3
ADC Module 0 AIN3 Pin Present
3
4
SYSCTL_DC8_ADC0AIN4
ADC Module 0 AIN4 Pin Present
4
5
SYSCTL_DC8_ADC0AIN5
ADC Module 0 AIN5 Pin Present
5
6
SYSCTL_DC8_ADC0AIN6
ADC Module 0 AIN6 Pin Present
6
7
SYSCTL_DC8_ADC0AIN7
ADC Module 0 AIN7 Pin Present
7
8
SYSCTL_DC8_ADC0AIN8
ADC Module 0 AIN8 Pin Present
8
9
SYSCTL_DC8_ADC0AIN9
ADC Module 0 AIN9 Pin Present
9
10
SYSCTL_DC8_ADC1AIN0
ADC Module 1 AIN0 Pin Present
16
17
SYSCTL_DC8_ADC1AIN1
ADC Module 1 AIN1 Pin Present
17
18
SYSCTL_DC8_ADC1AIN10
ADC Module 1 AIN10 Pin Present
26
27
SYSCTL_DC8_ADC1AIN11
ADC Module 1 AIN11 Pin Present
27
28
SYSCTL_DC8_ADC1AIN12
ADC Module 1 AIN12 Pin Present
28
29
SYSCTL_DC8_ADC1AIN13
ADC Module 1 AIN13 Pin Present
29
30
SYSCTL_DC8_ADC1AIN14
ADC Module 1 AIN14 Pin Present
30
31
SYSCTL_DC8_ADC1AIN15
ADC Module 1 AIN15 Pin Present
31
32
SYSCTL_DC8_ADC1AIN2
ADC Module 1 AIN2 Pin Present
18
19
SYSCTL_DC8_ADC1AIN3
ADC Module 1 AIN3 Pin Present
19
20
SYSCTL_DC8_ADC1AIN4
ADC Module 1 AIN4 Pin Present
20
21
SYSCTL_DC8_ADC1AIN5
ADC Module 1 AIN5 Pin Present
21
22
SYSCTL_DC8_ADC1AIN6
ADC Module 1 AIN6 Pin Present
22
23
SYSCTL_DC8_ADC1AIN7
ADC Module 1 AIN7 Pin Present
23
24
SYSCTL_DC8_ADC1AIN8
ADC Module 1 AIN8 Pin Present
24
25
SYSCTL_DC8_ADC1AIN9
ADC Module 1 AIN9 Pin Present
25
26
SYSCTLDC9
Device Capabilities 9
0x190
read-write
n
0x0
0x0
SYSCTL_DC9_ADC0DC0
ADC0 DC0 Present
0
1
SYSCTL_DC9_ADC0DC1
ADC0 DC1 Present
1
2
SYSCTL_DC9_ADC0DC2
ADC0 DC2 Present
2
3
SYSCTL_DC9_ADC0DC3
ADC0 DC3 Present
3
4
SYSCTL_DC9_ADC0DC4
ADC0 DC4 Present
4
5
SYSCTL_DC9_ADC0DC5
ADC0 DC5 Present
5
6
SYSCTL_DC9_ADC0DC6
ADC0 DC6 Present
6
7
SYSCTL_DC9_ADC0DC7
ADC0 DC7 Present
7
8
SYSCTL_DC9_ADC1DC0
ADC1 DC0 Present
16
17
SYSCTL_DC9_ADC1DC1
ADC1 DC1 Present
17
18
SYSCTL_DC9_ADC1DC2
ADC1 DC2 Present
18
19
SYSCTL_DC9_ADC1DC3
ADC1 DC3 Present
19
20
SYSCTL_DC9_ADC1DC4
ADC1 DC4 Present
20
21
SYSCTL_DC9_ADC1DC5
ADC1 DC5 Present
21
22
SYSCTL_DC9_ADC1DC6
ADC1 DC6 Present
22
23
SYSCTL_DC9_ADC1DC7
ADC1 DC7 Present
23
24
SYSCTLDCGC0
Deep Sleep Mode Clock Gating Control Register 0
0x120
read-write
n
0x0
0x0
SYSCTL_DCGC0_ADC0
ADC0 Clock Gating Control
16
17
SYSCTL_DCGC0_ADC1
ADC1 Clock Gating Control
17
18
SYSCTL_DCGC0_CAN0
CAN0 Clock Gating Control
24
25
SYSCTL_DCGC0_HIB
HIB Clock Gating Control
6
7
SYSCTL_DCGC0_WDT0
WDT0 Clock Gating Control
3
4
SYSCTL_DCGC0_WDT1
WDT1 Clock Gating Control
28
29
SYSCTLDCGC1
Deep-Sleep Mode Clock Gating Control Register 1
0x124
read-write
n
0x0
0x0
SYSCTL_DCGC1_COMP0
Analog Comparator 0 Clock Gating
24
25
SYSCTL_DCGC1_COMP1
Analog Comparator 1 Clock Gating
25
26
SYSCTL_DCGC1_COMP2
Analog Comparator 2 Clock Gating
26
27
SYSCTL_DCGC1_I2C0
I2C0 Clock Gating Control
12
13
SYSCTL_DCGC1_I2C1
I2C1 Clock Gating Control
14
15
SYSCTL_DCGC1_SSI0
SSI0 Clock Gating Control
4
5
SYSCTL_DCGC1_SSI1
SSI1 Clock Gating Control
5
6
SYSCTL_DCGC1_TIMER0
Timer 0 Clock Gating Control
16
17
SYSCTL_DCGC1_TIMER1
Timer 1 Clock Gating Control
17
18
SYSCTL_DCGC1_TIMER2
Timer 2 Clock Gating Control
18
19
SYSCTL_DCGC1_TIMER3
Timer 3 Clock Gating Control
19
20
SYSCTL_DCGC1_UART0
UART0 Clock Gating Control
0
1
SYSCTL_DCGC1_UART1
UART1 Clock Gating Control
1
2
SYSCTL_DCGC1_UART2
UART2 Clock Gating Control
2
3
SYSCTLDCGC2
Deep Sleep Mode Clock Gating Control Register 2
0x128
read-write
n
0x0
0x0
SYSCTL_DCGC2_GPIOA
Port A Clock Gating Control
0
1
SYSCTL_DCGC2_GPIOB
Port B Clock Gating Control
1
2
SYSCTL_DCGC2_GPIOC
Port C Clock Gating Control
2
3
SYSCTL_DCGC2_GPIOD
Port D Clock Gating Control
3
4
SYSCTL_DCGC2_GPIOE
Port E Clock Gating Control
4
5
SYSCTL_DCGC2_GPIOF
Port F Clock Gating Control
5
6
SYSCTL_DCGC2_GPIOG
Port G Clock Gating Control
6
7
SYSCTL_DCGC2_GPIOH
Port H Clock Gating Control
7
8
SYSCTL_DCGC2_GPIOJ
Port J Clock Gating Control
8
9
SYSCTL_DCGC2_UDMA
Micro-DMA Clock Gating Control
13
14
SYSCTLDCGCACMP
Analog Comparator Deep-Sleep Mode Clock Gating Control
0x83C
read-write
n
0x0
0x0
SYSCTL_DCGCACMP_D0
Analog Comparator Module 0 Deep-Sleep Mode Clock Gating Control
0
1
SYSCTLDCGCADC
Analog-to-Digital Converter Deep-Sleep Mode Clock Gating Control
0x838
read-write
n
0x0
0x0
SYSCTL_DCGCADC_D0
ADC Module 0 Deep-Sleep Mode Clock Gating Control
0
1
SYSCTL_DCGCADC_D1
ADC Module 1 Deep-Sleep Mode Clock Gating Control
1
2
SYSCTLDCGCCAN
Controller Area Network Deep-Sleep Mode Clock Gating Control
0x834
read-write
n
0x0
0x0
SYSCTL_DCGCCAN_D0
CAN Module 0 Deep-Sleep Mode Clock Gating Control
0
1
SYSCTLDCGCDMA
Micro Direct Memory Access Deep-Sleep Mode Clock Gating Control
0x80C
read-write
n
0x0
0x0
SYSCTL_DCGCDMA_D0
uDMA Module Deep-Sleep Mode Clock Gating Control
0
1
SYSCTLDCGCEEPROM
EEPROM Deep-Sleep Mode Clock Gating Control
0x858
read-write
n
0x0
0x0
SYSCTL_DCGCEEPROM_D0
EEPROM Module Deep-Sleep Mode Clock Gating Control
0
1
SYSCTLDCGCGPIO
General-Purpose Input/Output Deep-Sleep Mode Clock Gating Control
0x808
read-write
n
0x0
0x0
SYSCTL_DCGCGPIO_D0
GPIO Port A Deep-Sleep Mode Clock Gating Control
0
1
SYSCTL_DCGCGPIO_D1
GPIO Port B Deep-Sleep Mode Clock Gating Control
1
2
SYSCTL_DCGCGPIO_D2
GPIO Port C Deep-Sleep Mode Clock Gating Control
2
3
SYSCTL_DCGCGPIO_D3
GPIO Port D Deep-Sleep Mode Clock Gating Control
3
4
SYSCTL_DCGCGPIO_D4
GPIO Port E Deep-Sleep Mode Clock Gating Control
4
5
SYSCTL_DCGCGPIO_D5
GPIO Port F Deep-Sleep Mode Clock Gating Control
5
6
SYSCTL_DCGCGPIO_D6
GPIO Port G Deep-Sleep Mode Clock Gating Control
6
7
SYSCTL_DCGCGPIO_D7
GPIO Port H Deep-Sleep Mode Clock Gating Control
7
8
SYSCTL_DCGCGPIO_D8
GPIO Port J Deep-Sleep Mode Clock Gating Control
8
9
SYSCTL_DCGCGPIO_D9
GPIO Port K Deep-Sleep Mode Clock Gating Control
9
10
SYSCTLDCGCHIB
Hibernation Deep-Sleep Mode Clock Gating Control
0x814
read-write
n
0x0
0x0
SYSCTL_DCGCHIB_D0
Hibernation Module Deep-Sleep Mode Clock Gating Control
0
1
SYSCTLDCGCI2C
Inter-Integrated Circuit Deep-Sleep Mode Clock Gating Control
0x820
read-write
n
0x0
0x0
SYSCTL_DCGCI2C_D0
I2C Module 0 Deep-Sleep Mode Clock Gating Control
0
1
SYSCTL_DCGCI2C_D1
I2C Module 1 Deep-Sleep Mode Clock Gating Control
1
2
SYSCTL_DCGCI2C_D2
I2C Module 2 Deep-Sleep Mode Clock Gating Control
2
3
SYSCTL_DCGCI2C_D3
I2C Module 3 Deep-Sleep Mode Clock Gating Control
3
4
SYSCTL_DCGCI2C_D4
I2C Module 4 Deep-Sleep Mode Clock Gating Control
4
5
SYSCTL_DCGCI2C_D5
I2C Module 5 Deep-Sleep Mode Clock Gating Control
5
6
SYSCTLDCGCSSI
Synchronous Serial Interface Deep-Sleep Mode Clock Gating Control
0x81C
read-write
n
0x0
0x0
SYSCTL_DCGCSSI_D0
SSI Module 0 Deep-Sleep Mode Clock Gating Control
0
1
SYSCTL_DCGCSSI_D1
SSI Module 1 Deep-Sleep Mode Clock Gating Control
1
2
SYSCTL_DCGCSSI_D2
SSI Module 2 Deep-Sleep Mode Clock Gating Control
2
3
SYSCTL_DCGCSSI_D3
SSI Module 3 Deep-Sleep Mode Clock Gating Control
3
4
SYSCTLDCGCTIMER
16/32-Bit General-Purpose Timer Deep-Sleep Mode Clock Gating Control
0x804
read-write
n
0x0
0x0
SYSCTL_DCGCTIMER_D0
16/32-Bit General-Purpose Timer 0 Deep-Sleep Mode Clock Gating Control
0
1
SYSCTL_DCGCTIMER_D1
16/32-Bit General-Purpose Timer 1 Deep-Sleep Mode Clock Gating Control
1
2
SYSCTL_DCGCTIMER_D2
16/32-Bit General-Purpose Timer 2 Deep-Sleep Mode Clock Gating Control
2
3
SYSCTL_DCGCTIMER_D3
16/32-Bit General-Purpose Timer 3 Deep-Sleep Mode Clock Gating Control
3
4
SYSCTL_DCGCTIMER_D4
16/32-Bit General-Purpose Timer 4 Deep-Sleep Mode Clock Gating Control
4
5
SYSCTL_DCGCTIMER_D5
16/32-Bit General-Purpose Timer 5 Deep-Sleep Mode Clock Gating Control
5
6
SYSCTLDCGCUART
Universal Asynchronous Receiver/Transmitter Deep-Sleep Mode Clock Gating Control
0x818
read-write
n
0x0
0x0
SYSCTL_DCGCUART_D0
UART Module 0 Deep-Sleep Mode Clock Gating Control
0
1
SYSCTL_DCGCUART_D1
UART Module 1 Deep-Sleep Mode Clock Gating Control
1
2
SYSCTL_DCGCUART_D2
UART Module 2 Deep-Sleep Mode Clock Gating Control
2
3
SYSCTL_DCGCUART_D3
UART Module 3 Deep-Sleep Mode Clock Gating Control
3
4
SYSCTL_DCGCUART_D4
UART Module 4 Deep-Sleep Mode Clock Gating Control
4
5
SYSCTL_DCGCUART_D5
UART Module 5 Deep-Sleep Mode Clock Gating Control
5
6
SYSCTL_DCGCUART_D6
UART Module 6 Deep-Sleep Mode Clock Gating Control
6
7
SYSCTL_DCGCUART_D7
UART Module 7 Deep-Sleep Mode Clock Gating Control
7
8
SYSCTLDCGCWD
Watchdog Timer Deep-Sleep Mode Clock Gating Control
0x800
read-write
n
0x0
0x0
SYSCTL_DCGCWD_D0
Watchdog Timer 0 Deep-Sleep Mode Clock Gating Control
0
1
SYSCTL_DCGCWD_D1
Watchdog Timer 1 Deep-Sleep Mode Clock Gating Control
1
2
SYSCTLDCGCWTIMER
32/64-Bit Wide General-Purpose Timer Deep-Sleep Mode Clock Gating Control
0x85C
read-write
n
0x0
0x0
SYSCTL_DCGCWTIMER_D0
32/64-Bit Wide General-Purpose Timer 0 Deep-Sleep Mode Clock Gating Control
0
1
SYSCTL_DCGCWTIMER_D1
32/64-Bit Wide General-Purpose Timer 1 Deep-Sleep Mode Clock Gating Control
1
2
SYSCTL_DCGCWTIMER_D2
32/64-Bit Wide General-Purpose Timer 2 Deep-Sleep Mode Clock Gating Control
2
3
SYSCTL_DCGCWTIMER_D3
32/64-Bit Wide General-Purpose Timer 3 Deep-Sleep Mode Clock Gating Control
3
4
SYSCTL_DCGCWTIMER_D4
32/64-Bit Wide General-Purpose Timer 4 Deep-Sleep Mode Clock Gating Control
4
5
SYSCTL_DCGCWTIMER_D5
32/64-Bit Wide General-Purpose Timer 5 Deep-Sleep Mode Clock Gating Control
5
6
SYSCTLDID0
Device Identification 0
0x0
read-write
n
0x0
0x0
SYSCTL_DID0_CLASS
Device Class
16
24
SYSCTL_DID0_CLASS_BLIZZARD
Tiva(TM) C Series Blizzard-class microcontrollers
0x5
SYSCTL_DID0_CLASS_TM4C123
Tiva TM4C123x and TM4E123x microcontrollers
0x5
SYSCTL_DID0_MAJ
Major Revision
8
16
SYSCTL_DID0_MAJ_REVA
Revision A (initial device)
0x0
SYSCTL_DID0_MAJ_REVB
Revision B (first base layer revision)
0x1
SYSCTL_DID0_MAJ_REVC
Revision C (second base layer revision)
0x2
SYSCTL_DID0_MIN
Minor Revision
0
8
SYSCTL_DID0_MIN_0
Initial device, or a major revision update
0x0
SYSCTL_DID0_MIN_1
First metal layer change
0x1
SYSCTL_DID0_MIN_2
Second metal layer change
0x2
SYSCTL_DID0_VER
DID0 Version
28
31
SYSCTL_DID0_VER_1
Second version of the DID0 register format.
0x1
SYSCTLDID1
Device Identification 1
0x4
read-write
n
0x0
0x0
SYSCTL_DID1_FAM
Family
24
28
SYSCTL_DID1_PINCNT
Package Pin Count
13
16
SYSCTL_DID1_PINCNT_28
28-pin package
0x0
SYSCTL_DID1_PINCNT_48
48-pin package
0x1
SYSCTL_DID1_PINCNT_100
100-pin LQFP package
0x2
SYSCTL_DID1_PINCNT_64
64-pin LQFP package
0x3
SYSCTL_DID1_PINCNT_144
144-pin LQFP package
0x4
SYSCTL_DID1_PINCNT_157
157-pin BGA package
0x5
SYSCTL_DID1_PINCNT_128
128-pin TQFP package
0x6
SYSCTL_DID1_PKG
Package Type
3
5
SYSCTL_DID1_PKG_SOIC
SOIC package
0x0
SYSCTL_DID1_PKG_QFP
QFP package
0x1
SYSCTL_DID1_PKG_BGA
BGA package
0x2
SYSCTL_DID1_PRTNO
Part Number
16
24
SYSCTL_DID1_QUAL
Qualification Status
0
2
SYSCTL_DID1_QUAL_ES
Engineering Sample (unqualified)
0x0
SYSCTL_DID1_QUAL_PP
Pilot Production (unqualified)
0x1
SYSCTL_DID1_QUAL_FQ
Fully Qualified
0x2
SYSCTL_DID1_ROHS
RoHS-Compliance
2
3
SYSCTL_DID1_TEMP
Temperature Range
5
8
SYSCTL_DID1_TEMP_C
Commercial temperature range (0C to 70C)
0x0
SYSCTL_DID1_TEMP_I
Industrial temperature range
0x1
SYSCTL_DID1_TEMP_E
Extended temperature range
0x2
SYSCTL_DID1_TEMP_IE
Available in both industrial temperature range (-40C to 85C) and extended temperature range (-40C to 105C) devices. See
0x3
SYSCTL_DID1_VER
DID1 Version
28
32
SYSCTLDSLPCLKCFG
Deep Sleep Clock Configuration
0x144
read-write
n
0x0
0x0
SYSCTL_DSLPCLKCFG_D
Divider Field Override
23
29
SYSCTL_DSLPCLKCFG_O
Clock Source
4
7
SYSCTL_DSLPCLKCFG_O_IGN
MOSC
0x0
SYSCTL_DSLPCLKCFG_O_IO
PIOSC
0x1
SYSCTL_DSLPCLKCFG_O_30
LFIOSC
0x3
SYSCTL_DSLPCLKCFG_O_32
32.768 kHz
0x7
SYSCTL_DSLPCLKCFG_PIOSCPD
PIOSC Power Down Request
1
2
SYSCTLDSLPPWRCFG
Deep-Sleep Power Configuration
0x18C
read-write
n
0x0
0x0
SYSCTL_DSLPPWRCFG_FLASHPM
Flash Power Modes
4
6
SYSCTL_DSLPPWRCFG_FLASHPM_NRM
Active Mode
0x0
SYSCTL_DSLPPWRCFG_FLASHPM_SLP
Low Power Mode
0x2
SYSCTL_DSLPPWRCFG_SRAMPM
SRAM Power Modes
0
2
SYSCTL_DSLPPWRCFG_SRAMPM_NRM
Active Mode
0x0
SYSCTL_DSLPPWRCFG_SRAMPM_SBY
Standby Mode
0x1
SYSCTL_DSLPPWRCFG_SRAMPM_LP
Low Power Mode
0x3
SYSCTLGPIOHBCTL
GPIO High-Performance Bus Control
0x6C
read-write
n
0x0
0x0
SYSCTL_GPIOHBCTL_PORTA
Port A Advanced High-Performance Bus
0
1
SYSCTL_GPIOHBCTL_PORTB
Port B Advanced High-Performance Bus
1
2
SYSCTL_GPIOHBCTL_PORTC
Port C Advanced High-Performance Bus
2
3
SYSCTL_GPIOHBCTL_PORTD
Port D Advanced High-Performance Bus
3
4
SYSCTL_GPIOHBCTL_PORTE
Port E Advanced High-Performance Bus
4
5
SYSCTL_GPIOHBCTL_PORTF
Port F Advanced High-Performance Bus
5
6
SYSCTL_GPIOHBCTL_PORTG
Port G Advanced High-Performance Bus
6
7
SYSCTL_GPIOHBCTL_PORTH
Port H Advanced High-Performance Bus
7
8
SYSCTL_GPIOHBCTL_PORTJ
Port J Advanced High-Performance Bus
8
9
SYSCTLIMC
Interrupt Mask Control
0x54
read-write
n
0x0
0x0
SYSCTL_IMC_BOR0IM
VDD under BOR0 Interrupt Mask
11
12
SYSCTL_IMC_BOR1IM
VDD under BOR1 Interrupt Mask
1
2
SYSCTL_IMC_MOFIM
Main Oscillator Failure Interrupt Mask
3
4
SYSCTL_IMC_MOSCPUPIM
MOSC Power Up Interrupt Mask
8
9
SYSCTL_IMC_PLLLIM
PLL Lock Interrupt Mask
6
7
SYSCTL_IMC_VDDAIM
VDDA Power OK Interrupt Mask
10
11
SYSCTLLDODPCTL
LDO Deep-Sleep Power Control
0x1BC
read-write
n
0x0
0x0
SYSCTL_LDODPCTL_VADJEN
Voltage Adjust Enable
31
32
SYSCTL_LDODPCTL_VLDO
LDO Output Voltage
0
8
SYSCTL_LDODPCTL_VLDO_0_90V
0.90 V
0x12
SYSCTL_LDODPCTL_VLDO_0_95V
0.95 V
0x13
SYSCTL_LDODPCTL_VLDO_1_00V
1.00 V
0x14
SYSCTL_LDODPCTL_VLDO_1_05V
1.05 V
0x15
SYSCTL_LDODPCTL_VLDO_1_10V
1.10 V
0x16
SYSCTL_LDODPCTL_VLDO_1_15V
1.15 V
0x17
SYSCTL_LDODPCTL_VLDO_1_20V
1.20 V
0x18
SYSCTLLDOSPCTL
LDO Sleep Power Control
0x1B4
read-write
n
0x0
0x0
SYSCTL_LDOSPCTL_VADJEN
Voltage Adjust Enable
31
32
SYSCTL_LDOSPCTL_VLDO
LDO Output Voltage
0
8
SYSCTL_LDOSPCTL_VLDO_0_90V
0.90 V
0x12
SYSCTL_LDOSPCTL_VLDO_0_95V
0.95 V
0x13
SYSCTL_LDOSPCTL_VLDO_1_00V
1.00 V
0x14
SYSCTL_LDOSPCTL_VLDO_1_05V
1.05 V
0x15
SYSCTL_LDOSPCTL_VLDO_1_10V
1.10 V
0x16
SYSCTL_LDOSPCTL_VLDO_1_15V
1.15 V
0x17
SYSCTL_LDOSPCTL_VLDO_1_20V
1.20 V
0x18
SYSCTLMISC
Masked Interrupt Status and Clear
0x58
read-write
n
0x0
0x0
SYSCTL_MISC_BOR0MIS
VDD under BOR0 Masked Interrupt Status
11
12
SYSCTL_MISC_BOR1MIS
VDD under BOR1 Masked Interrupt Status
1
2
SYSCTL_MISC_MOFMIS
Main Oscillator Failure Masked Interrupt Status
3
4
SYSCTL_MISC_MOSCPUPMIS
MOSC Power Up Masked Interrupt Status
8
9
SYSCTL_MISC_PLLLMIS
PLL Lock Masked Interrupt Status
6
7
SYSCTL_MISC_VDDAMIS
VDDA Power OK Masked Interrupt Status
10
11
SYSCTLMOSCCTL
Main Oscillator Control
0x7C
read-write
n
0x0
0x0
SYSCTL_MOSCCTL_CVAL
Clock Validation for MOSC
0
1
SYSCTL_MOSCCTL_MOSCIM
MOSC Failure Action
1
2
SYSCTL_MOSCCTL_NOXTAL
No Crystal Connected
2
3
SYSCTLNVMSTAT
Non-Volatile Memory Information
0x1A0
read-write
n
0x0
0x0
SYSCTL_NVMSTAT_FWB
32 Word Flash Write Buffer Available
0
1
SYSCTLPBORCTL
Brown-Out Reset Control
0x30
read-write
n
0x0
0x0
SYSCTL_PBORCTL_BOR0
VDD under BOR0 Event Action
2
3
SYSCTL_PBORCTL_BOR1
VDD under BOR1 Event Action
1
2
SYSCTLPIOSCCAL
Precision Internal Oscillator Calibration
0x150
read-write
n
0x0
0x0
SYSCTL_PIOSCCAL_CAL
Start Calibration
9
10
SYSCTL_PIOSCCAL_UPDATE
Update Trim
8
9
SYSCTL_PIOSCCAL_UT
User Trim Value
0
7
SYSCTL_PIOSCCAL_UTEN
Use User Trim Value
31
32
SYSCTLPIOSCSTAT
Precision Internal Oscillator Statistics
0x154
read-write
n
0x0
0x0
SYSCTL_PIOSCSTAT_CR
Calibration Result
8
10
SYSCTL_PIOSCSTAT_CRNONE
Calibration has not been attempted
0x0
SYSCTL_PIOSCSTAT_CRPASS
The last calibration operation completed to meet 1% accuracy
0x1
SYSCTL_PIOSCSTAT_CRFAIL
The last calibration operation failed to meet 1% accuracy
0x2
SYSCTL_PIOSCSTAT_CT
Calibration Trim Value
0
7
SYSCTL_PIOSCSTAT_DT
Default Trim Value
16
23
SYSCTLPLLFREQ0
PLL Frequency 0
0x160
read-write
n
0x0
0x0
SYSCTL_PLLFREQ0_MFRAC
PLL M Fractional Value
10
20
SYSCTL_PLLFREQ0_MINT
PLL M Integer Value
0
10
SYSCTLPLLFREQ1
PLL Frequency 1
0x164
read-write
n
0x0
0x0
SYSCTL_PLLFREQ1_N
PLL N Value
0
5
SYSCTL_PLLFREQ1_Q
PLL Q Value
8
13
SYSCTLPLLSTAT
PLL Status
0x168
read-write
n
0x0
0x0
SYSCTL_PLLSTAT_LOCK
PLL Lock
0
1
SYSCTLPPACMP
Analog Comparator Peripheral Present
0x33C
read-write
n
0x0
0x0
SYSCTL_PPACMP_P0
Analog Comparator Module Present
0
1
SYSCTLPPADC
Analog-to-Digital Converter Peripheral Present
0x338
read-write
n
0x0
0x0
SYSCTL_PPADC_P0
ADC Module 0 Present
0
1
SYSCTL_PPADC_P1
ADC Module 1 Present
1
2
SYSCTLPPCAN
Controller Area Network Peripheral Present
0x334
read-write
n
0x0
0x0
SYSCTL_PPCAN_P0
CAN Module 0 Present
0
1
SYSCTL_PPCAN_P1
CAN Module 1 Present
1
2
SYSCTLPPDMA
Micro Direct Memory Access Peripheral Present
0x30C
read-write
n
0x0
0x0
SYSCTL_PPDMA_P0
uDMA Module Present
0
1
SYSCTLPPEEPROM
EEPROM Peripheral Present
0x358
read-write
n
0x0
0x0
SYSCTL_PPEEPROM_P0
EEPROM Module Present
0
1
SYSCTLPPGPIO
General-Purpose Input/Output Peripheral Present
0x308
read-write
n
0x0
0x0
SYSCTL_PPGPIO_P0
GPIO Port A Present
0
1
SYSCTL_PPGPIO_P1
GPIO Port B Present
1
2
SYSCTL_PPGPIO_P10
GPIO Port L Present
10
11
SYSCTL_PPGPIO_P11
GPIO Port M Present
11
12
SYSCTL_PPGPIO_P12
GPIO Port N Present
12
13
SYSCTL_PPGPIO_P13
GPIO Port P Present
13
14
SYSCTL_PPGPIO_P14
GPIO Port Q Present
14
15
SYSCTL_PPGPIO_P2
GPIO Port C Present
2
3
SYSCTL_PPGPIO_P3
GPIO Port D Present
3
4
SYSCTL_PPGPIO_P4
GPIO Port E Present
4
5
SYSCTL_PPGPIO_P5
GPIO Port F Present
5
6
SYSCTL_PPGPIO_P6
GPIO Port G Present
6
7
SYSCTL_PPGPIO_P7
GPIO Port H Present
7
8
SYSCTL_PPGPIO_P8
GPIO Port J Present
8
9
SYSCTL_PPGPIO_P9
GPIO Port K Present
9
10
SYSCTLPPHIB
Hibernation Peripheral Present
0x314
read-write
n
0x0
0x0
SYSCTL_PPHIB_P0
Hibernation Module Present
0
1
SYSCTLPPI2C
Inter-Integrated Circuit Peripheral Present
0x320
read-write
n
0x0
0x0
SYSCTL_PPI2C_P0
I2C Module 0 Present
0
1
SYSCTL_PPI2C_P1
I2C Module 1 Present
1
2
SYSCTL_PPI2C_P2
I2C Module 2 Present
2
3
SYSCTL_PPI2C_P3
I2C Module 3 Present
3
4
SYSCTL_PPI2C_P4
I2C Module 4 Present
4
5
SYSCTL_PPI2C_P5
I2C Module 5 Present
5
6
SYSCTLPPPWM
Pulse Width Modulator Peripheral Present
0x340
read-write
n
0x0
0x0
SYSCTL_PPPWM_P0
PWM Module 0 Present
0
1
SYSCTL_PPPWM_P1
PWM Module 1 Present
1
2
SYSCTLPPQEI
Quadrature Encoder Interface Peripheral Present
0x344
read-write
n
0x0
0x0
SYSCTL_PPQEI_P0
QEI Module 0 Present
0
1
SYSCTL_PPQEI_P1
QEI Module 1 Present
1
2
SYSCTLPPSSI
Synchronous Serial Interface Peripheral Present
0x31C
read-write
n
0x0
0x0
SYSCTL_PPSSI_P0
SSI Module 0 Present
0
1
SYSCTL_PPSSI_P1
SSI Module 1 Present
1
2
SYSCTL_PPSSI_P2
SSI Module 2 Present
2
3
SYSCTL_PPSSI_P3
SSI Module 3 Present
3
4
SYSCTLPPTIMER
16/32-Bit General-Purpose Timer Peripheral Present
0x304
read-write
n
0x0
0x0
SYSCTL_PPTIMER_P0
16/32-Bit General-Purpose Timer 0 Present
0
1
SYSCTL_PPTIMER_P1
16/32-Bit General-Purpose Timer 1 Present
1
2
SYSCTL_PPTIMER_P2
16/32-Bit General-Purpose Timer 2 Present
2
3
SYSCTL_PPTIMER_P3
16/32-Bit General-Purpose Timer 3 Present
3
4
SYSCTL_PPTIMER_P4
16/32-Bit General-Purpose Timer 4 Present
4
5
SYSCTL_PPTIMER_P5
16/32-Bit General-Purpose Timer 5 Present
5
6
SYSCTLPPUART
Universal Asynchronous Receiver/Transmitter Peripheral Present
0x318
read-write
n
0x0
0x0
SYSCTL_PPUART_P0
UART Module 0 Present
0
1
SYSCTL_PPUART_P1
UART Module 1 Present
1
2
SYSCTL_PPUART_P2
UART Module 2 Present
2
3
SYSCTL_PPUART_P3
UART Module 3 Present
3
4
SYSCTL_PPUART_P4
UART Module 4 Present
4
5
SYSCTL_PPUART_P5
UART Module 5 Present
5
6
SYSCTL_PPUART_P6
UART Module 6 Present
6
7
SYSCTL_PPUART_P7
UART Module 7 Present
7
8
SYSCTLPPUSB
Universal Serial Bus Peripheral Present
0x328
read-write
n
0x0
0x0
SYSCTL_PPUSB_P0
USB Module Present
0
1
SYSCTLPPWD
Watchdog Timer Peripheral Present
0x300
read-write
n
0x0
0x0
SYSCTL_PPWD_P0
Watchdog Timer 0 Present
0
1
SYSCTL_PPWD_P1
Watchdog Timer 1 Present
1
2
SYSCTLPPWTIMER
32/64-Bit Wide General-Purpose Timer Peripheral Present
0x35C
read-write
n
0x0
0x0
SYSCTL_PPWTIMER_P0
32/64-Bit Wide General-Purpose Timer 0 Present
0
1
SYSCTL_PPWTIMER_P1
32/64-Bit Wide General-Purpose Timer 1 Present
1
2
SYSCTL_PPWTIMER_P2
32/64-Bit Wide General-Purpose Timer 2 Present
2
3
SYSCTL_PPWTIMER_P3
32/64-Bit Wide General-Purpose Timer 3 Present
3
4
SYSCTL_PPWTIMER_P4
32/64-Bit Wide General-Purpose Timer 4 Present
4
5
SYSCTL_PPWTIMER_P5
32/64-Bit Wide General-Purpose Timer 5 Present
5
6
SYSCTLPRACMP
Analog Comparator Peripheral Ready
0xA3C
read-write
n
0x0
0x0
SYSCTL_PRACMP_R0
Analog Comparator Module 0 Peripheral Ready
0
1
SYSCTLPRADC
Analog-to-Digital Converter Peripheral Ready
0xA38
read-write
n
0x0
0x0
SYSCTL_PRADC_R0
ADC Module 0 Peripheral Ready
0
1
SYSCTL_PRADC_R1
ADC Module 1 Peripheral Ready
1
2
SYSCTLPRCAN
Controller Area Network Peripheral Ready
0xA34
read-write
n
0x0
0x0
SYSCTL_PRCAN_R0
CAN Module 0 Peripheral Ready
0
1
SYSCTLPRDMA
Micro Direct Memory Access Peripheral Ready
0xA0C
read-write
n
0x0
0x0
SYSCTL_PRDMA_R0
uDMA Module Peripheral Ready
0
1
SYSCTLPREEPROM
EEPROM Peripheral Ready
0xA58
read-write
n
0x0
0x0
SYSCTL_PREEPROM_R0
EEPROM Module Peripheral Ready
0
1
SYSCTLPRGPIO
General-Purpose Input/Output Peripheral Ready
0xA08
read-write
n
0x0
0x0
SYSCTL_PRGPIO_R0
GPIO Port A Peripheral Ready
0
1
SYSCTL_PRGPIO_R1
GPIO Port B Peripheral Ready
1
2
SYSCTL_PRGPIO_R2
GPIO Port C Peripheral Ready
2
3
SYSCTL_PRGPIO_R3
GPIO Port D Peripheral Ready
3
4
SYSCTL_PRGPIO_R4
GPIO Port E Peripheral Ready
4
5
SYSCTL_PRGPIO_R5
GPIO Port F Peripheral Ready
5
6
SYSCTL_PRGPIO_R6
GPIO Port G Peripheral Ready
6
7
SYSCTL_PRGPIO_R7
GPIO Port H Peripheral Ready
7
8
SYSCTL_PRGPIO_R8
GPIO Port J Peripheral Ready
8
9
SYSCTL_PRGPIO_R9
GPIO Port K Peripheral Ready
9
10
SYSCTLPRHIB
Hibernation Peripheral Ready
0xA14
read-write
n
0x0
0x0
SYSCTL_PRHIB_R0
Hibernation Module Peripheral Ready
0
1
SYSCTLPRI2C
Inter-Integrated Circuit Peripheral Ready
0xA20
read-write
n
0x0
0x0
SYSCTL_PRI2C_R0
I2C Module 0 Peripheral Ready
0
1
SYSCTL_PRI2C_R1
I2C Module 1 Peripheral Ready
1
2
SYSCTL_PRI2C_R2
I2C Module 2 Peripheral Ready
2
3
SYSCTL_PRI2C_R3
I2C Module 3 Peripheral Ready
3
4
SYSCTL_PRI2C_R4
I2C Module 4 Peripheral Ready
4
5
SYSCTL_PRI2C_R5
I2C Module 5 Peripheral Ready
5
6
SYSCTLPRSSI
Synchronous Serial Interface Peripheral Ready
0xA1C
read-write
n
0x0
0x0
SYSCTL_PRSSI_R0
SSI Module 0 Peripheral Ready
0
1
SYSCTL_PRSSI_R1
SSI Module 1 Peripheral Ready
1
2
SYSCTL_PRSSI_R2
SSI Module 2 Peripheral Ready
2
3
SYSCTL_PRSSI_R3
SSI Module 3 Peripheral Ready
3
4
SYSCTLPRTIMER
16/32-Bit General-Purpose Timer Peripheral Ready
0xA04
read-write
n
0x0
0x0
SYSCTL_PRTIMER_R0
16/32-Bit General-Purpose Timer 0 Peripheral Ready
0
1
SYSCTL_PRTIMER_R1
16/32-Bit General-Purpose Timer 1 Peripheral Ready
1
2
SYSCTL_PRTIMER_R2
16/32-Bit General-Purpose Timer 2 Peripheral Ready
2
3
SYSCTL_PRTIMER_R3
16/32-Bit General-Purpose Timer 3 Peripheral Ready
3
4
SYSCTL_PRTIMER_R4
16/32-Bit General-Purpose Timer 4 Peripheral Ready
4
5
SYSCTL_PRTIMER_R5
16/32-Bit General-Purpose Timer 5 Peripheral Ready
5
6
SYSCTLPRUART
Universal Asynchronous Receiver/Transmitter Peripheral Ready
0xA18
read-write
n
0x0
0x0
SYSCTL_PRUART_R0
UART Module 0 Peripheral Ready
0
1
SYSCTL_PRUART_R1
UART Module 1 Peripheral Ready
1
2
SYSCTL_PRUART_R2
UART Module 2 Peripheral Ready
2
3
SYSCTL_PRUART_R3
UART Module 3 Peripheral Ready
3
4
SYSCTL_PRUART_R4
UART Module 4 Peripheral Ready
4
5
SYSCTL_PRUART_R5
UART Module 5 Peripheral Ready
5
6
SYSCTL_PRUART_R6
UART Module 6 Peripheral Ready
6
7
SYSCTL_PRUART_R7
UART Module 7 Peripheral Ready
7
8
SYSCTLPRWD
Watchdog Timer Peripheral Ready
0xA00
read-write
n
0x0
0x0
SYSCTL_PRWD_R0
Watchdog Timer 0 Peripheral Ready
0
1
SYSCTL_PRWD_R1
Watchdog Timer 1 Peripheral Ready
1
2
SYSCTLPRWTIMER
32/64-Bit Wide General-Purpose Timer Peripheral Ready
0xA5C
read-write
n
0x0
0x0
SYSCTL_PRWTIMER_R0
32/64-Bit Wide General-Purpose Timer 0 Peripheral Ready
0
1
SYSCTL_PRWTIMER_R1
32/64-Bit Wide General-Purpose Timer 1 Peripheral Ready
1
2
SYSCTL_PRWTIMER_R2
32/64-Bit Wide General-Purpose Timer 2 Peripheral Ready
2
3
SYSCTL_PRWTIMER_R3
32/64-Bit Wide General-Purpose Timer 3 Peripheral Ready
3
4
SYSCTL_PRWTIMER_R4
32/64-Bit Wide General-Purpose Timer 4 Peripheral Ready
4
5
SYSCTL_PRWTIMER_R5
32/64-Bit Wide General-Purpose Timer 5 Peripheral Ready
5
6
SYSCTLRCC
Run-Mode Clock Configuration
0x60
read-write
n
0x0
0x0
SYSCTL_RCC_ACG
Auto Clock Gating
27
28
SYSCTL_RCC_BYPASS
PLL Bypass
11
12
SYSCTL_RCC_MOSCDIS
Main Oscillator Disable
0
1
SYSCTL_RCC_OSCSRC
Oscillator Source
4
6
SYSCTL_RCC_OSCSRC_MAIN
MOSC
0x0
SYSCTL_RCC_OSCSRC_INT
IOSC
0x1
SYSCTL_RCC_OSCSRC_INT4
IOSC/4
0x2
SYSCTL_RCC_OSCSRC_30
LFIOSC
0x3
SYSCTL_RCC_PWRDN
PLL Power Down
13
14
SYSCTL_RCC_SYSDIV
System Clock Divisor
23
27
SYSCTL_RCC_USESYSDIV
Enable System Clock Divider
22
23
SYSCTL_RCC_XTAL
Crystal Value
6
11
SYSCTL_RCC_XTAL_10MHZ
10 MHz
0x10
SYSCTL_RCC_XTAL_12MHZ
12 MHz
0x11
SYSCTL_RCC_XTAL_12_2MHZ
12.288 MHz
0x12
SYSCTL_RCC_XTAL_13_5MHZ
13.56 MHz
0x13
SYSCTL_RCC_XTAL_14_3MHZ
14.31818 MHz
0x14
SYSCTL_RCC_XTAL_16MHZ
16 MHz
0x15
SYSCTL_RCC_XTAL_16_3MHZ
16.384 MHz
0x16
SYSCTL_RCC_XTAL_18MHZ
18.0 MHz (USB)
0x17
SYSCTL_RCC_XTAL_20MHZ
20.0 MHz (USB)
0x18
SYSCTL_RCC_XTAL_24MHZ
24.0 MHz (USB)
0x19
SYSCTL_RCC_XTAL_25MHZ
25.0 MHz (USB)
0x1a
SYSCTL_RCC_XTAL_4MHZ
4 MHz
0x6
SYSCTL_RCC_XTAL_4_09MHZ
4.096 MHz
0x7
SYSCTL_RCC_XTAL_4_91MHZ
4.9152 MHz
0x8
SYSCTL_RCC_XTAL_5MHZ
5 MHz
0x9
SYSCTL_RCC_XTAL_5_12MHZ
5.12 MHz
0xa
SYSCTL_RCC_XTAL_6MHZ
6 MHz
0xb
SYSCTL_RCC_XTAL_6_14MHZ
6.144 MHz
0xc
SYSCTL_RCC_XTAL_7_37MHZ
7.3728 MHz
0xd
SYSCTL_RCC_XTAL_8MHZ
8 MHz
0xe
SYSCTL_RCC_XTAL_8_19MHZ
8.192 MHz
0xf
SYSCTLRCC2
Run-Mode Clock Configuration 2
0x70
read-write
n
0x0
0x0
SYSCTL_RCC2_BYPASS2
PLL Bypass 2
11
12
SYSCTL_RCC2_DIV400
Divide PLL as 400 MHz vs. 200 MHz
30
31
SYSCTL_RCC2_OSCSRC2
Oscillator Source 2
4
7
SYSCTL_RCC2_OSCSRC2_MO
MOSC
0x0
SYSCTL_RCC2_OSCSRC2_IO
PIOSC
0x1
SYSCTL_RCC2_OSCSRC2_IO4
PIOSC/4
0x2
SYSCTL_RCC2_OSCSRC2_30
LFIOSC
0x3
SYSCTL_RCC2_OSCSRC2_32
32.768 kHz
0x7
SYSCTL_RCC2_PWRDN2
Power-Down PLL 2
13
14
SYSCTL_RCC2_SYSDIV2
System Clock Divisor 2
23
29
SYSCTL_RCC2_SYSDIV2LSB
Additional LSB for SYSDIV2
22
23
SYSCTL_RCC2_USERCC2
Use RCC2
31
32
SYSCTLRCGC0
Run Mode Clock Gating Control Register 0
0x100
read-write
n
0x0
0x0
SYSCTL_RCGC0_ADC0
ADC0 Clock Gating Control
16
17
SYSCTL_RCGC0_ADC0SPD
ADC0 Sample Speed
8
10
SYSCTL_RCGC0_ADC0SPD_125K
125K samples/second
0x0
SYSCTL_RCGC0_ADC0SPD_250K
250K samples/second
0x1
SYSCTL_RCGC0_ADC0SPD_500K
500K samples/second
0x2
SYSCTL_RCGC0_ADC0SPD_1M
1M samples/second
0x3
SYSCTL_RCGC0_ADC1
ADC1 Clock Gating Control
17
18
SYSCTL_RCGC0_ADC1SPD
ADC1 Sample Speed
10
12
SYSCTL_RCGC0_ADC1SPD_125K
125K samples/second
0x0
SYSCTL_RCGC0_ADC1SPD_250K
250K samples/second
0x1
SYSCTL_RCGC0_ADC1SPD_500K
500K samples/second
0x2
SYSCTL_RCGC0_ADC1SPD_1M
1M samples/second
0x3
SYSCTL_RCGC0_CAN0
CAN0 Clock Gating Control
24
25
SYSCTL_RCGC0_HIB
HIB Clock Gating Control
6
7
SYSCTL_RCGC0_WDT0
WDT0 Clock Gating Control
3
4
SYSCTL_RCGC0_WDT1
WDT1 Clock Gating Control
28
29
SYSCTLRCGC1
Run Mode Clock Gating Control Register 1
0x104
read-write
n
0x0
0x0
SYSCTL_RCGC1_COMP0
Analog Comparator 0 Clock Gating
24
25
SYSCTL_RCGC1_COMP1
Analog Comparator 1 Clock Gating
25
26
SYSCTL_RCGC1_COMP2
Analog Comparator 2 Clock Gating
26
27
SYSCTL_RCGC1_I2C0
I2C0 Clock Gating Control
12
13
SYSCTL_RCGC1_I2C1
I2C1 Clock Gating Control
14
15
SYSCTL_RCGC1_SSI0
SSI0 Clock Gating Control
4
5
SYSCTL_RCGC1_SSI1
SSI1 Clock Gating Control
5
6
SYSCTL_RCGC1_TIMER0
Timer 0 Clock Gating Control
16
17
SYSCTL_RCGC1_TIMER1
Timer 1 Clock Gating Control
17
18
SYSCTL_RCGC1_TIMER2
Timer 2 Clock Gating Control
18
19
SYSCTL_RCGC1_TIMER3
Timer 3 Clock Gating Control
19
20
SYSCTL_RCGC1_UART0
UART0 Clock Gating Control
0
1
SYSCTL_RCGC1_UART1
UART1 Clock Gating Control
1
2
SYSCTL_RCGC1_UART2
UART2 Clock Gating Control
2
3
SYSCTLRCGC2
Run Mode Clock Gating Control Register 2
0x108
read-write
n
0x0
0x0
SYSCTL_RCGC2_GPIOA
Port A Clock Gating Control
0
1
SYSCTL_RCGC2_GPIOB
Port B Clock Gating Control
1
2
SYSCTL_RCGC2_GPIOC
Port C Clock Gating Control
2
3
SYSCTL_RCGC2_GPIOD
Port D Clock Gating Control
3
4
SYSCTL_RCGC2_GPIOE
Port E Clock Gating Control
4
5
SYSCTL_RCGC2_GPIOF
Port F Clock Gating Control
5
6
SYSCTL_RCGC2_GPIOG
Port G Clock Gating Control
6
7
SYSCTL_RCGC2_GPIOH
Port H Clock Gating Control
7
8
SYSCTL_RCGC2_GPIOJ
Port J Clock Gating Control
8
9
SYSCTL_RCGC2_UDMA
Micro-DMA Clock Gating Control
13
14
SYSCTLRCGCACMP
Analog Comparator Run Mode Clock Gating Control
0x63C
read-write
n
0x0
0x0
SYSCTL_RCGCACMP_R0
Analog Comparator Module 0 Run Mode Clock Gating Control
0
1
SYSCTLRCGCADC
Analog-to-Digital Converter Run Mode Clock Gating Control
0x638
read-write
n
0x0
0x0
SYSCTL_RCGCADC_R0
ADC Module 0 Run Mode Clock Gating Control
0
1
SYSCTL_RCGCADC_R1
ADC Module 1 Run Mode Clock Gating Control
1
2
SYSCTLRCGCCAN
Controller Area Network Run Mode Clock Gating Control
0x634
read-write
n
0x0
0x0
SYSCTL_RCGCCAN_R0
CAN Module 0 Run Mode Clock Gating Control
0
1
SYSCTLRCGCDMA
Micro Direct Memory Access Run Mode Clock Gating Control
0x60C
read-write
n
0x0
0x0
SYSCTL_RCGCDMA_R0
uDMA Module Run Mode Clock Gating Control
0
1
SYSCTLRCGCEEPROM
EEPROM Run Mode Clock Gating Control
0x658
read-write
n
0x0
0x0
SYSCTL_RCGCEEPROM_R0
EEPROM Module Run Mode Clock Gating Control
0
1
SYSCTLRCGCGPIO
General-Purpose Input/Output Run Mode Clock Gating Control
0x608
read-write
n
0x0
0x0
SYSCTL_RCGCGPIO_R0
GPIO Port A Run Mode Clock Gating Control
0
1
SYSCTL_RCGCGPIO_R1
GPIO Port B Run Mode Clock Gating Control
1
2
SYSCTL_RCGCGPIO_R2
GPIO Port C Run Mode Clock Gating Control
2
3
SYSCTL_RCGCGPIO_R3
GPIO Port D Run Mode Clock Gating Control
3
4
SYSCTL_RCGCGPIO_R4
GPIO Port E Run Mode Clock Gating Control
4
5
SYSCTL_RCGCGPIO_R5
GPIO Port F Run Mode Clock Gating Control
5
6
SYSCTL_RCGCGPIO_R6
GPIO Port G Run Mode Clock Gating Control
6
7
SYSCTL_RCGCGPIO_R7
GPIO Port H Run Mode Clock Gating Control
7
8
SYSCTL_RCGCGPIO_R8
GPIO Port J Run Mode Clock Gating Control
8
9
SYSCTL_RCGCGPIO_R9
GPIO Port K Run Mode Clock Gating Control
9
10
SYSCTLRCGCHIB
Hibernation Run Mode Clock Gating Control
0x614
read-write
n
0x0
0x0
SYSCTL_RCGCHIB_R0
Hibernation Module Run Mode Clock Gating Control
0
1
SYSCTLRCGCI2C
Inter-Integrated Circuit Run Mode Clock Gating Control
0x620
read-write
n
0x0
0x0
SYSCTL_RCGCI2C_R0
I2C Module 0 Run Mode Clock Gating Control
0
1
SYSCTL_RCGCI2C_R1
I2C Module 1 Run Mode Clock Gating Control
1
2
SYSCTL_RCGCI2C_R2
I2C Module 2 Run Mode Clock Gating Control
2
3
SYSCTL_RCGCI2C_R3
I2C Module 3 Run Mode Clock Gating Control
3
4
SYSCTL_RCGCI2C_R4
I2C Module 4 Run Mode Clock Gating Control
4
5
SYSCTL_RCGCI2C_R5
I2C Module 5 Run Mode Clock Gating Control
5
6
SYSCTLRCGCSSI
Synchronous Serial Interface Run Mode Clock Gating Control
0x61C
read-write
n
0x0
0x0
SYSCTL_RCGCSSI_R0
SSI Module 0 Run Mode Clock Gating Control
0
1
SYSCTL_RCGCSSI_R1
SSI Module 1 Run Mode Clock Gating Control
1
2
SYSCTL_RCGCSSI_R2
SSI Module 2 Run Mode Clock Gating Control
2
3
SYSCTL_RCGCSSI_R3
SSI Module 3 Run Mode Clock Gating Control
3
4
SYSCTLRCGCTIMER
16/32-Bit General-Purpose Timer Run Mode Clock Gating Control
0x604
read-write
n
0x0
0x0
SYSCTL_RCGCTIMER_R0
16/32-Bit General-Purpose Timer 0 Run Mode Clock Gating Control
0
1
SYSCTL_RCGCTIMER_R1
16/32-Bit General-Purpose Timer 1 Run Mode Clock Gating Control
1
2
SYSCTL_RCGCTIMER_R2
16/32-Bit General-Purpose Timer 2 Run Mode Clock Gating Control
2
3
SYSCTL_RCGCTIMER_R3
16/32-Bit General-Purpose Timer 3 Run Mode Clock Gating Control
3
4
SYSCTL_RCGCTIMER_R4
16/32-Bit General-Purpose Timer 4 Run Mode Clock Gating Control
4
5
SYSCTL_RCGCTIMER_R5
16/32-Bit General-Purpose Timer 5 Run Mode Clock Gating Control
5
6
SYSCTLRCGCUART
Universal Asynchronous Receiver/Transmitter Run Mode Clock Gating Control
0x618
read-write
n
0x0
0x0
SYSCTL_RCGCUART_R0
UART Module 0 Run Mode Clock Gating Control
0
1
SYSCTL_RCGCUART_R1
UART Module 1 Run Mode Clock Gating Control
1
2
SYSCTL_RCGCUART_R2
UART Module 2 Run Mode Clock Gating Control
2
3
SYSCTL_RCGCUART_R3
UART Module 3 Run Mode Clock Gating Control
3
4
SYSCTL_RCGCUART_R4
UART Module 4 Run Mode Clock Gating Control
4
5
SYSCTL_RCGCUART_R5
UART Module 5 Run Mode Clock Gating Control
5
6
SYSCTL_RCGCUART_R6
UART Module 6 Run Mode Clock Gating Control
6
7
SYSCTL_RCGCUART_R7
UART Module 7 Run Mode Clock Gating Control
7
8
SYSCTLRCGCWD
Watchdog Timer Run Mode Clock Gating Control
0x600
read-write
n
0x0
0x0
SYSCTL_RCGCWD_R0
Watchdog Timer 0 Run Mode Clock Gating Control
0
1
SYSCTL_RCGCWD_R1
Watchdog Timer 1 Run Mode Clock Gating Control
1
2
SYSCTLRCGCWTIMER
32/64-Bit Wide General-Purpose Timer Run Mode Clock Gating Control
0x65C
read-write
n
0x0
0x0
SYSCTL_RCGCWTIMER_R0
32/64-Bit Wide General-Purpose Timer 0 Run Mode Clock Gating Control
0
1
SYSCTL_RCGCWTIMER_R1
32/64-Bit Wide General-Purpose Timer 1 Run Mode Clock Gating Control
1
2
SYSCTL_RCGCWTIMER_R2
32/64-Bit Wide General-Purpose Timer 2 Run Mode Clock Gating Control
2
3
SYSCTL_RCGCWTIMER_R3
32/64-Bit Wide General-Purpose Timer 3 Run Mode Clock Gating Control
3
4
SYSCTL_RCGCWTIMER_R4
32/64-Bit Wide General-Purpose Timer 4 Run Mode Clock Gating Control
4
5
SYSCTL_RCGCWTIMER_R5
32/64-Bit Wide General-Purpose Timer 5 Run Mode Clock Gating Control
5
6
SYSCTLRESC
Reset Cause
0x5C
read-write
n
0x0
0x0
SYSCTL_RESC_BOR
Brown-Out Reset
2
3
SYSCTL_RESC_EXT
External Reset
0
1
SYSCTL_RESC_MOSCFAIL
MOSC Failure Reset
16
17
SYSCTL_RESC_POR
Power-On Reset
1
2
SYSCTL_RESC_SW
Software Reset
4
5
SYSCTL_RESC_WDT0
Watchdog Timer 0 Reset
3
4
SYSCTL_RESC_WDT1
Watchdog Timer 1 Reset
5
6
SYSCTLRIS
Raw Interrupt Status
0x50
read-write
n
0x0
0x0
SYSCTL_RIS_BOR0RIS
VDD under BOR0 Raw Interrupt Status
11
12
SYSCTL_RIS_BOR1RIS
VDD under BOR1 Raw Interrupt Status
1
2
SYSCTL_RIS_MOFRIS
Main Oscillator Failure Raw Interrupt Status
3
4
SYSCTL_RIS_MOSCPUPRIS
MOSC Power Up Raw Interrupt Status
8
9
SYSCTL_RIS_PLLLRIS
PLL Lock Raw Interrupt Status
6
7
SYSCTL_RIS_VDDARIS
VDDA Power OK Event Raw Interrupt Status
10
11
SYSCTLSCGC0
Sleep Mode Clock Gating Control Register 0
0x110
read-write
n
0x0
0x0
SYSCTL_SCGC0_ADC0
ADC0 Clock Gating Control
16
17
SYSCTL_SCGC0_ADC1
ADC1 Clock Gating Control
17
18
SYSCTL_SCGC0_CAN0
CAN0 Clock Gating Control
24
25
SYSCTL_SCGC0_HIB
HIB Clock Gating Control
6
7
SYSCTL_SCGC0_WDT0
WDT0 Clock Gating Control
3
4
SYSCTL_SCGC0_WDT1
WDT1 Clock Gating Control
28
29
SYSCTLSCGC1
Sleep Mode Clock Gating Control Register 1
0x114
read-write
n
0x0
0x0
SYSCTL_SCGC1_COMP0
Analog Comparator 0 Clock Gating
24
25
SYSCTL_SCGC1_COMP1
Analog Comparator 1 Clock Gating
25
26
SYSCTL_SCGC1_COMP2
Analog Comparator 2 Clock Gating
26
27
SYSCTL_SCGC1_I2C0
I2C0 Clock Gating Control
12
13
SYSCTL_SCGC1_I2C1
I2C1 Clock Gating Control
14
15
SYSCTL_SCGC1_SSI0
SSI0 Clock Gating Control
4
5
SYSCTL_SCGC1_SSI1
SSI1 Clock Gating Control
5
6
SYSCTL_SCGC1_TIMER0
Timer 0 Clock Gating Control
16
17
SYSCTL_SCGC1_TIMER1
Timer 1 Clock Gating Control
17
18
SYSCTL_SCGC1_TIMER2
Timer 2 Clock Gating Control
18
19
SYSCTL_SCGC1_TIMER3
Timer 3 Clock Gating Control
19
20
SYSCTL_SCGC1_UART0
UART0 Clock Gating Control
0
1
SYSCTL_SCGC1_UART1
UART1 Clock Gating Control
1
2
SYSCTL_SCGC1_UART2
UART2 Clock Gating Control
2
3
SYSCTLSCGC2
Sleep Mode Clock Gating Control Register 2
0x118
read-write
n
0x0
0x0
SYSCTL_SCGC2_GPIOA
Port A Clock Gating Control
0
1
SYSCTL_SCGC2_GPIOB
Port B Clock Gating Control
1
2
SYSCTL_SCGC2_GPIOC
Port C Clock Gating Control
2
3
SYSCTL_SCGC2_GPIOD
Port D Clock Gating Control
3
4
SYSCTL_SCGC2_GPIOE
Port E Clock Gating Control
4
5
SYSCTL_SCGC2_GPIOF
Port F Clock Gating Control
5
6
SYSCTL_SCGC2_GPIOG
Port G Clock Gating Control
6
7
SYSCTL_SCGC2_GPIOH
Port H Clock Gating Control
7
8
SYSCTL_SCGC2_GPIOJ
Port J Clock Gating Control
8
9
SYSCTL_SCGC2_UDMA
Micro-DMA Clock Gating Control
13
14
SYSCTLSCGCACMP
Analog Comparator Sleep Mode Clock Gating Control
0x73C
read-write
n
0x0
0x0
SYSCTL_SCGCACMP_S0
Analog Comparator Module 0 Sleep Mode Clock Gating Control
0
1
SYSCTLSCGCADC
Analog-to-Digital Converter Sleep Mode Clock Gating Control
0x738
read-write
n
0x0
0x0
SYSCTL_SCGCADC_S0
ADC Module 0 Sleep Mode Clock Gating Control
0
1
SYSCTL_SCGCADC_S1
ADC Module 1 Sleep Mode Clock Gating Control
1
2
SYSCTLSCGCCAN
Controller Area Network Sleep Mode Clock Gating Control
0x734
read-write
n
0x0
0x0
SYSCTL_SCGCCAN_S0
CAN Module 0 Sleep Mode Clock Gating Control
0
1
SYSCTLSCGCDMA
Micro Direct Memory Access Sleep Mode Clock Gating Control
0x70C
read-write
n
0x0
0x0
SYSCTL_SCGCDMA_S0
uDMA Module Sleep Mode Clock Gating Control
0
1
SYSCTLSCGCEEPROM
EEPROM Sleep Mode Clock Gating Control
0x758
read-write
n
0x0
0x0
SYSCTL_SCGCEEPROM_S0
EEPROM Module Sleep Mode Clock Gating Control
0
1
SYSCTLSCGCGPIO
General-Purpose Input/Output Sleep Mode Clock Gating Control
0x708
read-write
n
0x0
0x0
SYSCTL_SCGCGPIO_S0
GPIO Port A Sleep Mode Clock Gating Control
0
1
SYSCTL_SCGCGPIO_S1
GPIO Port B Sleep Mode Clock Gating Control
1
2
SYSCTL_SCGCGPIO_S2
GPIO Port C Sleep Mode Clock Gating Control
2
3
SYSCTL_SCGCGPIO_S3
GPIO Port D Sleep Mode Clock Gating Control
3
4
SYSCTL_SCGCGPIO_S4
GPIO Port E Sleep Mode Clock Gating Control
4
5
SYSCTL_SCGCGPIO_S5
GPIO Port F Sleep Mode Clock Gating Control
5
6
SYSCTL_SCGCGPIO_S6
GPIO Port G Sleep Mode Clock Gating Control
6
7
SYSCTL_SCGCGPIO_S7
GPIO Port H Sleep Mode Clock Gating Control
7
8
SYSCTL_SCGCGPIO_S8
GPIO Port J Sleep Mode Clock Gating Control
8
9
SYSCTL_SCGCGPIO_S9
GPIO Port K Sleep Mode Clock Gating Control
9
10
SYSCTLSCGCHIB
Hibernation Sleep Mode Clock Gating Control
0x714
read-write
n
0x0
0x0
SYSCTL_SCGCHIB_S0
Hibernation Module Sleep Mode Clock Gating Control
0
1
SYSCTLSCGCI2C
Inter-Integrated Circuit Sleep Mode Clock Gating Control
0x720
read-write
n
0x0
0x0
SYSCTL_SCGCI2C_S0
I2C Module 0 Sleep Mode Clock Gating Control
0
1
SYSCTL_SCGCI2C_S1
I2C Module 1 Sleep Mode Clock Gating Control
1
2
SYSCTL_SCGCI2C_S2
I2C Module 2 Sleep Mode Clock Gating Control
2
3
SYSCTL_SCGCI2C_S3
I2C Module 3 Sleep Mode Clock Gating Control
3
4
SYSCTL_SCGCI2C_S4
I2C Module 4 Sleep Mode Clock Gating Control
4
5
SYSCTL_SCGCI2C_S5
I2C Module 5 Sleep Mode Clock Gating Control
5
6
SYSCTLSCGCSSI
Synchronous Serial Interface Sleep Mode Clock Gating Control
0x71C
read-write
n
0x0
0x0
SYSCTL_SCGCSSI_S0
SSI Module 0 Sleep Mode Clock Gating Control
0
1
SYSCTL_SCGCSSI_S1
SSI Module 1 Sleep Mode Clock Gating Control
1
2
SYSCTL_SCGCSSI_S2
SSI Module 2 Sleep Mode Clock Gating Control
2
3
SYSCTL_SCGCSSI_S3
SSI Module 3 Sleep Mode Clock Gating Control
3
4
SYSCTLSCGCTIMER
16/32-Bit General-Purpose Timer Sleep Mode Clock Gating Control
0x704
read-write
n
0x0
0x0
SYSCTL_SCGCTIMER_S0
16/32-Bit General-Purpose Timer 0 Sleep Mode Clock Gating Control
0
1
SYSCTL_SCGCTIMER_S1
16/32-Bit General-Purpose Timer 1 Sleep Mode Clock Gating Control
1
2
SYSCTL_SCGCTIMER_S2
16/32-Bit General-Purpose Timer 2 Sleep Mode Clock Gating Control
2
3
SYSCTL_SCGCTIMER_S3
16/32-Bit General-Purpose Timer 3 Sleep Mode Clock Gating Control
3
4
SYSCTL_SCGCTIMER_S4
16/32-Bit General-Purpose Timer 4 Sleep Mode Clock Gating Control
4
5
SYSCTL_SCGCTIMER_S5
16/32-Bit General-Purpose Timer 5 Sleep Mode Clock Gating Control
5
6
SYSCTLSCGCUART
Universal Asynchronous Receiver/Transmitter Sleep Mode Clock Gating Control
0x718
read-write
n
0x0
0x0
SYSCTL_SCGCUART_S0
UART Module 0 Sleep Mode Clock Gating Control
0
1
SYSCTL_SCGCUART_S1
UART Module 1 Sleep Mode Clock Gating Control
1
2
SYSCTL_SCGCUART_S2
UART Module 2 Sleep Mode Clock Gating Control
2
3
SYSCTL_SCGCUART_S3
UART Module 3 Sleep Mode Clock Gating Control
3
4
SYSCTL_SCGCUART_S4
UART Module 4 Sleep Mode Clock Gating Control
4
5
SYSCTL_SCGCUART_S5
UART Module 5 Sleep Mode Clock Gating Control
5
6
SYSCTL_SCGCUART_S6
UART Module 6 Sleep Mode Clock Gating Control
6
7
SYSCTL_SCGCUART_S7
UART Module 7 Sleep Mode Clock Gating Control
7
8
SYSCTLSCGCWD
Watchdog Timer Sleep Mode Clock Gating Control
0x700
read-write
n
0x0
0x0
SYSCTL_SCGCWD_S0
Watchdog Timer 0 Sleep Mode Clock Gating Control
0
1
SYSCTL_SCGCWD_S1
Watchdog Timer 1 Sleep Mode Clock Gating Control
1
2
SYSCTLSCGCWTIMER
32/64-Bit Wide General-Purpose Timer Sleep Mode Clock Gating Control
0x75C
read-write
n
0x0
0x0
SYSCTL_SCGCWTIMER_S0
32/64-Bit Wide General-Purpose Timer 0 Sleep Mode Clock Gating Control
0
1
SYSCTL_SCGCWTIMER_S1
32/64-Bit Wide General-Purpose Timer 1 Sleep Mode Clock Gating Control
1
2
SYSCTL_SCGCWTIMER_S2
32/64-Bit Wide General-Purpose Timer 2 Sleep Mode Clock Gating Control
2
3
SYSCTL_SCGCWTIMER_S3
32/64-Bit Wide General-Purpose Timer 3 Sleep Mode Clock Gating Control
3
4
SYSCTL_SCGCWTIMER_S4
32/64-Bit Wide General-Purpose Timer 4 Sleep Mode Clock Gating Control
4
5
SYSCTL_SCGCWTIMER_S5
32/64-Bit Wide General-Purpose Timer 5 Sleep Mode Clock Gating Control
5
6
SYSCTLSLPPWRCFG
Sleep Power Configuration
0x188
read-write
n
0x0
0x0
SYSCTL_SLPPWRCFG_FLASHPM
Flash Power Modes
4
6
SYSCTL_SLPPWRCFG_FLASHPM_NRM
Active Mode
0x0
SYSCTL_SLPPWRCFG_FLASHPM_SLP
Low Power Mode
0x2
SYSCTL_SLPPWRCFG_SRAMPM
SRAM Power Modes
0
2
SYSCTL_SLPPWRCFG_SRAMPM_NRM
Active Mode
0x0
SYSCTL_SLPPWRCFG_SRAMPM_SBY
Standby Mode
0x1
SYSCTL_SLPPWRCFG_SRAMPM_LP
Low Power Mode
0x3
SYSCTLSRACMP
Analog Comparator Software Reset
0x53C
read-write
n
0x0
0x0
SYSCTL_SRACMP_R0
Analog Comparator Module 0 Software Reset
0
1
SYSCTLSRADC
Analog-to-Digital Converter Software Reset
0x538
read-write
n
0x0
0x0
SYSCTL_SRADC_R0
ADC Module 0 Software Reset
0
1
SYSCTL_SRADC_R1
ADC Module 1 Software Reset
1
2
SYSCTLSRCAN
Controller Area Network Software Reset
0x534
read-write
n
0x0
0x0
SYSCTL_SRCAN_R0
CAN Module 0 Software Reset
0
1
SYSCTLSRCR0
Software Reset Control 0
0x40
read-write
n
0x0
0x0
SYSCTL_SRCR0_ADC0
ADC0 Reset Control
16
17
SYSCTL_SRCR0_ADC1
ADC1 Reset Control
17
18
SYSCTL_SRCR0_CAN0
CAN0 Reset Control
24
25
SYSCTL_SRCR0_HIB
HIB Reset Control
6
7
SYSCTL_SRCR0_WDT0
WDT0 Reset Control
3
4
SYSCTL_SRCR0_WDT1
WDT1 Reset Control
28
29
SYSCTLSRCR1
Software Reset Control 1
0x44
read-write
n
0x0
0x0
SYSCTL_SRCR1_COMP0
Analog Comp 0 Reset Control
24
25
SYSCTL_SRCR1_COMP1
Analog Comp 1 Reset Control
25
26
SYSCTL_SRCR1_COMP2
Analog Comp 2 Reset Control
26
27
SYSCTL_SRCR1_I2C0
I2C0 Reset Control
12
13
SYSCTL_SRCR1_I2C1
I2C1 Reset Control
14
15
SYSCTL_SRCR1_SSI0
SSI0 Reset Control
4
5
SYSCTL_SRCR1_SSI1
SSI1 Reset Control
5
6
SYSCTL_SRCR1_TIMER0
Timer 0 Reset Control
16
17
SYSCTL_SRCR1_TIMER1
Timer 1 Reset Control
17
18
SYSCTL_SRCR1_TIMER2
Timer 2 Reset Control
18
19
SYSCTL_SRCR1_TIMER3
Timer 3 Reset Control
19
20
SYSCTL_SRCR1_UART0
UART0 Reset Control
0
1
SYSCTL_SRCR1_UART1
UART1 Reset Control
1
2
SYSCTL_SRCR1_UART2
UART2 Reset Control
2
3
SYSCTLSRCR2
Software Reset Control 2
0x48
read-write
n
0x0
0x0
SYSCTL_SRCR2_GPIOA
Port A Reset Control
0
1
SYSCTL_SRCR2_GPIOB
Port B Reset Control
1
2
SYSCTL_SRCR2_GPIOC
Port C Reset Control
2
3
SYSCTL_SRCR2_GPIOD
Port D Reset Control
3
4
SYSCTL_SRCR2_GPIOE
Port E Reset Control
4
5
SYSCTL_SRCR2_GPIOF
Port F Reset Control
5
6
SYSCTL_SRCR2_GPIOG
Port G Reset Control
6
7
SYSCTL_SRCR2_GPIOH
Port H Reset Control
7
8
SYSCTL_SRCR2_GPIOJ
Port J Reset Control
8
9
SYSCTL_SRCR2_UDMA
Micro-DMA Reset Control
13
14
SYSCTLSRDMA
Micro Direct Memory Access Software Reset
0x50C
read-write
n
0x0
0x0
SYSCTL_SRDMA_R0
uDMA Module Software Reset
0
1
SYSCTLSREEPROM
EEPROM Software Reset
0x558
read-write
n
0x0
0x0
SYSCTL_SREEPROM_R0
EEPROM Module Software Reset
0
1
SYSCTLSRGPIO
General-Purpose Input/Output Software Reset
0x508
read-write
n
0x0
0x0
SYSCTL_SRGPIO_R0
GPIO Port A Software Reset
0
1
SYSCTL_SRGPIO_R1
GPIO Port B Software Reset
1
2
SYSCTL_SRGPIO_R2
GPIO Port C Software Reset
2
3
SYSCTL_SRGPIO_R3
GPIO Port D Software Reset
3
4
SYSCTL_SRGPIO_R4
GPIO Port E Software Reset
4
5
SYSCTL_SRGPIO_R5
GPIO Port F Software Reset
5
6
SYSCTL_SRGPIO_R6
GPIO Port G Software Reset
6
7
SYSCTL_SRGPIO_R7
GPIO Port H Software Reset
7
8
SYSCTL_SRGPIO_R8
GPIO Port J Software Reset
8
9
SYSCTL_SRGPIO_R9
GPIO Port K Software Reset
9
10
SYSCTLSRHIB
Hibernation Software Reset
0x514
read-write
n
0x0
0x0
SYSCTL_SRHIB_R0
Hibernation Module Software Reset
0
1
SYSCTLSRI2C
Inter-Integrated Circuit Software Reset
0x520
read-write
n
0x0
0x0
SYSCTL_SRI2C_R0
I2C Module 0 Software Reset
0
1
SYSCTL_SRI2C_R1
I2C Module 1 Software Reset
1
2
SYSCTL_SRI2C_R2
I2C Module 2 Software Reset
2
3
SYSCTL_SRI2C_R3
I2C Module 3 Software Reset
3
4
SYSCTL_SRI2C_R4
I2C Module 4 Software Reset
4
5
SYSCTL_SRI2C_R5
I2C Module 5 Software Reset
5
6
SYSCTLSRSSI
Synchronous Serial Interface Software Reset
0x51C
read-write
n
0x0
0x0
SYSCTL_SRSSI_R0
SSI Module 0 Software Reset
0
1
SYSCTL_SRSSI_R1
SSI Module 1 Software Reset
1
2
SYSCTL_SRSSI_R2
SSI Module 2 Software Reset
2
3
SYSCTL_SRSSI_R3
SSI Module 3 Software Reset
3
4
SYSCTLSRTIMER
16/32-Bit General-Purpose Timer Software Reset
0x504
read-write
n
0x0
0x0
SYSCTL_SRTIMER_R0
16/32-Bit General-Purpose Timer 0 Software Reset
0
1
SYSCTL_SRTIMER_R1
16/32-Bit General-Purpose Timer 1 Software Reset
1
2
SYSCTL_SRTIMER_R2
16/32-Bit General-Purpose Timer 2 Software Reset
2
3
SYSCTL_SRTIMER_R3
16/32-Bit General-Purpose Timer 3 Software Reset
3
4
SYSCTL_SRTIMER_R4
16/32-Bit General-Purpose Timer 4 Software Reset
4
5
SYSCTL_SRTIMER_R5
16/32-Bit General-Purpose Timer 5 Software Reset
5
6
SYSCTLSRUART
Universal Asynchronous Receiver/Transmitter Software Reset
0x518
read-write
n
0x0
0x0
SYSCTL_SRUART_R0
UART Module 0 Software Reset
0
1
SYSCTL_SRUART_R1
UART Module 1 Software Reset
1
2
SYSCTL_SRUART_R2
UART Module 2 Software Reset
2
3
SYSCTL_SRUART_R3
UART Module 3 Software Reset
3
4
SYSCTL_SRUART_R4
UART Module 4 Software Reset
4
5
SYSCTL_SRUART_R5
UART Module 5 Software Reset
5
6
SYSCTL_SRUART_R6
UART Module 6 Software Reset
6
7
SYSCTL_SRUART_R7
UART Module 7 Software Reset
7
8
SYSCTLSRWD
Watchdog Timer Software Reset
0x500
read-write
n
0x0
0x0
SYSCTL_SRWD_R0
Watchdog Timer 0 Software Reset
0
1
SYSCTL_SRWD_R1
Watchdog Timer 1 Software Reset
1
2
SYSCTLSRWTIMER
32/64-Bit Wide General-Purpose Timer Software Reset
0x55C
read-write
n
0x0
0x0
SYSCTL_SRWTIMER_R0
32/64-Bit Wide General-Purpose Timer 0 Software Reset
0
1
SYSCTL_SRWTIMER_R1
32/64-Bit Wide General-Purpose Timer 1 Software Reset
1
2
SYSCTL_SRWTIMER_R2
32/64-Bit Wide General-Purpose Timer 2 Software Reset
2
3
SYSCTL_SRWTIMER_R3
32/64-Bit Wide General-Purpose Timer 3 Software Reset
3
4
SYSCTL_SRWTIMER_R4
32/64-Bit Wide General-Purpose Timer 4 Software Reset
4
5
SYSCTL_SRWTIMER_R5
32/64-Bit Wide General-Purpose Timer 5 Software Reset
5
6
SYSCTLSYSPROP
System Properties
0x14C
read-write
n
0x0
0x0
SYSCTL_SYSPROP_FPU
FPU Present
0
1
SYSPROP
System Properties
0x14C
-1
read-write
n
0x0
0x0
SYSCTL_SYSPROP_FPU
FPU Present
0
1
SYSEXC
Register map for SYSEXC peripheral
SYSEXC
0x0
0x0
0x1000
registers
n
SYSEXC
106
IC
System Exception Interrupt Clear
0xC
-1
write-only
n
0x0
0x0
SYSEXC_IC_FPDZCIC
Floating-Point Divide By 0 Exception Interrupt Clear
1
2
write-only
SYSEXC_IC_FPIDCIC
Floating-Point Input Denormal Exception Interrupt Clear
0
1
write-only
SYSEXC_IC_FPIOCIC
Floating-Point Invalid Operation Interrupt Clear
2
3
write-only
SYSEXC_IC_FPIXCIC
Floating-Point Inexact Exception Interrupt Clear
5
6
write-only
SYSEXC_IC_FPOFCIC
Floating-Point Overflow Exception Interrupt Clear
4
5
write-only
SYSEXC_IC_FPUFCIC
Floating-Point Underflow Exception Interrupt Clear
3
4
write-only
IM
System Exception Interrupt Mask
0x4
-1
read-write
n
0x0
0x0
SYSEXC_IM_FPDZCIM
Floating-Point Divide By 0 Exception Interrupt Mask
1
2
SYSEXC_IM_FPIDCIM
Floating-Point Input Denormal Exception Interrupt Mask
0
1
SYSEXC_IM_FPIOCIM
Floating-Point Invalid Operation Interrupt Mask
2
3
SYSEXC_IM_FPIXCIM
Floating-Point Inexact Exception Interrupt Mask
5
6
SYSEXC_IM_FPOFCIM
Floating-Point Overflow Exception Interrupt Mask
4
5
SYSEXC_IM_FPUFCIM
Floating-Point Underflow Exception Interrupt Mask
3
4
MIS
System Exception Masked Interrupt Status
0x8
-1
read-write
n
0x0
0x0
SYSEXC_MIS_FPDZCMIS
Floating-Point Divide By 0 Exception Masked Interrupt Status
1
2
SYSEXC_MIS_FPIDCMIS
Floating-Point Input Denormal Exception Masked Interrupt Status
0
1
SYSEXC_MIS_FPIOCMIS
Floating-Point Invalid Operation Masked Interrupt Status
2
3
SYSEXC_MIS_FPIXCMIS
Floating-Point Inexact Exception Masked Interrupt Status
5
6
SYSEXC_MIS_FPOFCMIS
Floating-Point Overflow Exception Masked Interrupt Status
4
5
SYSEXC_MIS_FPUFCMIS
Floating-Point Underflow Exception Masked Interrupt Status
3
4
RIS
System Exception Raw Interrupt Status
0x0
-1
read-write
n
0x0
0x0
SYSEXC_RIS_FPDZCRIS
Floating-Point Divide By 0 Exception Raw Interrupt Status
1
2
SYSEXC_RIS_FPIDCRIS
Floating-Point Input Denormal Exception Raw Interrupt Status
0
1
SYSEXC_RIS_FPIOCRIS
Floating-Point Invalid Operation Raw Interrupt Status
2
3
SYSEXC_RIS_FPIXCRIS
Floating-Point Inexact Exception Raw Interrupt Status
5
6
SYSEXC_RIS_FPOFCRIS
Floating-Point Overflow Exception Raw Interrupt Status
4
5
SYSEXC_RIS_FPUFCRIS
Floating-Point Underflow Exception Raw Interrupt Status
3
4
SYSEXCIC
System Exception Interrupt Clear
0xC
write-only
n
0x0
0x0
SYSEXC_IC_FPDZCIC
Floating-Point Divide By 0 Exception Interrupt Clear
1
2
write-only
SYSEXC_IC_FPIDCIC
Floating-Point Input Denormal Exception Interrupt Clear
0
1
write-only
SYSEXC_IC_FPIOCIC
Floating-Point Invalid Operation Interrupt Clear
2
3
write-only
SYSEXC_IC_FPIXCIC
Floating-Point Inexact Exception Interrupt Clear
5
6
write-only
SYSEXC_IC_FPOFCIC
Floating-Point Overflow Exception Interrupt Clear
4
5
write-only
SYSEXC_IC_FPUFCIC
Floating-Point Underflow Exception Interrupt Clear
3
4
write-only
SYSEXCIM
System Exception Interrupt Mask
0x4
read-write
n
0x0
0x0
SYSEXC_IM_FPDZCIM
Floating-Point Divide By 0 Exception Interrupt Mask
1
2
SYSEXC_IM_FPIDCIM
Floating-Point Input Denormal Exception Interrupt Mask
0
1
SYSEXC_IM_FPIOCIM
Floating-Point Invalid Operation Interrupt Mask
2
3
SYSEXC_IM_FPIXCIM
Floating-Point Inexact Exception Interrupt Mask
5
6
SYSEXC_IM_FPOFCIM
Floating-Point Overflow Exception Interrupt Mask
4
5
SYSEXC_IM_FPUFCIM
Floating-Point Underflow Exception Interrupt Mask
3
4
SYSEXCMIS
System Exception Masked Interrupt Status
0x8
read-write
n
0x0
0x0
SYSEXC_MIS_FPDZCMIS
Floating-Point Divide By 0 Exception Masked Interrupt Status
1
2
SYSEXC_MIS_FPIDCMIS
Floating-Point Input Denormal Exception Masked Interrupt Status
0
1
SYSEXC_MIS_FPIOCMIS
Floating-Point Invalid Operation Masked Interrupt Status
2
3
SYSEXC_MIS_FPIXCMIS
Floating-Point Inexact Exception Masked Interrupt Status
5
6
SYSEXC_MIS_FPOFCMIS
Floating-Point Overflow Exception Masked Interrupt Status
4
5
SYSEXC_MIS_FPUFCMIS
Floating-Point Underflow Exception Masked Interrupt Status
3
4
SYSEXCRIS
System Exception Raw Interrupt Status
0x0
read-write
n
0x0
0x0
SYSEXC_RIS_FPDZCRIS
Floating-Point Divide By 0 Exception Raw Interrupt Status
1
2
SYSEXC_RIS_FPIDCRIS
Floating-Point Input Denormal Exception Raw Interrupt Status
0
1
SYSEXC_RIS_FPIOCRIS
Floating-Point Invalid Operation Raw Interrupt Status
2
3
SYSEXC_RIS_FPIXCRIS
Floating-Point Inexact Exception Raw Interrupt Status
5
6
SYSEXC_RIS_FPOFCRIS
Floating-Point Overflow Exception Raw Interrupt Status
4
5
SYSEXC_RIS_FPUFCRIS
Floating-Point Underflow Exception Raw Interrupt Status
3
4
TIMER0
Register map for TIMER0 peripheral
TIMER
0x0
0x0
0x1000
registers
n
TIMER0A
19
TIMER0B
20
CFG
GPTM Configuration
0x0
-1
read-write
n
0x0
0x0
TIMER_CFG
GPTM Configuration
0
3
TIMER_CFG_32_BIT_TIMER
For a 16/32-bit timer, this value selects the 32-bit timer configuration
0x0
TIMER_CFG_32_BIT_RTC
For a 16/32-bit timer, this value selects the 32-bit real-time clock (RTC) counter configuration
0x1
TIMER_CFG_16_BIT
For a 16/32-bit timer, this value selects the 16-bit timer configuration
0x4
CTL
GPTM Control
0xC
-1
read-write
n
0x0
0x0
TIMER_CTL_RTCEN
GPTM RTC Stall Enable
4
5
TIMER_CTL_TAEN
GPTM Timer A Enable
0
1
TIMER_CTL_TAEVENT
GPTM Timer A Event Mode
2
4
TIMER_CTL_TAEVENT_POS
Positive edge
0x0
TIMER_CTL_TAEVENT_NEG
Negative edge
0x1
TIMER_CTL_TAEVENT_BOTH
Both edges
0x3
TIMER_CTL_TAOTE
GPTM Timer A Output Trigger Enable
5
6
TIMER_CTL_TAPWML
GPTM Timer A PWM Output Level
6
7
TIMER_CTL_TASTALL
GPTM Timer A Stall Enable
1
2
TIMER_CTL_TBEN
GPTM Timer B Enable
8
9
TIMER_CTL_TBEVENT
GPTM Timer B Event Mode
10
12
TIMER_CTL_TBEVENT_POS
Positive edge
0x0
TIMER_CTL_TBEVENT_NEG
Negative edge
0x1
TIMER_CTL_TBEVENT_BOTH
Both edges
0x3
TIMER_CTL_TBOTE
GPTM Timer B Output Trigger Enable
13
14
TIMER_CTL_TBPWML
GPTM Timer B PWM Output Level
14
15
TIMER_CTL_TBSTALL
GPTM Timer B Stall Enable
9
10
ICR
GPTM Interrupt Clear
0x24
-1
write-only
n
0x0
0x0
TIMER_ICR_CAECINT
GPTM Timer A Capture Mode Event Interrupt Clear
2
3
write-only
TIMER_ICR_CAMCINT
GPTM Timer A Capture Mode Match Interrupt Clear
1
2
write-only
TIMER_ICR_CBECINT
GPTM Timer B Capture Mode Event Interrupt Clear
10
11
write-only
TIMER_ICR_CBMCINT
GPTM Timer B Capture Mode Match Interrupt Clear
9
10
write-only
TIMER_ICR_RTCCINT
GPTM RTC Interrupt Clear
3
4
write-only
TIMER_ICR_TAMCINT
GPTM Timer A Match Interrupt Clear
4
5
write-only
TIMER_ICR_TATOCINT
GPTM Timer A Time-Out Raw Interrupt
0
1
write-only
TIMER_ICR_TBMCINT
GPTM Timer B Match Interrupt Clear
11
12
write-only
TIMER_ICR_TBTOCINT
GPTM Timer B Time-Out Interrupt Clear
8
9
write-only
TIMER_ICR_WUECINT
32/64-Bit Wide GPTM Write Update Error Interrupt Clear
16
17
write-only
IMR
GPTM Interrupt Mask
0x18
-1
read-write
n
0x0
0x0
TIMER_IMR_CAEIM
GPTM Timer A Capture Mode Event Interrupt Mask
2
3
TIMER_IMR_CAMIM
GPTM Timer A Capture Mode Match Interrupt Mask
1
2
TIMER_IMR_CBEIM
GPTM Timer B Capture Mode Event Interrupt Mask
10
11
TIMER_IMR_CBMIM
GPTM Timer B Capture Mode Match Interrupt Mask
9
10
TIMER_IMR_RTCIM
GPTM RTC Interrupt Mask
3
4
TIMER_IMR_TAMIM
GPTM Timer A Match Interrupt Mask
4
5
TIMER_IMR_TATOIM
GPTM Timer A Time-Out Interrupt Mask
0
1
TIMER_IMR_TBMIM
GPTM Timer B Match Interrupt Mask
11
12
TIMER_IMR_TBTOIM
GPTM Timer B Time-Out Interrupt Mask
8
9
TIMER_IMR_WUEIM
32/64-Bit Wide GPTM Write Update Error Interrupt Mask
16
17
MIS
GPTM Masked Interrupt Status
0x20
-1
read-write
n
0x0
0x0
TIMER_MIS_CAEMIS
GPTM Timer A Capture Mode Event Masked Interrupt
2
3
TIMER_MIS_CAMMIS
GPTM Timer A Capture Mode Match Masked Interrupt
1
2
TIMER_MIS_CBEMIS
GPTM Timer B Capture Mode Event Masked Interrupt
10
11
TIMER_MIS_CBMMIS
GPTM Timer B Capture Mode Match Masked Interrupt
9
10
TIMER_MIS_RTCMIS
GPTM RTC Masked Interrupt
3
4
TIMER_MIS_TAMMIS
GPTM Timer A Match Masked Interrupt
4
5
TIMER_MIS_TATOMIS
GPTM Timer A Time-Out Masked Interrupt
0
1
TIMER_MIS_TBMMIS
GPTM Timer B Match Masked Interrupt
11
12
TIMER_MIS_TBTOMIS
GPTM Timer B Time-Out Masked Interrupt
8
9
TIMER_MIS_WUEMIS
32/64-Bit Wide GPTM Write Update Error Masked Interrupt Status
16
17
PP
GPTM Peripheral Properties
0xFC0
-1
read-write
n
0x0
0x0
TIMER_PP_SIZE
Count Size
0
4
TIMER_PP_SIZE_16
Timer A and Timer B counters are 16 bits each with an 8-bit prescale counter
0x0
TIMER_PP_SIZE_32
Timer A and Timer B counters are 32 bits each with a 16-bit prescale counter
0x1
RIS
GPTM Raw Interrupt Status
0x1C
-1
read-write
n
0x0
0x0
TIMER_RIS_CAERIS
GPTM Timer A Capture Mode Event Raw Interrupt
2
3
TIMER_RIS_CAMRIS
GPTM Timer A Capture Mode Match Raw Interrupt
1
2
TIMER_RIS_CBERIS
GPTM Timer B Capture Mode Event Raw Interrupt
10
11
TIMER_RIS_CBMRIS
GPTM Timer B Capture Mode Match Raw Interrupt
9
10
TIMER_RIS_RTCRIS
GPTM RTC Raw Interrupt
3
4
TIMER_RIS_TAMRIS
GPTM Timer A Match Raw Interrupt
4
5
TIMER_RIS_TATORIS
GPTM Timer A Time-Out Raw Interrupt
0
1
TIMER_RIS_TBMRIS
GPTM Timer B Match Raw Interrupt
11
12
TIMER_RIS_TBTORIS
GPTM Timer B Time-Out Raw Interrupt
8
9
TIMER_RIS_WUERIS
32/64-Bit Wide GPTM Write Update Error Raw Interrupt Status
16
17
RTCPD
GPTM RTC Predivide
0x58
-1
read-write
n
0x0
0x0
TIMER_RTCPD_RTCPD
RTC Predivide Counter Value
0
16
SYNC
GPTM Synchronize
0x10
-1
read-write
n
0x0
0x0
TIMER_SYNC_SYNCT0
Synchronize GPTM Timer 0
0
2
TIMER_SYNC_SYNCT0_NONE
GPTM0 is not affected
0x0
TIMER_SYNC_SYNCT0_TA
A timeout event for Timer A of GPTM0 is triggered
0x1
TIMER_SYNC_SYNCT0_TB
A timeout event for Timer B of GPTM0 is triggered
0x2
TIMER_SYNC_SYNCT0_TATB
A timeout event for both Timer A and Timer B of GPTM0 is triggered
0x3
TIMER_SYNC_SYNCT1
Synchronize GPTM Timer 1
2
4
TIMER_SYNC_SYNCT1_NONE
GPTM1 is not affected
0x0
TIMER_SYNC_SYNCT1_TA
A timeout event for Timer A of GPTM1 is triggered
0x1
TIMER_SYNC_SYNCT1_TB
A timeout event for Timer B of GPTM1 is triggered
0x2
TIMER_SYNC_SYNCT1_TATB
A timeout event for both Timer A and Timer B of GPTM1 is triggered
0x3
TIMER_SYNC_SYNCT2
Synchronize GPTM Timer 2
4
6
TIMER_SYNC_SYNCT2_NONE
GPTM2 is not affected
0x0
TIMER_SYNC_SYNCT2_TA
A timeout event for Timer A of GPTM2 is triggered
0x1
TIMER_SYNC_SYNCT2_TB
A timeout event for Timer B of GPTM2 is triggered
0x2
TIMER_SYNC_SYNCT2_TATB
A timeout event for both Timer A and Timer B of GPTM2 is triggered
0x3
TIMER_SYNC_SYNCT3
Synchronize GPTM Timer 3
6
8
TIMER_SYNC_SYNCT3_NONE
GPTM3 is not affected
0x0
TIMER_SYNC_SYNCT3_TA
A timeout event for Timer A of GPTM3 is triggered
0x1
TIMER_SYNC_SYNCT3_TB
A timeout event for Timer B of GPTM3 is triggered
0x2
TIMER_SYNC_SYNCT3_TATB
A timeout event for both Timer A and Timer B of GPTM3 is triggered
0x3
TIMER_SYNC_SYNCT4
Synchronize GPTM Timer 4
8
10
TIMER_SYNC_SYNCT4_NONE
GPTM4 is not affected
0x0
TIMER_SYNC_SYNCT4_TA
A timeout event for Timer A of GPTM4 is triggered
0x1
TIMER_SYNC_SYNCT4_TB
A timeout event for Timer B of GPTM4 is triggered
0x2
TIMER_SYNC_SYNCT4_TATB
A timeout event for both Timer A and Timer B of GPTM4 is triggered
0x3
TIMER_SYNC_SYNCT5
Synchronize GPTM Timer 5
10
12
TIMER_SYNC_SYNCT5_NONE
GPTM5 is not affected
0x0
TIMER_SYNC_SYNCT5_TA
A timeout event for Timer A of GPTM5 is triggered
0x1
TIMER_SYNC_SYNCT5_TB
A timeout event for Timer B of GPTM5 is triggered
0x2
TIMER_SYNC_SYNCT5_TATB
A timeout event for both Timer A and Timer B of GPTM5 is triggered
0x3
TIMER_SYNC_SYNCWT0
Synchronize GPTM 32/64-Bit Timer 0
12
14
TIMER_SYNC_SYNCWT0_NONE
GPTM 32/64-Bit Timer 0 is not affected
0x0
TIMER_SYNC_SYNCWT0_TA
A timeout event for Timer A of GPTM 32/64-Bit Timer 0 is triggered
0x1
TIMER_SYNC_SYNCWT0_TB
A timeout event for Timer B of GPTM 32/64-Bit Timer 0 is triggered
0x2
TIMER_SYNC_SYNCWT0_TATB
A timeout event for both Timer A and Timer B of GPTM 32/64-Bit Timer 0 is triggered
0x3
TIMER_SYNC_SYNCWT1
Synchronize GPTM 32/64-Bit Timer 1
14
16
TIMER_SYNC_SYNCWT1_NONE
GPTM 32/64-Bit Timer 1 is not affected
0x0
TIMER_SYNC_SYNCWT1_TA
A timeout event for Timer A of GPTM 32/64-Bit Timer 1 is triggered
0x1
TIMER_SYNC_SYNCWT1_TB
A timeout event for Timer B of GPTM 32/64-Bit Timer 1 is triggered
0x2
TIMER_SYNC_SYNCWT1_TATB
A timeout event for both Timer A and Timer B of GPTM 32/64-Bit Timer 1 is triggered
0x3
TIMER_SYNC_SYNCWT2
Synchronize GPTM 32/64-Bit Timer 2
16
18
TIMER_SYNC_SYNCWT2_NONE
GPTM 32/64-Bit Timer 2 is not affected
0x0
TIMER_SYNC_SYNCWT2_TA
A timeout event for Timer A of GPTM 32/64-Bit Timer 2 is triggered
0x1
TIMER_SYNC_SYNCWT2_TB
A timeout event for Timer B of GPTM 32/64-Bit Timer 2 is triggered
0x2
TIMER_SYNC_SYNCWT2_TATB
A timeout event for both Timer A and Timer B of GPTM 32/64-Bit Timer 2 is triggered
0x3
TIMER_SYNC_SYNCWT3
Synchronize GPTM 32/64-Bit Timer 3
18
20
TIMER_SYNC_SYNCWT3_NONE
GPTM 32/64-Bit Timer 3 is not affected
0x0
TIMER_SYNC_SYNCWT3_TA
A timeout event for Timer A of GPTM 32/64-Bit Timer 3 is triggered
0x1
TIMER_SYNC_SYNCWT3_TB
A timeout event for Timer B of GPTM 32/64-Bit Timer 3 is triggered
0x2
TIMER_SYNC_SYNCWT3_TATB
A timeout event for both Timer A and Timer B of GPTM 32/64-Bit Timer 3 is triggered
0x3
TIMER_SYNC_SYNCWT4
Synchronize GPTM 32/64-Bit Timer 4
20
22
TIMER_SYNC_SYNCWT4_NONE
GPTM 32/64-Bit Timer 4 is not affected
0x0
TIMER_SYNC_SYNCWT4_TA
A timeout event for Timer A of GPTM 32/64-Bit Timer 4 is triggered
0x1
TIMER_SYNC_SYNCWT4_TB
A timeout event for Timer B of GPTM 32/64-Bit Timer 4 is triggered
0x2
TIMER_SYNC_SYNCWT4_TATB
A timeout event for both Timer A and Timer B of GPTM 32/64-Bit Timer 4 is triggered
0x3
TIMER_SYNC_SYNCWT5
Synchronize GPTM 32/64-Bit Timer 5
22
24
TIMER_SYNC_SYNCWT5_NONE
GPTM 32/64-Bit Timer 5 is not affected
0x0
TIMER_SYNC_SYNCWT5_TA
A timeout event for Timer A of GPTM 32/64-Bit Timer 5 is triggered
0x1
TIMER_SYNC_SYNCWT5_TB
A timeout event for Timer B of GPTM 32/64-Bit Timer 5 is triggered
0x2
TIMER_SYNC_SYNCWT5_TATB
A timeout event for both Timer A and Timer B of GPTM 32/64-Bit Timer 5 is triggered
0x3
TAILR
GPTM Timer A Interval Load
0x28
-1
read-write
n
0x0
0x0
TAMATCHR
GPTM Timer A Match
0x30
-1
read-write
n
0x0
0x0
TAMR
GPTM Timer A Mode
0x4
-1
read-write
n
0x0
0x0
TIMER_TAMR_TAAMS
GPTM Timer A Alternate Mode Select
3
4
TIMER_TAMR_TACDIR
GPTM Timer A Count Direction
4
5
TIMER_TAMR_TACMR
GPTM Timer A Capture Mode
2
3
TIMER_TAMR_TAILD
GPTM Timer A Interval Load Write
8
9
TIMER_TAMR_TAMIE
GPTM Timer A Match Interrupt Enable
5
6
TIMER_TAMR_TAMR
GPTM Timer A Mode
0
2
TIMER_TAMR_TAMR_1_SHOT
One-Shot Timer mode
0x1
TIMER_TAMR_TAMR_PERIOD
Periodic Timer mode
0x2
TIMER_TAMR_TAMR_CAP
Capture mode
0x3
TIMER_TAMR_TAMRSU
GPTM Timer A Match Register Update
10
11
TIMER_TAMR_TAPLO
GPTM Timer A PWM Legacy Operation
11
12
TIMER_TAMR_TAPWMIE
GPTM Timer A PWM Interrupt Enable
9
10
TIMER_TAMR_TASNAPS
GPTM Timer A Snap-Shot Mode
7
8
TIMER_TAMR_TAWOT
GPTM Timer A Wait-on-Trigger
6
7
TAPMR
GPTM TimerA Prescale Match
0x40
-1
read-write
n
0x0
0x0
TIMER_TAPMR_TAPSMR
GPTM TimerA Prescale Match
0
8
TIMER_TAPMR_TAPSMRH
GPTM Timer A Prescale Match High Byte
8
16
TAPR
GPTM Timer A Prescale
0x38
-1
read-write
n
0x0
0x0
TIMER_TAPR_TAPSR
GPTM Timer A Prescale
0
8
TIMER_TAPR_TAPSRH
GPTM Timer A Prescale High Byte
8
16
TAPS
GPTM Timer A Prescale Snapshot
0x5C
-1
read-write
n
0x0
0x0
TIMER_TAPS_PSS
GPTM Timer A Prescaler Snapshot
0
16
TAPV
GPTM Timer A Prescale Value
0x64
-1
read-write
n
0x0
0x0
TIMER_TAPV_PSV
GPTM Timer A Prescaler Value
0
16
TAR
GPTM Timer A
0x48
-1
read-write
n
0x0
0x0
TAV
GPTM Timer A Value
0x50
-1
read-write
n
0x0
0x0
TBILR
GPTM Timer B Interval Load
0x2C
-1
read-write
n
0x0
0x0
TBMATCHR
GPTM Timer B Match
0x34
-1
read-write
n
0x0
0x0
TBMR
GPTM Timer B Mode
0x8
-1
read-write
n
0x0
0x0
TIMER_TBMR_TBAMS
GPTM Timer B Alternate Mode Select
3
4
TIMER_TBMR_TBCDIR
GPTM Timer B Count Direction
4
5
TIMER_TBMR_TBCMR
GPTM Timer B Capture Mode
2
3
TIMER_TBMR_TBILD
GPTM Timer B Interval Load Write
8
9
TIMER_TBMR_TBMIE
GPTM Timer B Match Interrupt Enable
5
6
TIMER_TBMR_TBMR
GPTM Timer B Mode
0
2
TIMER_TBMR_TBMR_1_SHOT
One-Shot Timer mode
0x1
TIMER_TBMR_TBMR_PERIOD
Periodic Timer mode
0x2
TIMER_TBMR_TBMR_CAP
Capture mode
0x3
TIMER_TBMR_TBMRSU
GPTM Timer B Match Register Update
10
11
TIMER_TBMR_TBPLO
GPTM Timer B PWM Legacy Operation
11
12
TIMER_TBMR_TBPWMIE
GPTM Timer B PWM Interrupt Enable
9
10
TIMER_TBMR_TBSNAPS
GPTM Timer B Snap-Shot Mode
7
8
TIMER_TBMR_TBWOT
GPTM Timer B Wait-on-Trigger
6
7
TBPMR
GPTM TimerB Prescale Match
0x44
-1
read-write
n
0x0
0x0
TIMER_TBPMR_TBPSMR
GPTM TimerB Prescale Match
0
8
TIMER_TBPMR_TBPSMRH
GPTM Timer B Prescale Match High Byte
8
16
TBPR
GPTM Timer B Prescale
0x3C
-1
read-write
n
0x0
0x0
TIMER_TBPR_TBPSR
GPTM Timer B Prescale
0
8
TIMER_TBPR_TBPSRH
GPTM Timer B Prescale High Byte
8
16
TBPS
GPTM Timer B Prescale Snapshot
0x60
-1
read-write
n
0x0
0x0
TIMER_TBPS_PSS
GPTM Timer A Prescaler Value
0
16
TBPV
GPTM Timer B Prescale Value
0x68
-1
read-write
n
0x0
0x0
TIMER_TBPV_PSV
GPTM Timer B Prescaler Value
0
16
TBR
GPTM Timer B
0x4C
-1
read-write
n
0x0
0x0
TBV
GPTM Timer B Value
0x54
-1
read-write
n
0x0
0x0
TIMER0CFG
GPTM Configuration
0x0
read-write
n
0x0
0x0
TIMER_CFG
GPTM Configuration
0
3
TIMER_CFG_32_BIT_TIMER
For a 16/32-bit timer, this value selects the 32-bit timer configuration
0x0
TIMER_CFG_32_BIT_RTC
For a 16/32-bit timer, this value selects the 32-bit real-time clock (RTC) counter configuration
0x1
TIMER_CFG_16_BIT
For a 16/32-bit timer, this value selects the 16-bit timer configuration
0x4
TIMER0CTL
GPTM Control
0xC
read-write
n
0x0
0x0
TIMER_CTL_RTCEN
GPTM RTC Stall Enable
4
5
TIMER_CTL_TAEN
GPTM Timer A Enable
0
1
TIMER_CTL_TAEVENT
GPTM Timer A Event Mode
2
4
TIMER_CTL_TAEVENT_POS
Positive edge
0x0
TIMER_CTL_TAEVENT_NEG
Negative edge
0x1
TIMER_CTL_TAEVENT_BOTH
Both edges
0x3
TIMER_CTL_TAOTE
GPTM Timer A Output Trigger Enable
5
6
TIMER_CTL_TAPWML
GPTM Timer A PWM Output Level
6
7
TIMER_CTL_TASTALL
GPTM Timer A Stall Enable
1
2
TIMER_CTL_TBEN
GPTM Timer B Enable
8
9
TIMER_CTL_TBEVENT
GPTM Timer B Event Mode
10
12
TIMER_CTL_TBEVENT_POS
Positive edge
0x0
TIMER_CTL_TBEVENT_NEG
Negative edge
0x1
TIMER_CTL_TBEVENT_BOTH
Both edges
0x3
TIMER_CTL_TBOTE
GPTM Timer B Output Trigger Enable
13
14
TIMER_CTL_TBPWML
GPTM Timer B PWM Output Level
14
15
TIMER_CTL_TBSTALL
GPTM Timer B Stall Enable
9
10
TIMER0ICR
GPTM Interrupt Clear
0x24
write-only
n
0x0
0x0
TIMER_ICR_CAECINT
GPTM Timer A Capture Mode Event Interrupt Clear
2
3
write-only
TIMER_ICR_CAMCINT
GPTM Timer A Capture Mode Match Interrupt Clear
1
2
write-only
TIMER_ICR_CBECINT
GPTM Timer B Capture Mode Event Interrupt Clear
10
11
write-only
TIMER_ICR_CBMCINT
GPTM Timer B Capture Mode Match Interrupt Clear
9
10
write-only
TIMER_ICR_RTCCINT
GPTM RTC Interrupt Clear
3
4
write-only
TIMER_ICR_TAMCINT
GPTM Timer A Match Interrupt Clear
4
5
write-only
TIMER_ICR_TATOCINT
GPTM Timer A Time-Out Raw Interrupt
0
1
write-only
TIMER_ICR_TBMCINT
GPTM Timer B Match Interrupt Clear
11
12
write-only
TIMER_ICR_TBTOCINT
GPTM Timer B Time-Out Interrupt Clear
8
9
write-only
TIMER_ICR_WUECINT
32/64-Bit Wide GPTM Write Update Error Interrupt Clear
16
17
write-only
TIMER0IMR
GPTM Interrupt Mask
0x18
read-write
n
0x0
0x0
TIMER_IMR_CAEIM
GPTM Timer A Capture Mode Event Interrupt Mask
2
3
TIMER_IMR_CAMIM
GPTM Timer A Capture Mode Match Interrupt Mask
1
2
TIMER_IMR_CBEIM
GPTM Timer B Capture Mode Event Interrupt Mask
10
11
TIMER_IMR_CBMIM
GPTM Timer B Capture Mode Match Interrupt Mask
9
10
TIMER_IMR_RTCIM
GPTM RTC Interrupt Mask
3
4
TIMER_IMR_TAMIM
GPTM Timer A Match Interrupt Mask
4
5
TIMER_IMR_TATOIM
GPTM Timer A Time-Out Interrupt Mask
0
1
TIMER_IMR_TBMIM
GPTM Timer B Match Interrupt Mask
11
12
TIMER_IMR_TBTOIM
GPTM Timer B Time-Out Interrupt Mask
8
9
TIMER_IMR_WUEIM
32/64-Bit Wide GPTM Write Update Error Interrupt Mask
16
17
TIMER0MIS
GPTM Masked Interrupt Status
0x20
read-write
n
0x0
0x0
TIMER_MIS_CAEMIS
GPTM Timer A Capture Mode Event Masked Interrupt
2
3
TIMER_MIS_CAMMIS
GPTM Timer A Capture Mode Match Masked Interrupt
1
2
TIMER_MIS_CBEMIS
GPTM Timer B Capture Mode Event Masked Interrupt
10
11
TIMER_MIS_CBMMIS
GPTM Timer B Capture Mode Match Masked Interrupt
9
10
TIMER_MIS_RTCMIS
GPTM RTC Masked Interrupt
3
4
TIMER_MIS_TAMMIS
GPTM Timer A Match Masked Interrupt
4
5
TIMER_MIS_TATOMIS
GPTM Timer A Time-Out Masked Interrupt
0
1
TIMER_MIS_TBMMIS
GPTM Timer B Match Masked Interrupt
11
12
TIMER_MIS_TBTOMIS
GPTM Timer B Time-Out Masked Interrupt
8
9
TIMER_MIS_WUEMIS
32/64-Bit Wide GPTM Write Update Error Masked Interrupt Status
16
17
TIMER0PP
GPTM Peripheral Properties
0xFC0
read-write
n
0x0
0x0
TIMER_PP_SIZE
Count Size
0
4
TIMER_PP_SIZE_16
Timer A and Timer B counters are 16 bits each with an 8-bit prescale counter
0x0
TIMER_PP_SIZE_32
Timer A and Timer B counters are 32 bits each with a 16-bit prescale counter
0x1
TIMER0RIS
GPTM Raw Interrupt Status
0x1C
read-write
n
0x0
0x0
TIMER_RIS_CAERIS
GPTM Timer A Capture Mode Event Raw Interrupt
2
3
TIMER_RIS_CAMRIS
GPTM Timer A Capture Mode Match Raw Interrupt
1
2
TIMER_RIS_CBERIS
GPTM Timer B Capture Mode Event Raw Interrupt
10
11
TIMER_RIS_CBMRIS
GPTM Timer B Capture Mode Match Raw Interrupt
9
10
TIMER_RIS_RTCRIS
GPTM RTC Raw Interrupt
3
4
TIMER_RIS_TAMRIS
GPTM Timer A Match Raw Interrupt
4
5
TIMER_RIS_TATORIS
GPTM Timer A Time-Out Raw Interrupt
0
1
TIMER_RIS_TBMRIS
GPTM Timer B Match Raw Interrupt
11
12
TIMER_RIS_TBTORIS
GPTM Timer B Time-Out Raw Interrupt
8
9
TIMER_RIS_WUERIS
32/64-Bit Wide GPTM Write Update Error Raw Interrupt Status
16
17
TIMER0RTCPD
GPTM RTC Predivide
0x58
read-write
n
0x0
0x0
TIMER_RTCPD_RTCPD
RTC Predivide Counter Value
0
16
TIMER0SYNC
GPTM Synchronize
0x10
read-write
n
0x0
0x0
TIMER_SYNC_SYNCT0
Synchronize GPTM Timer 0
0
2
TIMER_SYNC_SYNCT0_NONE
GPTM0 is not affected
0x0
TIMER_SYNC_SYNCT0_TA
A timeout event for Timer A of GPTM0 is triggered
0x1
TIMER_SYNC_SYNCT0_TB
A timeout event for Timer B of GPTM0 is triggered
0x2
TIMER_SYNC_SYNCT0_TATB
A timeout event for both Timer A and Timer B of GPTM0 is triggered
0x3
TIMER_SYNC_SYNCT1
Synchronize GPTM Timer 1
2
4
TIMER_SYNC_SYNCT1_NONE
GPTM1 is not affected
0x0
TIMER_SYNC_SYNCT1_TA
A timeout event for Timer A of GPTM1 is triggered
0x1
TIMER_SYNC_SYNCT1_TB
A timeout event for Timer B of GPTM1 is triggered
0x2
TIMER_SYNC_SYNCT1_TATB
A timeout event for both Timer A and Timer B of GPTM1 is triggered
0x3
TIMER_SYNC_SYNCT2
Synchronize GPTM Timer 2
4
6
TIMER_SYNC_SYNCT2_NONE
GPTM2 is not affected
0x0
TIMER_SYNC_SYNCT2_TA
A timeout event for Timer A of GPTM2 is triggered
0x1
TIMER_SYNC_SYNCT2_TB
A timeout event for Timer B of GPTM2 is triggered
0x2
TIMER_SYNC_SYNCT2_TATB
A timeout event for both Timer A and Timer B of GPTM2 is triggered
0x3
TIMER_SYNC_SYNCT3
Synchronize GPTM Timer 3
6
8
TIMER_SYNC_SYNCT3_NONE
GPTM3 is not affected
0x0
TIMER_SYNC_SYNCT3_TA
A timeout event for Timer A of GPTM3 is triggered
0x1
TIMER_SYNC_SYNCT3_TB
A timeout event for Timer B of GPTM3 is triggered
0x2
TIMER_SYNC_SYNCT3_TATB
A timeout event for both Timer A and Timer B of GPTM3 is triggered
0x3
TIMER_SYNC_SYNCT4
Synchronize GPTM Timer 4
8
10
TIMER_SYNC_SYNCT4_NONE
GPTM4 is not affected
0x0
TIMER_SYNC_SYNCT4_TA
A timeout event for Timer A of GPTM4 is triggered
0x1
TIMER_SYNC_SYNCT4_TB
A timeout event for Timer B of GPTM4 is triggered
0x2
TIMER_SYNC_SYNCT4_TATB
A timeout event for both Timer A and Timer B of GPTM4 is triggered
0x3
TIMER_SYNC_SYNCT5
Synchronize GPTM Timer 5
10
12
TIMER_SYNC_SYNCT5_NONE
GPTM5 is not affected
0x0
TIMER_SYNC_SYNCT5_TA
A timeout event for Timer A of GPTM5 is triggered
0x1
TIMER_SYNC_SYNCT5_TB
A timeout event for Timer B of GPTM5 is triggered
0x2
TIMER_SYNC_SYNCT5_TATB
A timeout event for both Timer A and Timer B of GPTM5 is triggered
0x3
TIMER_SYNC_SYNCWT0
Synchronize GPTM 32/64-Bit Timer 0
12
14
TIMER_SYNC_SYNCWT0_NONE
GPTM 32/64-Bit Timer 0 is not affected
0x0
TIMER_SYNC_SYNCWT0_TA
A timeout event for Timer A of GPTM 32/64-Bit Timer 0 is triggered
0x1
TIMER_SYNC_SYNCWT0_TB
A timeout event for Timer B of GPTM 32/64-Bit Timer 0 is triggered
0x2
TIMER_SYNC_SYNCWT0_TATB
A timeout event for both Timer A and Timer B of GPTM 32/64-Bit Timer 0 is triggered
0x3
TIMER_SYNC_SYNCWT1
Synchronize GPTM 32/64-Bit Timer 1
14
16
TIMER_SYNC_SYNCWT1_NONE
GPTM 32/64-Bit Timer 1 is not affected
0x0
TIMER_SYNC_SYNCWT1_TA
A timeout event for Timer A of GPTM 32/64-Bit Timer 1 is triggered
0x1
TIMER_SYNC_SYNCWT1_TB
A timeout event for Timer B of GPTM 32/64-Bit Timer 1 is triggered
0x2
TIMER_SYNC_SYNCWT1_TATB
A timeout event for both Timer A and Timer B of GPTM 32/64-Bit Timer 1 is triggered
0x3
TIMER_SYNC_SYNCWT2
Synchronize GPTM 32/64-Bit Timer 2
16
18
TIMER_SYNC_SYNCWT2_NONE
GPTM 32/64-Bit Timer 2 is not affected
0x0
TIMER_SYNC_SYNCWT2_TA
A timeout event for Timer A of GPTM 32/64-Bit Timer 2 is triggered
0x1
TIMER_SYNC_SYNCWT2_TB
A timeout event for Timer B of GPTM 32/64-Bit Timer 2 is triggered
0x2
TIMER_SYNC_SYNCWT2_TATB
A timeout event for both Timer A and Timer B of GPTM 32/64-Bit Timer 2 is triggered
0x3
TIMER_SYNC_SYNCWT3
Synchronize GPTM 32/64-Bit Timer 3
18
20
TIMER_SYNC_SYNCWT3_NONE
GPTM 32/64-Bit Timer 3 is not affected
0x0
TIMER_SYNC_SYNCWT3_TA
A timeout event for Timer A of GPTM 32/64-Bit Timer 3 is triggered
0x1
TIMER_SYNC_SYNCWT3_TB
A timeout event for Timer B of GPTM 32/64-Bit Timer 3 is triggered
0x2
TIMER_SYNC_SYNCWT3_TATB
A timeout event for both Timer A and Timer B of GPTM 32/64-Bit Timer 3 is triggered
0x3
TIMER_SYNC_SYNCWT4
Synchronize GPTM 32/64-Bit Timer 4
20
22
TIMER_SYNC_SYNCWT4_NONE
GPTM 32/64-Bit Timer 4 is not affected
0x0
TIMER_SYNC_SYNCWT4_TA
A timeout event for Timer A of GPTM 32/64-Bit Timer 4 is triggered
0x1
TIMER_SYNC_SYNCWT4_TB
A timeout event for Timer B of GPTM 32/64-Bit Timer 4 is triggered
0x2
TIMER_SYNC_SYNCWT4_TATB
A timeout event for both Timer A and Timer B of GPTM 32/64-Bit Timer 4 is triggered
0x3
TIMER_SYNC_SYNCWT5
Synchronize GPTM 32/64-Bit Timer 5
22
24
TIMER_SYNC_SYNCWT5_NONE
GPTM 32/64-Bit Timer 5 is not affected
0x0
TIMER_SYNC_SYNCWT5_TA
A timeout event for Timer A of GPTM 32/64-Bit Timer 5 is triggered
0x1
TIMER_SYNC_SYNCWT5_TB
A timeout event for Timer B of GPTM 32/64-Bit Timer 5 is triggered
0x2
TIMER_SYNC_SYNCWT5_TATB
A timeout event for both Timer A and Timer B of GPTM 32/64-Bit Timer 5 is triggered
0x3
TIMER0TAILR
GPTM Timer A Interval Load
0x28
read-write
n
0x0
0x0
TIMER0TAMATCHR
GPTM Timer A Match
0x30
read-write
n
0x0
0x0
TIMER0TAMR
GPTM Timer A Mode
0x4
read-write
n
0x0
0x0
TIMER_TAMR_TAAMS
GPTM Timer A Alternate Mode Select
3
4
TIMER_TAMR_TACDIR
GPTM Timer A Count Direction
4
5
TIMER_TAMR_TACMR
GPTM Timer A Capture Mode
2
3
TIMER_TAMR_TAILD
GPTM Timer A Interval Load Write
8
9
TIMER_TAMR_TAMIE
GPTM Timer A Match Interrupt Enable
5
6
TIMER_TAMR_TAMR
GPTM Timer A Mode
0
2
TIMER_TAMR_TAMR_1_SHOT
One-Shot Timer mode
0x1
TIMER_TAMR_TAMR_PERIOD
Periodic Timer mode
0x2
TIMER_TAMR_TAMR_CAP
Capture mode
0x3
TIMER_TAMR_TAMRSU
GPTM Timer A Match Register Update
10
11
TIMER_TAMR_TAPLO
GPTM Timer A PWM Legacy Operation
11
12
TIMER_TAMR_TAPWMIE
GPTM Timer A PWM Interrupt Enable
9
10
TIMER_TAMR_TASNAPS
GPTM Timer A Snap-Shot Mode
7
8
TIMER_TAMR_TAWOT
GPTM Timer A Wait-on-Trigger
6
7
TIMER0TAPMR
GPTM TimerA Prescale Match
0x40
read-write
n
0x0
0x0
TIMER_TAPMR_TAPSMR
GPTM TimerA Prescale Match
0
8
TIMER_TAPMR_TAPSMRH
GPTM Timer A Prescale Match High Byte
8
16
TIMER0TAPR
GPTM Timer A Prescale
0x38
read-write
n
0x0
0x0
TIMER_TAPR_TAPSR
GPTM Timer A Prescale
0
8
TIMER_TAPR_TAPSRH
GPTM Timer A Prescale High Byte
8
16
TIMER0TAPS
GPTM Timer A Prescale Snapshot
0x5C
read-write
n
0x0
0x0
TIMER_TAPS_PSS
GPTM Timer A Prescaler Snapshot
0
16
TIMER0TAPV
GPTM Timer A Prescale Value
0x64
read-write
n
0x0
0x0
TIMER_TAPV_PSV
GPTM Timer A Prescaler Value
0
16
TIMER0TAR
GPTM Timer A
0x48
read-write
n
0x0
0x0
TIMER0TAV
GPTM Timer A Value
0x50
read-write
n
0x0
0x0
TIMER0TBILR
GPTM Timer B Interval Load
0x2C
read-write
n
0x0
0x0
TIMER0TBMATCHR
GPTM Timer B Match
0x34
read-write
n
0x0
0x0
TIMER0TBMR
GPTM Timer B Mode
0x8
read-write
n
0x0
0x0
TIMER_TBMR_TBAMS
GPTM Timer B Alternate Mode Select
3
4
TIMER_TBMR_TBCDIR
GPTM Timer B Count Direction
4
5
TIMER_TBMR_TBCMR
GPTM Timer B Capture Mode
2
3
TIMER_TBMR_TBILD
GPTM Timer B Interval Load Write
8
9
TIMER_TBMR_TBMIE
GPTM Timer B Match Interrupt Enable
5
6
TIMER_TBMR_TBMR
GPTM Timer B Mode
0
2
TIMER_TBMR_TBMR_1_SHOT
One-Shot Timer mode
0x1
TIMER_TBMR_TBMR_PERIOD
Periodic Timer mode
0x2
TIMER_TBMR_TBMR_CAP
Capture mode
0x3
TIMER_TBMR_TBMRSU
GPTM Timer B Match Register Update
10
11
TIMER_TBMR_TBPLO
GPTM Timer B PWM Legacy Operation
11
12
TIMER_TBMR_TBPWMIE
GPTM Timer B PWM Interrupt Enable
9
10
TIMER_TBMR_TBSNAPS
GPTM Timer B Snap-Shot Mode
7
8
TIMER_TBMR_TBWOT
GPTM Timer B Wait-on-Trigger
6
7
TIMER0TBPMR
GPTM TimerB Prescale Match
0x44
read-write
n
0x0
0x0
TIMER_TBPMR_TBPSMR
GPTM TimerB Prescale Match
0
8
TIMER_TBPMR_TBPSMRH
GPTM Timer B Prescale Match High Byte
8
16
TIMER0TBPR
GPTM Timer B Prescale
0x3C
read-write
n
0x0
0x0
TIMER_TBPR_TBPSR
GPTM Timer B Prescale
0
8
TIMER_TBPR_TBPSRH
GPTM Timer B Prescale High Byte
8
16
TIMER0TBPS
GPTM Timer B Prescale Snapshot
0x60
read-write
n
0x0
0x0
TIMER_TBPS_PSS
GPTM Timer A Prescaler Value
0
16
TIMER0TBPV
GPTM Timer B Prescale Value
0x68
read-write
n
0x0
0x0
TIMER_TBPV_PSV
GPTM Timer B Prescaler Value
0
16
TIMER0TBR
GPTM Timer B
0x4C
read-write
n
0x0
0x0
TIMER0TBV
GPTM Timer B Value
0x54
read-write
n
0x0
0x0
TIMER1
Register map for TIMER0 peripheral
TIMER
0x0
0x0
0x1000
registers
n
TIMER1A
21
TIMER1B
22
CFG
GPTM Configuration
0x0
-1
read-write
n
0x0
0x0
TIMER_CFG
GPTM Configuration
0
3
TIMER_CFG_32_BIT_TIMER
For a 16/32-bit timer, this value selects the 32-bit timer configuration
0x0
TIMER_CFG_32_BIT_RTC
For a 16/32-bit timer, this value selects the 32-bit real-time clock (RTC) counter configuration
0x1
TIMER_CFG_16_BIT
For a 16/32-bit timer, this value selects the 16-bit timer configuration
0x4
CTL
GPTM Control
0xC
-1
read-write
n
0x0
0x0
TIMER_CTL_RTCEN
GPTM RTC Stall Enable
4
5
TIMER_CTL_TAEN
GPTM Timer A Enable
0
1
TIMER_CTL_TAEVENT
GPTM Timer A Event Mode
2
4
TIMER_CTL_TAEVENT_POS
Positive edge
0x0
TIMER_CTL_TAEVENT_NEG
Negative edge
0x1
TIMER_CTL_TAEVENT_BOTH
Both edges
0x3
TIMER_CTL_TAOTE
GPTM Timer A Output Trigger Enable
5
6
TIMER_CTL_TAPWML
GPTM Timer A PWM Output Level
6
7
TIMER_CTL_TASTALL
GPTM Timer A Stall Enable
1
2
TIMER_CTL_TBEN
GPTM Timer B Enable
8
9
TIMER_CTL_TBEVENT
GPTM Timer B Event Mode
10
12
TIMER_CTL_TBEVENT_POS
Positive edge
0x0
TIMER_CTL_TBEVENT_NEG
Negative edge
0x1
TIMER_CTL_TBEVENT_BOTH
Both edges
0x3
TIMER_CTL_TBOTE
GPTM Timer B Output Trigger Enable
13
14
TIMER_CTL_TBPWML
GPTM Timer B PWM Output Level
14
15
TIMER_CTL_TBSTALL
GPTM Timer B Stall Enable
9
10
ICR
GPTM Interrupt Clear
0x24
-1
write-only
n
0x0
0x0
TIMER_ICR_CAECINT
GPTM Timer A Capture Mode Event Interrupt Clear
2
3
write-only
TIMER_ICR_CAMCINT
GPTM Timer A Capture Mode Match Interrupt Clear
1
2
write-only
TIMER_ICR_CBECINT
GPTM Timer B Capture Mode Event Interrupt Clear
10
11
write-only
TIMER_ICR_CBMCINT
GPTM Timer B Capture Mode Match Interrupt Clear
9
10
write-only
TIMER_ICR_RTCCINT
GPTM RTC Interrupt Clear
3
4
write-only
TIMER_ICR_TAMCINT
GPTM Timer A Match Interrupt Clear
4
5
write-only
TIMER_ICR_TATOCINT
GPTM Timer A Time-Out Raw Interrupt
0
1
write-only
TIMER_ICR_TBMCINT
GPTM Timer B Match Interrupt Clear
11
12
write-only
TIMER_ICR_TBTOCINT
GPTM Timer B Time-Out Interrupt Clear
8
9
write-only
TIMER_ICR_WUECINT
32/64-Bit Wide GPTM Write Update Error Interrupt Clear
16
17
write-only
IMR
GPTM Interrupt Mask
0x18
-1
read-write
n
0x0
0x0
TIMER_IMR_CAEIM
GPTM Timer A Capture Mode Event Interrupt Mask
2
3
TIMER_IMR_CAMIM
GPTM Timer A Capture Mode Match Interrupt Mask
1
2
TIMER_IMR_CBEIM
GPTM Timer B Capture Mode Event Interrupt Mask
10
11
TIMER_IMR_CBMIM
GPTM Timer B Capture Mode Match Interrupt Mask
9
10
TIMER_IMR_RTCIM
GPTM RTC Interrupt Mask
3
4
TIMER_IMR_TAMIM
GPTM Timer A Match Interrupt Mask
4
5
TIMER_IMR_TATOIM
GPTM Timer A Time-Out Interrupt Mask
0
1
TIMER_IMR_TBMIM
GPTM Timer B Match Interrupt Mask
11
12
TIMER_IMR_TBTOIM
GPTM Timer B Time-Out Interrupt Mask
8
9
TIMER_IMR_WUEIM
32/64-Bit Wide GPTM Write Update Error Interrupt Mask
16
17
MIS
GPTM Masked Interrupt Status
0x20
-1
read-write
n
0x0
0x0
TIMER_MIS_CAEMIS
GPTM Timer A Capture Mode Event Masked Interrupt
2
3
TIMER_MIS_CAMMIS
GPTM Timer A Capture Mode Match Masked Interrupt
1
2
TIMER_MIS_CBEMIS
GPTM Timer B Capture Mode Event Masked Interrupt
10
11
TIMER_MIS_CBMMIS
GPTM Timer B Capture Mode Match Masked Interrupt
9
10
TIMER_MIS_RTCMIS
GPTM RTC Masked Interrupt
3
4
TIMER_MIS_TAMMIS
GPTM Timer A Match Masked Interrupt
4
5
TIMER_MIS_TATOMIS
GPTM Timer A Time-Out Masked Interrupt
0
1
TIMER_MIS_TBMMIS
GPTM Timer B Match Masked Interrupt
11
12
TIMER_MIS_TBTOMIS
GPTM Timer B Time-Out Masked Interrupt
8
9
TIMER_MIS_WUEMIS
32/64-Bit Wide GPTM Write Update Error Masked Interrupt Status
16
17
PP
GPTM Peripheral Properties
0xFC0
-1
read-write
n
0x0
0x0
TIMER_PP_SIZE
Count Size
0
4
TIMER_PP_SIZE_16
Timer A and Timer B counters are 16 bits each with an 8-bit prescale counter
0x0
TIMER_PP_SIZE_32
Timer A and Timer B counters are 32 bits each with a 16-bit prescale counter
0x1
RIS
GPTM Raw Interrupt Status
0x1C
-1
read-write
n
0x0
0x0
TIMER_RIS_CAERIS
GPTM Timer A Capture Mode Event Raw Interrupt
2
3
TIMER_RIS_CAMRIS
GPTM Timer A Capture Mode Match Raw Interrupt
1
2
TIMER_RIS_CBERIS
GPTM Timer B Capture Mode Event Raw Interrupt
10
11
TIMER_RIS_CBMRIS
GPTM Timer B Capture Mode Match Raw Interrupt
9
10
TIMER_RIS_RTCRIS
GPTM RTC Raw Interrupt
3
4
TIMER_RIS_TAMRIS
GPTM Timer A Match Raw Interrupt
4
5
TIMER_RIS_TATORIS
GPTM Timer A Time-Out Raw Interrupt
0
1
TIMER_RIS_TBMRIS
GPTM Timer B Match Raw Interrupt
11
12
TIMER_RIS_TBTORIS
GPTM Timer B Time-Out Raw Interrupt
8
9
TIMER_RIS_WUERIS
32/64-Bit Wide GPTM Write Update Error Raw Interrupt Status
16
17
RTCPD
GPTM RTC Predivide
0x58
-1
read-write
n
0x0
0x0
TIMER_RTCPD_RTCPD
RTC Predivide Counter Value
0
16
SYNC
GPTM Synchronize
0x10
-1
read-write
n
0x0
0x0
TIMER_SYNC_SYNCT0
Synchronize GPTM Timer 0
0
2
TIMER_SYNC_SYNCT0_NONE
GPTM0 is not affected
0x0
TIMER_SYNC_SYNCT0_TA
A timeout event for Timer A of GPTM0 is triggered
0x1
TIMER_SYNC_SYNCT0_TB
A timeout event for Timer B of GPTM0 is triggered
0x2
TIMER_SYNC_SYNCT0_TATB
A timeout event for both Timer A and Timer B of GPTM0 is triggered
0x3
TIMER_SYNC_SYNCT1
Synchronize GPTM Timer 1
2
4
TIMER_SYNC_SYNCT1_NONE
GPTM1 is not affected
0x0
TIMER_SYNC_SYNCT1_TA
A timeout event for Timer A of GPTM1 is triggered
0x1
TIMER_SYNC_SYNCT1_TB
A timeout event for Timer B of GPTM1 is triggered
0x2
TIMER_SYNC_SYNCT1_TATB
A timeout event for both Timer A and Timer B of GPTM1 is triggered
0x3
TIMER_SYNC_SYNCT2
Synchronize GPTM Timer 2
4
6
TIMER_SYNC_SYNCT2_NONE
GPTM2 is not affected
0x0
TIMER_SYNC_SYNCT2_TA
A timeout event for Timer A of GPTM2 is triggered
0x1
TIMER_SYNC_SYNCT2_TB
A timeout event for Timer B of GPTM2 is triggered
0x2
TIMER_SYNC_SYNCT2_TATB
A timeout event for both Timer A and Timer B of GPTM2 is triggered
0x3
TIMER_SYNC_SYNCT3
Synchronize GPTM Timer 3
6
8
TIMER_SYNC_SYNCT3_NONE
GPTM3 is not affected
0x0
TIMER_SYNC_SYNCT3_TA
A timeout event for Timer A of GPTM3 is triggered
0x1
TIMER_SYNC_SYNCT3_TB
A timeout event for Timer B of GPTM3 is triggered
0x2
TIMER_SYNC_SYNCT3_TATB
A timeout event for both Timer A and Timer B of GPTM3 is triggered
0x3
TIMER_SYNC_SYNCT4
Synchronize GPTM Timer 4
8
10
TIMER_SYNC_SYNCT4_NONE
GPTM4 is not affected
0x0
TIMER_SYNC_SYNCT4_TA
A timeout event for Timer A of GPTM4 is triggered
0x1
TIMER_SYNC_SYNCT4_TB
A timeout event for Timer B of GPTM4 is triggered
0x2
TIMER_SYNC_SYNCT4_TATB
A timeout event for both Timer A and Timer B of GPTM4 is triggered
0x3
TIMER_SYNC_SYNCT5
Synchronize GPTM Timer 5
10
12
TIMER_SYNC_SYNCT5_NONE
GPTM5 is not affected
0x0
TIMER_SYNC_SYNCT5_TA
A timeout event for Timer A of GPTM5 is triggered
0x1
TIMER_SYNC_SYNCT5_TB
A timeout event for Timer B of GPTM5 is triggered
0x2
TIMER_SYNC_SYNCT5_TATB
A timeout event for both Timer A and Timer B of GPTM5 is triggered
0x3
TIMER_SYNC_SYNCWT0
Synchronize GPTM 32/64-Bit Timer 0
12
14
TIMER_SYNC_SYNCWT0_NONE
GPTM 32/64-Bit Timer 0 is not affected
0x0
TIMER_SYNC_SYNCWT0_TA
A timeout event for Timer A of GPTM 32/64-Bit Timer 0 is triggered
0x1
TIMER_SYNC_SYNCWT0_TB
A timeout event for Timer B of GPTM 32/64-Bit Timer 0 is triggered
0x2
TIMER_SYNC_SYNCWT0_TATB
A timeout event for both Timer A and Timer B of GPTM 32/64-Bit Timer 0 is triggered
0x3
TIMER_SYNC_SYNCWT1
Synchronize GPTM 32/64-Bit Timer 1
14
16
TIMER_SYNC_SYNCWT1_NONE
GPTM 32/64-Bit Timer 1 is not affected
0x0
TIMER_SYNC_SYNCWT1_TA
A timeout event for Timer A of GPTM 32/64-Bit Timer 1 is triggered
0x1
TIMER_SYNC_SYNCWT1_TB
A timeout event for Timer B of GPTM 32/64-Bit Timer 1 is triggered
0x2
TIMER_SYNC_SYNCWT1_TATB
A timeout event for both Timer A and Timer B of GPTM 32/64-Bit Timer 1 is triggered
0x3
TIMER_SYNC_SYNCWT2
Synchronize GPTM 32/64-Bit Timer 2
16
18
TIMER_SYNC_SYNCWT2_NONE
GPTM 32/64-Bit Timer 2 is not affected
0x0
TIMER_SYNC_SYNCWT2_TA
A timeout event for Timer A of GPTM 32/64-Bit Timer 2 is triggered
0x1
TIMER_SYNC_SYNCWT2_TB
A timeout event for Timer B of GPTM 32/64-Bit Timer 2 is triggered
0x2
TIMER_SYNC_SYNCWT2_TATB
A timeout event for both Timer A and Timer B of GPTM 32/64-Bit Timer 2 is triggered
0x3
TIMER_SYNC_SYNCWT3
Synchronize GPTM 32/64-Bit Timer 3
18
20
TIMER_SYNC_SYNCWT3_NONE
GPTM 32/64-Bit Timer 3 is not affected
0x0
TIMER_SYNC_SYNCWT3_TA
A timeout event for Timer A of GPTM 32/64-Bit Timer 3 is triggered
0x1
TIMER_SYNC_SYNCWT3_TB
A timeout event for Timer B of GPTM 32/64-Bit Timer 3 is triggered
0x2
TIMER_SYNC_SYNCWT3_TATB
A timeout event for both Timer A and Timer B of GPTM 32/64-Bit Timer 3 is triggered
0x3
TIMER_SYNC_SYNCWT4
Synchronize GPTM 32/64-Bit Timer 4
20
22
TIMER_SYNC_SYNCWT4_NONE
GPTM 32/64-Bit Timer 4 is not affected
0x0
TIMER_SYNC_SYNCWT4_TA
A timeout event for Timer A of GPTM 32/64-Bit Timer 4 is triggered
0x1
TIMER_SYNC_SYNCWT4_TB
A timeout event for Timer B of GPTM 32/64-Bit Timer 4 is triggered
0x2
TIMER_SYNC_SYNCWT4_TATB
A timeout event for both Timer A and Timer B of GPTM 32/64-Bit Timer 4 is triggered
0x3
TIMER_SYNC_SYNCWT5
Synchronize GPTM 32/64-Bit Timer 5
22
24
TIMER_SYNC_SYNCWT5_NONE
GPTM 32/64-Bit Timer 5 is not affected
0x0
TIMER_SYNC_SYNCWT5_TA
A timeout event for Timer A of GPTM 32/64-Bit Timer 5 is triggered
0x1
TIMER_SYNC_SYNCWT5_TB
A timeout event for Timer B of GPTM 32/64-Bit Timer 5 is triggered
0x2
TIMER_SYNC_SYNCWT5_TATB
A timeout event for both Timer A and Timer B of GPTM 32/64-Bit Timer 5 is triggered
0x3
TAILR
GPTM Timer A Interval Load
0x28
-1
read-write
n
0x0
0x0
TAMATCHR
GPTM Timer A Match
0x30
-1
read-write
n
0x0
0x0
TAMR
GPTM Timer A Mode
0x4
-1
read-write
n
0x0
0x0
TIMER_TAMR_TAAMS
GPTM Timer A Alternate Mode Select
3
4
TIMER_TAMR_TACDIR
GPTM Timer A Count Direction
4
5
TIMER_TAMR_TACMR
GPTM Timer A Capture Mode
2
3
TIMER_TAMR_TAILD
GPTM Timer A Interval Load Write
8
9
TIMER_TAMR_TAMIE
GPTM Timer A Match Interrupt Enable
5
6
TIMER_TAMR_TAMR
GPTM Timer A Mode
0
2
TIMER_TAMR_TAMR_1_SHOT
One-Shot Timer mode
0x1
TIMER_TAMR_TAMR_PERIOD
Periodic Timer mode
0x2
TIMER_TAMR_TAMR_CAP
Capture mode
0x3
TIMER_TAMR_TAMRSU
GPTM Timer A Match Register Update
10
11
TIMER_TAMR_TAPLO
GPTM Timer A PWM Legacy Operation
11
12
TIMER_TAMR_TAPWMIE
GPTM Timer A PWM Interrupt Enable
9
10
TIMER_TAMR_TASNAPS
GPTM Timer A Snap-Shot Mode
7
8
TIMER_TAMR_TAWOT
GPTM Timer A Wait-on-Trigger
6
7
TAPMR
GPTM TimerA Prescale Match
0x40
-1
read-write
n
0x0
0x0
TIMER_TAPMR_TAPSMR
GPTM TimerA Prescale Match
0
8
TIMER_TAPMR_TAPSMRH
GPTM Timer A Prescale Match High Byte
8
16
TAPR
GPTM Timer A Prescale
0x38
-1
read-write
n
0x0
0x0
TIMER_TAPR_TAPSR
GPTM Timer A Prescale
0
8
TIMER_TAPR_TAPSRH
GPTM Timer A Prescale High Byte
8
16
TAPS
GPTM Timer A Prescale Snapshot
0x5C
-1
read-write
n
0x0
0x0
TIMER_TAPS_PSS
GPTM Timer A Prescaler Snapshot
0
16
TAPV
GPTM Timer A Prescale Value
0x64
-1
read-write
n
0x0
0x0
TIMER_TAPV_PSV
GPTM Timer A Prescaler Value
0
16
TAR
GPTM Timer A
0x48
-1
read-write
n
0x0
0x0
TAV
GPTM Timer A Value
0x50
-1
read-write
n
0x0
0x0
TBILR
GPTM Timer B Interval Load
0x2C
-1
read-write
n
0x0
0x0
TBMATCHR
GPTM Timer B Match
0x34
-1
read-write
n
0x0
0x0
TBMR
GPTM Timer B Mode
0x8
-1
read-write
n
0x0
0x0
TIMER_TBMR_TBAMS
GPTM Timer B Alternate Mode Select
3
4
TIMER_TBMR_TBCDIR
GPTM Timer B Count Direction
4
5
TIMER_TBMR_TBCMR
GPTM Timer B Capture Mode
2
3
TIMER_TBMR_TBILD
GPTM Timer B Interval Load Write
8
9
TIMER_TBMR_TBMIE
GPTM Timer B Match Interrupt Enable
5
6
TIMER_TBMR_TBMR
GPTM Timer B Mode
0
2
TIMER_TBMR_TBMR_1_SHOT
One-Shot Timer mode
0x1
TIMER_TBMR_TBMR_PERIOD
Periodic Timer mode
0x2
TIMER_TBMR_TBMR_CAP
Capture mode
0x3
TIMER_TBMR_TBMRSU
GPTM Timer B Match Register Update
10
11
TIMER_TBMR_TBPLO
GPTM Timer B PWM Legacy Operation
11
12
TIMER_TBMR_TBPWMIE
GPTM Timer B PWM Interrupt Enable
9
10
TIMER_TBMR_TBSNAPS
GPTM Timer B Snap-Shot Mode
7
8
TIMER_TBMR_TBWOT
GPTM Timer B Wait-on-Trigger
6
7
TBPMR
GPTM TimerB Prescale Match
0x44
-1
read-write
n
0x0
0x0
TIMER_TBPMR_TBPSMR
GPTM TimerB Prescale Match
0
8
TIMER_TBPMR_TBPSMRH
GPTM Timer B Prescale Match High Byte
8
16
TBPR
GPTM Timer B Prescale
0x3C
-1
read-write
n
0x0
0x0
TIMER_TBPR_TBPSR
GPTM Timer B Prescale
0
8
TIMER_TBPR_TBPSRH
GPTM Timer B Prescale High Byte
8
16
TBPS
GPTM Timer B Prescale Snapshot
0x60
-1
read-write
n
0x0
0x0
TIMER_TBPS_PSS
GPTM Timer A Prescaler Value
0
16
TBPV
GPTM Timer B Prescale Value
0x68
-1
read-write
n
0x0
0x0
TIMER_TBPV_PSV
GPTM Timer B Prescaler Value
0
16
TBR
GPTM Timer B
0x4C
-1
read-write
n
0x0
0x0
TBV
GPTM Timer B Value
0x54
-1
read-write
n
0x0
0x0
TIMER0CFG
GPTM Configuration
0x0
read-write
n
0x0
0x0
TIMER_CFG
GPTM Configuration
0
3
TIMER_CFG_32_BIT_TIMER
For a 16/32-bit timer, this value selects the 32-bit timer configuration
0x0
TIMER_CFG_32_BIT_RTC
For a 16/32-bit timer, this value selects the 32-bit real-time clock (RTC) counter configuration
0x1
TIMER_CFG_16_BIT
For a 16/32-bit timer, this value selects the 16-bit timer configuration
0x4
TIMER0CTL
GPTM Control
0xC
read-write
n
0x0
0x0
TIMER_CTL_RTCEN
GPTM RTC Stall Enable
4
5
TIMER_CTL_TAEN
GPTM Timer A Enable
0
1
TIMER_CTL_TAEVENT
GPTM Timer A Event Mode
2
4
TIMER_CTL_TAEVENT_POS
Positive edge
0x0
TIMER_CTL_TAEVENT_NEG
Negative edge
0x1
TIMER_CTL_TAEVENT_BOTH
Both edges
0x3
TIMER_CTL_TAOTE
GPTM Timer A Output Trigger Enable
5
6
TIMER_CTL_TAPWML
GPTM Timer A PWM Output Level
6
7
TIMER_CTL_TASTALL
GPTM Timer A Stall Enable
1
2
TIMER_CTL_TBEN
GPTM Timer B Enable
8
9
TIMER_CTL_TBEVENT
GPTM Timer B Event Mode
10
12
TIMER_CTL_TBEVENT_POS
Positive edge
0x0
TIMER_CTL_TBEVENT_NEG
Negative edge
0x1
TIMER_CTL_TBEVENT_BOTH
Both edges
0x3
TIMER_CTL_TBOTE
GPTM Timer B Output Trigger Enable
13
14
TIMER_CTL_TBPWML
GPTM Timer B PWM Output Level
14
15
TIMER_CTL_TBSTALL
GPTM Timer B Stall Enable
9
10
TIMER0ICR
GPTM Interrupt Clear
0x24
write-only
n
0x0
0x0
TIMER_ICR_CAECINT
GPTM Timer A Capture Mode Event Interrupt Clear
2
3
write-only
TIMER_ICR_CAMCINT
GPTM Timer A Capture Mode Match Interrupt Clear
1
2
write-only
TIMER_ICR_CBECINT
GPTM Timer B Capture Mode Event Interrupt Clear
10
11
write-only
TIMER_ICR_CBMCINT
GPTM Timer B Capture Mode Match Interrupt Clear
9
10
write-only
TIMER_ICR_RTCCINT
GPTM RTC Interrupt Clear
3
4
write-only
TIMER_ICR_TAMCINT
GPTM Timer A Match Interrupt Clear
4
5
write-only
TIMER_ICR_TATOCINT
GPTM Timer A Time-Out Raw Interrupt
0
1
write-only
TIMER_ICR_TBMCINT
GPTM Timer B Match Interrupt Clear
11
12
write-only
TIMER_ICR_TBTOCINT
GPTM Timer B Time-Out Interrupt Clear
8
9
write-only
TIMER_ICR_WUECINT
32/64-Bit Wide GPTM Write Update Error Interrupt Clear
16
17
write-only
TIMER0IMR
GPTM Interrupt Mask
0x18
read-write
n
0x0
0x0
TIMER_IMR_CAEIM
GPTM Timer A Capture Mode Event Interrupt Mask
2
3
TIMER_IMR_CAMIM
GPTM Timer A Capture Mode Match Interrupt Mask
1
2
TIMER_IMR_CBEIM
GPTM Timer B Capture Mode Event Interrupt Mask
10
11
TIMER_IMR_CBMIM
GPTM Timer B Capture Mode Match Interrupt Mask
9
10
TIMER_IMR_RTCIM
GPTM RTC Interrupt Mask
3
4
TIMER_IMR_TAMIM
GPTM Timer A Match Interrupt Mask
4
5
TIMER_IMR_TATOIM
GPTM Timer A Time-Out Interrupt Mask
0
1
TIMER_IMR_TBMIM
GPTM Timer B Match Interrupt Mask
11
12
TIMER_IMR_TBTOIM
GPTM Timer B Time-Out Interrupt Mask
8
9
TIMER_IMR_WUEIM
32/64-Bit Wide GPTM Write Update Error Interrupt Mask
16
17
TIMER0MIS
GPTM Masked Interrupt Status
0x20
read-write
n
0x0
0x0
TIMER_MIS_CAEMIS
GPTM Timer A Capture Mode Event Masked Interrupt
2
3
TIMER_MIS_CAMMIS
GPTM Timer A Capture Mode Match Masked Interrupt
1
2
TIMER_MIS_CBEMIS
GPTM Timer B Capture Mode Event Masked Interrupt
10
11
TIMER_MIS_CBMMIS
GPTM Timer B Capture Mode Match Masked Interrupt
9
10
TIMER_MIS_RTCMIS
GPTM RTC Masked Interrupt
3
4
TIMER_MIS_TAMMIS
GPTM Timer A Match Masked Interrupt
4
5
TIMER_MIS_TATOMIS
GPTM Timer A Time-Out Masked Interrupt
0
1
TIMER_MIS_TBMMIS
GPTM Timer B Match Masked Interrupt
11
12
TIMER_MIS_TBTOMIS
GPTM Timer B Time-Out Masked Interrupt
8
9
TIMER_MIS_WUEMIS
32/64-Bit Wide GPTM Write Update Error Masked Interrupt Status
16
17
TIMER0PP
GPTM Peripheral Properties
0xFC0
read-write
n
0x0
0x0
TIMER_PP_SIZE
Count Size
0
4
TIMER_PP_SIZE_16
Timer A and Timer B counters are 16 bits each with an 8-bit prescale counter
0x0
TIMER_PP_SIZE_32
Timer A and Timer B counters are 32 bits each with a 16-bit prescale counter
0x1
TIMER0RIS
GPTM Raw Interrupt Status
0x1C
read-write
n
0x0
0x0
TIMER_RIS_CAERIS
GPTM Timer A Capture Mode Event Raw Interrupt
2
3
TIMER_RIS_CAMRIS
GPTM Timer A Capture Mode Match Raw Interrupt
1
2
TIMER_RIS_CBERIS
GPTM Timer B Capture Mode Event Raw Interrupt
10
11
TIMER_RIS_CBMRIS
GPTM Timer B Capture Mode Match Raw Interrupt
9
10
TIMER_RIS_RTCRIS
GPTM RTC Raw Interrupt
3
4
TIMER_RIS_TAMRIS
GPTM Timer A Match Raw Interrupt
4
5
TIMER_RIS_TATORIS
GPTM Timer A Time-Out Raw Interrupt
0
1
TIMER_RIS_TBMRIS
GPTM Timer B Match Raw Interrupt
11
12
TIMER_RIS_TBTORIS
GPTM Timer B Time-Out Raw Interrupt
8
9
TIMER_RIS_WUERIS
32/64-Bit Wide GPTM Write Update Error Raw Interrupt Status
16
17
TIMER0RTCPD
GPTM RTC Predivide
0x58
read-write
n
0x0
0x0
TIMER_RTCPD_RTCPD
RTC Predivide Counter Value
0
16
TIMER0SYNC
GPTM Synchronize
0x10
read-write
n
0x0
0x0
TIMER_SYNC_SYNCT0
Synchronize GPTM Timer 0
0
2
TIMER_SYNC_SYNCT0_NONE
GPTM0 is not affected
0x0
TIMER_SYNC_SYNCT0_TA
A timeout event for Timer A of GPTM0 is triggered
0x1
TIMER_SYNC_SYNCT0_TB
A timeout event for Timer B of GPTM0 is triggered
0x2
TIMER_SYNC_SYNCT0_TATB
A timeout event for both Timer A and Timer B of GPTM0 is triggered
0x3
TIMER_SYNC_SYNCT1
Synchronize GPTM Timer 1
2
4
TIMER_SYNC_SYNCT1_NONE
GPTM1 is not affected
0x0
TIMER_SYNC_SYNCT1_TA
A timeout event for Timer A of GPTM1 is triggered
0x1
TIMER_SYNC_SYNCT1_TB
A timeout event for Timer B of GPTM1 is triggered
0x2
TIMER_SYNC_SYNCT1_TATB
A timeout event for both Timer A and Timer B of GPTM1 is triggered
0x3
TIMER_SYNC_SYNCT2
Synchronize GPTM Timer 2
4
6
TIMER_SYNC_SYNCT2_NONE
GPTM2 is not affected
0x0
TIMER_SYNC_SYNCT2_TA
A timeout event for Timer A of GPTM2 is triggered
0x1
TIMER_SYNC_SYNCT2_TB
A timeout event for Timer B of GPTM2 is triggered
0x2
TIMER_SYNC_SYNCT2_TATB
A timeout event for both Timer A and Timer B of GPTM2 is triggered
0x3
TIMER_SYNC_SYNCT3
Synchronize GPTM Timer 3
6
8
TIMER_SYNC_SYNCT3_NONE
GPTM3 is not affected
0x0
TIMER_SYNC_SYNCT3_TA
A timeout event for Timer A of GPTM3 is triggered
0x1
TIMER_SYNC_SYNCT3_TB
A timeout event for Timer B of GPTM3 is triggered
0x2
TIMER_SYNC_SYNCT3_TATB
A timeout event for both Timer A and Timer B of GPTM3 is triggered
0x3
TIMER_SYNC_SYNCT4
Synchronize GPTM Timer 4
8
10
TIMER_SYNC_SYNCT4_NONE
GPTM4 is not affected
0x0
TIMER_SYNC_SYNCT4_TA
A timeout event for Timer A of GPTM4 is triggered
0x1
TIMER_SYNC_SYNCT4_TB
A timeout event for Timer B of GPTM4 is triggered
0x2
TIMER_SYNC_SYNCT4_TATB
A timeout event for both Timer A and Timer B of GPTM4 is triggered
0x3
TIMER_SYNC_SYNCT5
Synchronize GPTM Timer 5
10
12
TIMER_SYNC_SYNCT5_NONE
GPTM5 is not affected
0x0
TIMER_SYNC_SYNCT5_TA
A timeout event for Timer A of GPTM5 is triggered
0x1
TIMER_SYNC_SYNCT5_TB
A timeout event for Timer B of GPTM5 is triggered
0x2
TIMER_SYNC_SYNCT5_TATB
A timeout event for both Timer A and Timer B of GPTM5 is triggered
0x3
TIMER_SYNC_SYNCWT0
Synchronize GPTM 32/64-Bit Timer 0
12
14
TIMER_SYNC_SYNCWT0_NONE
GPTM 32/64-Bit Timer 0 is not affected
0x0
TIMER_SYNC_SYNCWT0_TA
A timeout event for Timer A of GPTM 32/64-Bit Timer 0 is triggered
0x1
TIMER_SYNC_SYNCWT0_TB
A timeout event for Timer B of GPTM 32/64-Bit Timer 0 is triggered
0x2
TIMER_SYNC_SYNCWT0_TATB
A timeout event for both Timer A and Timer B of GPTM 32/64-Bit Timer 0 is triggered
0x3
TIMER_SYNC_SYNCWT1
Synchronize GPTM 32/64-Bit Timer 1
14
16
TIMER_SYNC_SYNCWT1_NONE
GPTM 32/64-Bit Timer 1 is not affected
0x0
TIMER_SYNC_SYNCWT1_TA
A timeout event for Timer A of GPTM 32/64-Bit Timer 1 is triggered
0x1
TIMER_SYNC_SYNCWT1_TB
A timeout event for Timer B of GPTM 32/64-Bit Timer 1 is triggered
0x2
TIMER_SYNC_SYNCWT1_TATB
A timeout event for both Timer A and Timer B of GPTM 32/64-Bit Timer 1 is triggered
0x3
TIMER_SYNC_SYNCWT2
Synchronize GPTM 32/64-Bit Timer 2
16
18
TIMER_SYNC_SYNCWT2_NONE
GPTM 32/64-Bit Timer 2 is not affected
0x0
TIMER_SYNC_SYNCWT2_TA
A timeout event for Timer A of GPTM 32/64-Bit Timer 2 is triggered
0x1
TIMER_SYNC_SYNCWT2_TB
A timeout event for Timer B of GPTM 32/64-Bit Timer 2 is triggered
0x2
TIMER_SYNC_SYNCWT2_TATB
A timeout event for both Timer A and Timer B of GPTM 32/64-Bit Timer 2 is triggered
0x3
TIMER_SYNC_SYNCWT3
Synchronize GPTM 32/64-Bit Timer 3
18
20
TIMER_SYNC_SYNCWT3_NONE
GPTM 32/64-Bit Timer 3 is not affected
0x0
TIMER_SYNC_SYNCWT3_TA
A timeout event for Timer A of GPTM 32/64-Bit Timer 3 is triggered
0x1
TIMER_SYNC_SYNCWT3_TB
A timeout event for Timer B of GPTM 32/64-Bit Timer 3 is triggered
0x2
TIMER_SYNC_SYNCWT3_TATB
A timeout event for both Timer A and Timer B of GPTM 32/64-Bit Timer 3 is triggered
0x3
TIMER_SYNC_SYNCWT4
Synchronize GPTM 32/64-Bit Timer 4
20
22
TIMER_SYNC_SYNCWT4_NONE
GPTM 32/64-Bit Timer 4 is not affected
0x0
TIMER_SYNC_SYNCWT4_TA
A timeout event for Timer A of GPTM 32/64-Bit Timer 4 is triggered
0x1
TIMER_SYNC_SYNCWT4_TB
A timeout event for Timer B of GPTM 32/64-Bit Timer 4 is triggered
0x2
TIMER_SYNC_SYNCWT4_TATB
A timeout event for both Timer A and Timer B of GPTM 32/64-Bit Timer 4 is triggered
0x3
TIMER_SYNC_SYNCWT5
Synchronize GPTM 32/64-Bit Timer 5
22
24
TIMER_SYNC_SYNCWT5_NONE
GPTM 32/64-Bit Timer 5 is not affected
0x0
TIMER_SYNC_SYNCWT5_TA
A timeout event for Timer A of GPTM 32/64-Bit Timer 5 is triggered
0x1
TIMER_SYNC_SYNCWT5_TB
A timeout event for Timer B of GPTM 32/64-Bit Timer 5 is triggered
0x2
TIMER_SYNC_SYNCWT5_TATB
A timeout event for both Timer A and Timer B of GPTM 32/64-Bit Timer 5 is triggered
0x3
TIMER0TAILR
GPTM Timer A Interval Load
0x28
read-write
n
0x0
0x0
TIMER0TAMATCHR
GPTM Timer A Match
0x30
read-write
n
0x0
0x0
TIMER0TAMR
GPTM Timer A Mode
0x4
read-write
n
0x0
0x0
TIMER_TAMR_TAAMS
GPTM Timer A Alternate Mode Select
3
4
TIMER_TAMR_TACDIR
GPTM Timer A Count Direction
4
5
TIMER_TAMR_TACMR
GPTM Timer A Capture Mode
2
3
TIMER_TAMR_TAILD
GPTM Timer A Interval Load Write
8
9
TIMER_TAMR_TAMIE
GPTM Timer A Match Interrupt Enable
5
6
TIMER_TAMR_TAMR
GPTM Timer A Mode
0
2
TIMER_TAMR_TAMR_1_SHOT
One-Shot Timer mode
0x1
TIMER_TAMR_TAMR_PERIOD
Periodic Timer mode
0x2
TIMER_TAMR_TAMR_CAP
Capture mode
0x3
TIMER_TAMR_TAMRSU
GPTM Timer A Match Register Update
10
11
TIMER_TAMR_TAPLO
GPTM Timer A PWM Legacy Operation
11
12
TIMER_TAMR_TAPWMIE
GPTM Timer A PWM Interrupt Enable
9
10
TIMER_TAMR_TASNAPS
GPTM Timer A Snap-Shot Mode
7
8
TIMER_TAMR_TAWOT
GPTM Timer A Wait-on-Trigger
6
7
TIMER0TAPMR
GPTM TimerA Prescale Match
0x40
read-write
n
0x0
0x0
TIMER_TAPMR_TAPSMR
GPTM TimerA Prescale Match
0
8
TIMER_TAPMR_TAPSMRH
GPTM Timer A Prescale Match High Byte
8
16
TIMER0TAPR
GPTM Timer A Prescale
0x38
read-write
n
0x0
0x0
TIMER_TAPR_TAPSR
GPTM Timer A Prescale
0
8
TIMER_TAPR_TAPSRH
GPTM Timer A Prescale High Byte
8
16
TIMER0TAPS
GPTM Timer A Prescale Snapshot
0x5C
read-write
n
0x0
0x0
TIMER_TAPS_PSS
GPTM Timer A Prescaler Snapshot
0
16
TIMER0TAPV
GPTM Timer A Prescale Value
0x64
read-write
n
0x0
0x0
TIMER_TAPV_PSV
GPTM Timer A Prescaler Value
0
16
TIMER0TAR
GPTM Timer A
0x48
read-write
n
0x0
0x0
TIMER0TAV
GPTM Timer A Value
0x50
read-write
n
0x0
0x0
TIMER0TBILR
GPTM Timer B Interval Load
0x2C
read-write
n
0x0
0x0
TIMER0TBMATCHR
GPTM Timer B Match
0x34
read-write
n
0x0
0x0
TIMER0TBMR
GPTM Timer B Mode
0x8
read-write
n
0x0
0x0
TIMER_TBMR_TBAMS
GPTM Timer B Alternate Mode Select
3
4
TIMER_TBMR_TBCDIR
GPTM Timer B Count Direction
4
5
TIMER_TBMR_TBCMR
GPTM Timer B Capture Mode
2
3
TIMER_TBMR_TBILD
GPTM Timer B Interval Load Write
8
9
TIMER_TBMR_TBMIE
GPTM Timer B Match Interrupt Enable
5
6
TIMER_TBMR_TBMR
GPTM Timer B Mode
0
2
TIMER_TBMR_TBMR_1_SHOT
One-Shot Timer mode
0x1
TIMER_TBMR_TBMR_PERIOD
Periodic Timer mode
0x2
TIMER_TBMR_TBMR_CAP
Capture mode
0x3
TIMER_TBMR_TBMRSU
GPTM Timer B Match Register Update
10
11
TIMER_TBMR_TBPLO
GPTM Timer B PWM Legacy Operation
11
12
TIMER_TBMR_TBPWMIE
GPTM Timer B PWM Interrupt Enable
9
10
TIMER_TBMR_TBSNAPS
GPTM Timer B Snap-Shot Mode
7
8
TIMER_TBMR_TBWOT
GPTM Timer B Wait-on-Trigger
6
7
TIMER0TBPMR
GPTM TimerB Prescale Match
0x44
read-write
n
0x0
0x0
TIMER_TBPMR_TBPSMR
GPTM TimerB Prescale Match
0
8
TIMER_TBPMR_TBPSMRH
GPTM Timer B Prescale Match High Byte
8
16
TIMER0TBPR
GPTM Timer B Prescale
0x3C
read-write
n
0x0
0x0
TIMER_TBPR_TBPSR
GPTM Timer B Prescale
0
8
TIMER_TBPR_TBPSRH
GPTM Timer B Prescale High Byte
8
16
TIMER0TBPS
GPTM Timer B Prescale Snapshot
0x60
read-write
n
0x0
0x0
TIMER_TBPS_PSS
GPTM Timer A Prescaler Value
0
16
TIMER0TBPV
GPTM Timer B Prescale Value
0x68
read-write
n
0x0
0x0
TIMER_TBPV_PSV
GPTM Timer B Prescaler Value
0
16
TIMER0TBR
GPTM Timer B
0x4C
read-write
n
0x0
0x0
TIMER0TBV
GPTM Timer B Value
0x54
read-write
n
0x0
0x0
TIMER2
Register map for TIMER0 peripheral
TIMER
0x0
0x0
0x1000
registers
n
TIMER2A
23
TIMER2B
24
CFG
GPTM Configuration
0x0
-1
read-write
n
0x0
0x0
TIMER_CFG
GPTM Configuration
0
3
TIMER_CFG_32_BIT_TIMER
For a 16/32-bit timer, this value selects the 32-bit timer configuration
0x0
TIMER_CFG_32_BIT_RTC
For a 16/32-bit timer, this value selects the 32-bit real-time clock (RTC) counter configuration
0x1
TIMER_CFG_16_BIT
For a 16/32-bit timer, this value selects the 16-bit timer configuration
0x4
CTL
GPTM Control
0xC
-1
read-write
n
0x0
0x0
TIMER_CTL_RTCEN
GPTM RTC Stall Enable
4
5
TIMER_CTL_TAEN
GPTM Timer A Enable
0
1
TIMER_CTL_TAEVENT
GPTM Timer A Event Mode
2
4
TIMER_CTL_TAEVENT_POS
Positive edge
0x0
TIMER_CTL_TAEVENT_NEG
Negative edge
0x1
TIMER_CTL_TAEVENT_BOTH
Both edges
0x3
TIMER_CTL_TAOTE
GPTM Timer A Output Trigger Enable
5
6
TIMER_CTL_TAPWML
GPTM Timer A PWM Output Level
6
7
TIMER_CTL_TASTALL
GPTM Timer A Stall Enable
1
2
TIMER_CTL_TBEN
GPTM Timer B Enable
8
9
TIMER_CTL_TBEVENT
GPTM Timer B Event Mode
10
12
TIMER_CTL_TBEVENT_POS
Positive edge
0x0
TIMER_CTL_TBEVENT_NEG
Negative edge
0x1
TIMER_CTL_TBEVENT_BOTH
Both edges
0x3
TIMER_CTL_TBOTE
GPTM Timer B Output Trigger Enable
13
14
TIMER_CTL_TBPWML
GPTM Timer B PWM Output Level
14
15
TIMER_CTL_TBSTALL
GPTM Timer B Stall Enable
9
10
ICR
GPTM Interrupt Clear
0x24
-1
write-only
n
0x0
0x0
TIMER_ICR_CAECINT
GPTM Timer A Capture Mode Event Interrupt Clear
2
3
write-only
TIMER_ICR_CAMCINT
GPTM Timer A Capture Mode Match Interrupt Clear
1
2
write-only
TIMER_ICR_CBECINT
GPTM Timer B Capture Mode Event Interrupt Clear
10
11
write-only
TIMER_ICR_CBMCINT
GPTM Timer B Capture Mode Match Interrupt Clear
9
10
write-only
TIMER_ICR_RTCCINT
GPTM RTC Interrupt Clear
3
4
write-only
TIMER_ICR_TAMCINT
GPTM Timer A Match Interrupt Clear
4
5
write-only
TIMER_ICR_TATOCINT
GPTM Timer A Time-Out Raw Interrupt
0
1
write-only
TIMER_ICR_TBMCINT
GPTM Timer B Match Interrupt Clear
11
12
write-only
TIMER_ICR_TBTOCINT
GPTM Timer B Time-Out Interrupt Clear
8
9
write-only
TIMER_ICR_WUECINT
32/64-Bit Wide GPTM Write Update Error Interrupt Clear
16
17
write-only
IMR
GPTM Interrupt Mask
0x18
-1
read-write
n
0x0
0x0
TIMER_IMR_CAEIM
GPTM Timer A Capture Mode Event Interrupt Mask
2
3
TIMER_IMR_CAMIM
GPTM Timer A Capture Mode Match Interrupt Mask
1
2
TIMER_IMR_CBEIM
GPTM Timer B Capture Mode Event Interrupt Mask
10
11
TIMER_IMR_CBMIM
GPTM Timer B Capture Mode Match Interrupt Mask
9
10
TIMER_IMR_RTCIM
GPTM RTC Interrupt Mask
3
4
TIMER_IMR_TAMIM
GPTM Timer A Match Interrupt Mask
4
5
TIMER_IMR_TATOIM
GPTM Timer A Time-Out Interrupt Mask
0
1
TIMER_IMR_TBMIM
GPTM Timer B Match Interrupt Mask
11
12
TIMER_IMR_TBTOIM
GPTM Timer B Time-Out Interrupt Mask
8
9
TIMER_IMR_WUEIM
32/64-Bit Wide GPTM Write Update Error Interrupt Mask
16
17
MIS
GPTM Masked Interrupt Status
0x20
-1
read-write
n
0x0
0x0
TIMER_MIS_CAEMIS
GPTM Timer A Capture Mode Event Masked Interrupt
2
3
TIMER_MIS_CAMMIS
GPTM Timer A Capture Mode Match Masked Interrupt
1
2
TIMER_MIS_CBEMIS
GPTM Timer B Capture Mode Event Masked Interrupt
10
11
TIMER_MIS_CBMMIS
GPTM Timer B Capture Mode Match Masked Interrupt
9
10
TIMER_MIS_RTCMIS
GPTM RTC Masked Interrupt
3
4
TIMER_MIS_TAMMIS
GPTM Timer A Match Masked Interrupt
4
5
TIMER_MIS_TATOMIS
GPTM Timer A Time-Out Masked Interrupt
0
1
TIMER_MIS_TBMMIS
GPTM Timer B Match Masked Interrupt
11
12
TIMER_MIS_TBTOMIS
GPTM Timer B Time-Out Masked Interrupt
8
9
TIMER_MIS_WUEMIS
32/64-Bit Wide GPTM Write Update Error Masked Interrupt Status
16
17
PP
GPTM Peripheral Properties
0xFC0
-1
read-write
n
0x0
0x0
TIMER_PP_SIZE
Count Size
0
4
TIMER_PP_SIZE_16
Timer A and Timer B counters are 16 bits each with an 8-bit prescale counter
0x0
TIMER_PP_SIZE_32
Timer A and Timer B counters are 32 bits each with a 16-bit prescale counter
0x1
RIS
GPTM Raw Interrupt Status
0x1C
-1
read-write
n
0x0
0x0
TIMER_RIS_CAERIS
GPTM Timer A Capture Mode Event Raw Interrupt
2
3
TIMER_RIS_CAMRIS
GPTM Timer A Capture Mode Match Raw Interrupt
1
2
TIMER_RIS_CBERIS
GPTM Timer B Capture Mode Event Raw Interrupt
10
11
TIMER_RIS_CBMRIS
GPTM Timer B Capture Mode Match Raw Interrupt
9
10
TIMER_RIS_RTCRIS
GPTM RTC Raw Interrupt
3
4
TIMER_RIS_TAMRIS
GPTM Timer A Match Raw Interrupt
4
5
TIMER_RIS_TATORIS
GPTM Timer A Time-Out Raw Interrupt
0
1
TIMER_RIS_TBMRIS
GPTM Timer B Match Raw Interrupt
11
12
TIMER_RIS_TBTORIS
GPTM Timer B Time-Out Raw Interrupt
8
9
TIMER_RIS_WUERIS
32/64-Bit Wide GPTM Write Update Error Raw Interrupt Status
16
17
RTCPD
GPTM RTC Predivide
0x58
-1
read-write
n
0x0
0x0
TIMER_RTCPD_RTCPD
RTC Predivide Counter Value
0
16
SYNC
GPTM Synchronize
0x10
-1
read-write
n
0x0
0x0
TIMER_SYNC_SYNCT0
Synchronize GPTM Timer 0
0
2
TIMER_SYNC_SYNCT0_NONE
GPTM0 is not affected
0x0
TIMER_SYNC_SYNCT0_TA
A timeout event for Timer A of GPTM0 is triggered
0x1
TIMER_SYNC_SYNCT0_TB
A timeout event for Timer B of GPTM0 is triggered
0x2
TIMER_SYNC_SYNCT0_TATB
A timeout event for both Timer A and Timer B of GPTM0 is triggered
0x3
TIMER_SYNC_SYNCT1
Synchronize GPTM Timer 1
2
4
TIMER_SYNC_SYNCT1_NONE
GPTM1 is not affected
0x0
TIMER_SYNC_SYNCT1_TA
A timeout event for Timer A of GPTM1 is triggered
0x1
TIMER_SYNC_SYNCT1_TB
A timeout event for Timer B of GPTM1 is triggered
0x2
TIMER_SYNC_SYNCT1_TATB
A timeout event for both Timer A and Timer B of GPTM1 is triggered
0x3
TIMER_SYNC_SYNCT2
Synchronize GPTM Timer 2
4
6
TIMER_SYNC_SYNCT2_NONE
GPTM2 is not affected
0x0
TIMER_SYNC_SYNCT2_TA
A timeout event for Timer A of GPTM2 is triggered
0x1
TIMER_SYNC_SYNCT2_TB
A timeout event for Timer B of GPTM2 is triggered
0x2
TIMER_SYNC_SYNCT2_TATB
A timeout event for both Timer A and Timer B of GPTM2 is triggered
0x3
TIMER_SYNC_SYNCT3
Synchronize GPTM Timer 3
6
8
TIMER_SYNC_SYNCT3_NONE
GPTM3 is not affected
0x0
TIMER_SYNC_SYNCT3_TA
A timeout event for Timer A of GPTM3 is triggered
0x1
TIMER_SYNC_SYNCT3_TB
A timeout event for Timer B of GPTM3 is triggered
0x2
TIMER_SYNC_SYNCT3_TATB
A timeout event for both Timer A and Timer B of GPTM3 is triggered
0x3
TIMER_SYNC_SYNCT4
Synchronize GPTM Timer 4
8
10
TIMER_SYNC_SYNCT4_NONE
GPTM4 is not affected
0x0
TIMER_SYNC_SYNCT4_TA
A timeout event for Timer A of GPTM4 is triggered
0x1
TIMER_SYNC_SYNCT4_TB
A timeout event for Timer B of GPTM4 is triggered
0x2
TIMER_SYNC_SYNCT4_TATB
A timeout event for both Timer A and Timer B of GPTM4 is triggered
0x3
TIMER_SYNC_SYNCT5
Synchronize GPTM Timer 5
10
12
TIMER_SYNC_SYNCT5_NONE
GPTM5 is not affected
0x0
TIMER_SYNC_SYNCT5_TA
A timeout event for Timer A of GPTM5 is triggered
0x1
TIMER_SYNC_SYNCT5_TB
A timeout event for Timer B of GPTM5 is triggered
0x2
TIMER_SYNC_SYNCT5_TATB
A timeout event for both Timer A and Timer B of GPTM5 is triggered
0x3
TIMER_SYNC_SYNCWT0
Synchronize GPTM 32/64-Bit Timer 0
12
14
TIMER_SYNC_SYNCWT0_NONE
GPTM 32/64-Bit Timer 0 is not affected
0x0
TIMER_SYNC_SYNCWT0_TA
A timeout event for Timer A of GPTM 32/64-Bit Timer 0 is triggered
0x1
TIMER_SYNC_SYNCWT0_TB
A timeout event for Timer B of GPTM 32/64-Bit Timer 0 is triggered
0x2
TIMER_SYNC_SYNCWT0_TATB
A timeout event for both Timer A and Timer B of GPTM 32/64-Bit Timer 0 is triggered
0x3
TIMER_SYNC_SYNCWT1
Synchronize GPTM 32/64-Bit Timer 1
14
16
TIMER_SYNC_SYNCWT1_NONE
GPTM 32/64-Bit Timer 1 is not affected
0x0
TIMER_SYNC_SYNCWT1_TA
A timeout event for Timer A of GPTM 32/64-Bit Timer 1 is triggered
0x1
TIMER_SYNC_SYNCWT1_TB
A timeout event for Timer B of GPTM 32/64-Bit Timer 1 is triggered
0x2
TIMER_SYNC_SYNCWT1_TATB
A timeout event for both Timer A and Timer B of GPTM 32/64-Bit Timer 1 is triggered
0x3
TIMER_SYNC_SYNCWT2
Synchronize GPTM 32/64-Bit Timer 2
16
18
TIMER_SYNC_SYNCWT2_NONE
GPTM 32/64-Bit Timer 2 is not affected
0x0
TIMER_SYNC_SYNCWT2_TA
A timeout event for Timer A of GPTM 32/64-Bit Timer 2 is triggered
0x1
TIMER_SYNC_SYNCWT2_TB
A timeout event for Timer B of GPTM 32/64-Bit Timer 2 is triggered
0x2
TIMER_SYNC_SYNCWT2_TATB
A timeout event for both Timer A and Timer B of GPTM 32/64-Bit Timer 2 is triggered
0x3
TIMER_SYNC_SYNCWT3
Synchronize GPTM 32/64-Bit Timer 3
18
20
TIMER_SYNC_SYNCWT3_NONE
GPTM 32/64-Bit Timer 3 is not affected
0x0
TIMER_SYNC_SYNCWT3_TA
A timeout event for Timer A of GPTM 32/64-Bit Timer 3 is triggered
0x1
TIMER_SYNC_SYNCWT3_TB
A timeout event for Timer B of GPTM 32/64-Bit Timer 3 is triggered
0x2
TIMER_SYNC_SYNCWT3_TATB
A timeout event for both Timer A and Timer B of GPTM 32/64-Bit Timer 3 is triggered
0x3
TIMER_SYNC_SYNCWT4
Synchronize GPTM 32/64-Bit Timer 4
20
22
TIMER_SYNC_SYNCWT4_NONE
GPTM 32/64-Bit Timer 4 is not affected
0x0
TIMER_SYNC_SYNCWT4_TA
A timeout event for Timer A of GPTM 32/64-Bit Timer 4 is triggered
0x1
TIMER_SYNC_SYNCWT4_TB
A timeout event for Timer B of GPTM 32/64-Bit Timer 4 is triggered
0x2
TIMER_SYNC_SYNCWT4_TATB
A timeout event for both Timer A and Timer B of GPTM 32/64-Bit Timer 4 is triggered
0x3
TIMER_SYNC_SYNCWT5
Synchronize GPTM 32/64-Bit Timer 5
22
24
TIMER_SYNC_SYNCWT5_NONE
GPTM 32/64-Bit Timer 5 is not affected
0x0
TIMER_SYNC_SYNCWT5_TA
A timeout event for Timer A of GPTM 32/64-Bit Timer 5 is triggered
0x1
TIMER_SYNC_SYNCWT5_TB
A timeout event for Timer B of GPTM 32/64-Bit Timer 5 is triggered
0x2
TIMER_SYNC_SYNCWT5_TATB
A timeout event for both Timer A and Timer B of GPTM 32/64-Bit Timer 5 is triggered
0x3
TAILR
GPTM Timer A Interval Load
0x28
-1
read-write
n
0x0
0x0
TAMATCHR
GPTM Timer A Match
0x30
-1
read-write
n
0x0
0x0
TAMR
GPTM Timer A Mode
0x4
-1
read-write
n
0x0
0x0
TIMER_TAMR_TAAMS
GPTM Timer A Alternate Mode Select
3
4
TIMER_TAMR_TACDIR
GPTM Timer A Count Direction
4
5
TIMER_TAMR_TACMR
GPTM Timer A Capture Mode
2
3
TIMER_TAMR_TAILD
GPTM Timer A Interval Load Write
8
9
TIMER_TAMR_TAMIE
GPTM Timer A Match Interrupt Enable
5
6
TIMER_TAMR_TAMR
GPTM Timer A Mode
0
2
TIMER_TAMR_TAMR_1_SHOT
One-Shot Timer mode
0x1
TIMER_TAMR_TAMR_PERIOD
Periodic Timer mode
0x2
TIMER_TAMR_TAMR_CAP
Capture mode
0x3
TIMER_TAMR_TAMRSU
GPTM Timer A Match Register Update
10
11
TIMER_TAMR_TAPLO
GPTM Timer A PWM Legacy Operation
11
12
TIMER_TAMR_TAPWMIE
GPTM Timer A PWM Interrupt Enable
9
10
TIMER_TAMR_TASNAPS
GPTM Timer A Snap-Shot Mode
7
8
TIMER_TAMR_TAWOT
GPTM Timer A Wait-on-Trigger
6
7
TAPMR
GPTM TimerA Prescale Match
0x40
-1
read-write
n
0x0
0x0
TIMER_TAPMR_TAPSMR
GPTM TimerA Prescale Match
0
8
TIMER_TAPMR_TAPSMRH
GPTM Timer A Prescale Match High Byte
8
16
TAPR
GPTM Timer A Prescale
0x38
-1
read-write
n
0x0
0x0
TIMER_TAPR_TAPSR
GPTM Timer A Prescale
0
8
TIMER_TAPR_TAPSRH
GPTM Timer A Prescale High Byte
8
16
TAPS
GPTM Timer A Prescale Snapshot
0x5C
-1
read-write
n
0x0
0x0
TIMER_TAPS_PSS
GPTM Timer A Prescaler Snapshot
0
16
TAPV
GPTM Timer A Prescale Value
0x64
-1
read-write
n
0x0
0x0
TIMER_TAPV_PSV
GPTM Timer A Prescaler Value
0
16
TAR
GPTM Timer A
0x48
-1
read-write
n
0x0
0x0
TAV
GPTM Timer A Value
0x50
-1
read-write
n
0x0
0x0
TBILR
GPTM Timer B Interval Load
0x2C
-1
read-write
n
0x0
0x0
TBMATCHR
GPTM Timer B Match
0x34
-1
read-write
n
0x0
0x0
TBMR
GPTM Timer B Mode
0x8
-1
read-write
n
0x0
0x0
TIMER_TBMR_TBAMS
GPTM Timer B Alternate Mode Select
3
4
TIMER_TBMR_TBCDIR
GPTM Timer B Count Direction
4
5
TIMER_TBMR_TBCMR
GPTM Timer B Capture Mode
2
3
TIMER_TBMR_TBILD
GPTM Timer B Interval Load Write
8
9
TIMER_TBMR_TBMIE
GPTM Timer B Match Interrupt Enable
5
6
TIMER_TBMR_TBMR
GPTM Timer B Mode
0
2
TIMER_TBMR_TBMR_1_SHOT
One-Shot Timer mode
0x1
TIMER_TBMR_TBMR_PERIOD
Periodic Timer mode
0x2
TIMER_TBMR_TBMR_CAP
Capture mode
0x3
TIMER_TBMR_TBMRSU
GPTM Timer B Match Register Update
10
11
TIMER_TBMR_TBPLO
GPTM Timer B PWM Legacy Operation
11
12
TIMER_TBMR_TBPWMIE
GPTM Timer B PWM Interrupt Enable
9
10
TIMER_TBMR_TBSNAPS
GPTM Timer B Snap-Shot Mode
7
8
TIMER_TBMR_TBWOT
GPTM Timer B Wait-on-Trigger
6
7
TBPMR
GPTM TimerB Prescale Match
0x44
-1
read-write
n
0x0
0x0
TIMER_TBPMR_TBPSMR
GPTM TimerB Prescale Match
0
8
TIMER_TBPMR_TBPSMRH
GPTM Timer B Prescale Match High Byte
8
16
TBPR
GPTM Timer B Prescale
0x3C
-1
read-write
n
0x0
0x0
TIMER_TBPR_TBPSR
GPTM Timer B Prescale
0
8
TIMER_TBPR_TBPSRH
GPTM Timer B Prescale High Byte
8
16
TBPS
GPTM Timer B Prescale Snapshot
0x60
-1
read-write
n
0x0
0x0
TIMER_TBPS_PSS
GPTM Timer A Prescaler Value
0
16
TBPV
GPTM Timer B Prescale Value
0x68
-1
read-write
n
0x0
0x0
TIMER_TBPV_PSV
GPTM Timer B Prescaler Value
0
16
TBR
GPTM Timer B
0x4C
-1
read-write
n
0x0
0x0
TBV
GPTM Timer B Value
0x54
-1
read-write
n
0x0
0x0
TIMER0CFG
GPTM Configuration
0x0
read-write
n
0x0
0x0
TIMER_CFG
GPTM Configuration
0
3
TIMER_CFG_32_BIT_TIMER
For a 16/32-bit timer, this value selects the 32-bit timer configuration
0x0
TIMER_CFG_32_BIT_RTC
For a 16/32-bit timer, this value selects the 32-bit real-time clock (RTC) counter configuration
0x1
TIMER_CFG_16_BIT
For a 16/32-bit timer, this value selects the 16-bit timer configuration
0x4
TIMER0CTL
GPTM Control
0xC
read-write
n
0x0
0x0
TIMER_CTL_RTCEN
GPTM RTC Stall Enable
4
5
TIMER_CTL_TAEN
GPTM Timer A Enable
0
1
TIMER_CTL_TAEVENT
GPTM Timer A Event Mode
2
4
TIMER_CTL_TAEVENT_POS
Positive edge
0x0
TIMER_CTL_TAEVENT_NEG
Negative edge
0x1
TIMER_CTL_TAEVENT_BOTH
Both edges
0x3
TIMER_CTL_TAOTE
GPTM Timer A Output Trigger Enable
5
6
TIMER_CTL_TAPWML
GPTM Timer A PWM Output Level
6
7
TIMER_CTL_TASTALL
GPTM Timer A Stall Enable
1
2
TIMER_CTL_TBEN
GPTM Timer B Enable
8
9
TIMER_CTL_TBEVENT
GPTM Timer B Event Mode
10
12
TIMER_CTL_TBEVENT_POS
Positive edge
0x0
TIMER_CTL_TBEVENT_NEG
Negative edge
0x1
TIMER_CTL_TBEVENT_BOTH
Both edges
0x3
TIMER_CTL_TBOTE
GPTM Timer B Output Trigger Enable
13
14
TIMER_CTL_TBPWML
GPTM Timer B PWM Output Level
14
15
TIMER_CTL_TBSTALL
GPTM Timer B Stall Enable
9
10
TIMER0ICR
GPTM Interrupt Clear
0x24
write-only
n
0x0
0x0
TIMER_ICR_CAECINT
GPTM Timer A Capture Mode Event Interrupt Clear
2
3
write-only
TIMER_ICR_CAMCINT
GPTM Timer A Capture Mode Match Interrupt Clear
1
2
write-only
TIMER_ICR_CBECINT
GPTM Timer B Capture Mode Event Interrupt Clear
10
11
write-only
TIMER_ICR_CBMCINT
GPTM Timer B Capture Mode Match Interrupt Clear
9
10
write-only
TIMER_ICR_RTCCINT
GPTM RTC Interrupt Clear
3
4
write-only
TIMER_ICR_TAMCINT
GPTM Timer A Match Interrupt Clear
4
5
write-only
TIMER_ICR_TATOCINT
GPTM Timer A Time-Out Raw Interrupt
0
1
write-only
TIMER_ICR_TBMCINT
GPTM Timer B Match Interrupt Clear
11
12
write-only
TIMER_ICR_TBTOCINT
GPTM Timer B Time-Out Interrupt Clear
8
9
write-only
TIMER_ICR_WUECINT
32/64-Bit Wide GPTM Write Update Error Interrupt Clear
16
17
write-only
TIMER0IMR
GPTM Interrupt Mask
0x18
read-write
n
0x0
0x0
TIMER_IMR_CAEIM
GPTM Timer A Capture Mode Event Interrupt Mask
2
3
TIMER_IMR_CAMIM
GPTM Timer A Capture Mode Match Interrupt Mask
1
2
TIMER_IMR_CBEIM
GPTM Timer B Capture Mode Event Interrupt Mask
10
11
TIMER_IMR_CBMIM
GPTM Timer B Capture Mode Match Interrupt Mask
9
10
TIMER_IMR_RTCIM
GPTM RTC Interrupt Mask
3
4
TIMER_IMR_TAMIM
GPTM Timer A Match Interrupt Mask
4
5
TIMER_IMR_TATOIM
GPTM Timer A Time-Out Interrupt Mask
0
1
TIMER_IMR_TBMIM
GPTM Timer B Match Interrupt Mask
11
12
TIMER_IMR_TBTOIM
GPTM Timer B Time-Out Interrupt Mask
8
9
TIMER_IMR_WUEIM
32/64-Bit Wide GPTM Write Update Error Interrupt Mask
16
17
TIMER0MIS
GPTM Masked Interrupt Status
0x20
read-write
n
0x0
0x0
TIMER_MIS_CAEMIS
GPTM Timer A Capture Mode Event Masked Interrupt
2
3
TIMER_MIS_CAMMIS
GPTM Timer A Capture Mode Match Masked Interrupt
1
2
TIMER_MIS_CBEMIS
GPTM Timer B Capture Mode Event Masked Interrupt
10
11
TIMER_MIS_CBMMIS
GPTM Timer B Capture Mode Match Masked Interrupt
9
10
TIMER_MIS_RTCMIS
GPTM RTC Masked Interrupt
3
4
TIMER_MIS_TAMMIS
GPTM Timer A Match Masked Interrupt
4
5
TIMER_MIS_TATOMIS
GPTM Timer A Time-Out Masked Interrupt
0
1
TIMER_MIS_TBMMIS
GPTM Timer B Match Masked Interrupt
11
12
TIMER_MIS_TBTOMIS
GPTM Timer B Time-Out Masked Interrupt
8
9
TIMER_MIS_WUEMIS
32/64-Bit Wide GPTM Write Update Error Masked Interrupt Status
16
17
TIMER0PP
GPTM Peripheral Properties
0xFC0
read-write
n
0x0
0x0
TIMER_PP_SIZE
Count Size
0
4
TIMER_PP_SIZE_16
Timer A and Timer B counters are 16 bits each with an 8-bit prescale counter
0x0
TIMER_PP_SIZE_32
Timer A and Timer B counters are 32 bits each with a 16-bit prescale counter
0x1
TIMER0RIS
GPTM Raw Interrupt Status
0x1C
read-write
n
0x0
0x0
TIMER_RIS_CAERIS
GPTM Timer A Capture Mode Event Raw Interrupt
2
3
TIMER_RIS_CAMRIS
GPTM Timer A Capture Mode Match Raw Interrupt
1
2
TIMER_RIS_CBERIS
GPTM Timer B Capture Mode Event Raw Interrupt
10
11
TIMER_RIS_CBMRIS
GPTM Timer B Capture Mode Match Raw Interrupt
9
10
TIMER_RIS_RTCRIS
GPTM RTC Raw Interrupt
3
4
TIMER_RIS_TAMRIS
GPTM Timer A Match Raw Interrupt
4
5
TIMER_RIS_TATORIS
GPTM Timer A Time-Out Raw Interrupt
0
1
TIMER_RIS_TBMRIS
GPTM Timer B Match Raw Interrupt
11
12
TIMER_RIS_TBTORIS
GPTM Timer B Time-Out Raw Interrupt
8
9
TIMER_RIS_WUERIS
32/64-Bit Wide GPTM Write Update Error Raw Interrupt Status
16
17
TIMER0RTCPD
GPTM RTC Predivide
0x58
read-write
n
0x0
0x0
TIMER_RTCPD_RTCPD
RTC Predivide Counter Value
0
16
TIMER0SYNC
GPTM Synchronize
0x10
read-write
n
0x0
0x0
TIMER_SYNC_SYNCT0
Synchronize GPTM Timer 0
0
2
TIMER_SYNC_SYNCT0_NONE
GPTM0 is not affected
0x0
TIMER_SYNC_SYNCT0_TA
A timeout event for Timer A of GPTM0 is triggered
0x1
TIMER_SYNC_SYNCT0_TB
A timeout event for Timer B of GPTM0 is triggered
0x2
TIMER_SYNC_SYNCT0_TATB
A timeout event for both Timer A and Timer B of GPTM0 is triggered
0x3
TIMER_SYNC_SYNCT1
Synchronize GPTM Timer 1
2
4
TIMER_SYNC_SYNCT1_NONE
GPTM1 is not affected
0x0
TIMER_SYNC_SYNCT1_TA
A timeout event for Timer A of GPTM1 is triggered
0x1
TIMER_SYNC_SYNCT1_TB
A timeout event for Timer B of GPTM1 is triggered
0x2
TIMER_SYNC_SYNCT1_TATB
A timeout event for both Timer A and Timer B of GPTM1 is triggered
0x3
TIMER_SYNC_SYNCT2
Synchronize GPTM Timer 2
4
6
TIMER_SYNC_SYNCT2_NONE
GPTM2 is not affected
0x0
TIMER_SYNC_SYNCT2_TA
A timeout event for Timer A of GPTM2 is triggered
0x1
TIMER_SYNC_SYNCT2_TB
A timeout event for Timer B of GPTM2 is triggered
0x2
TIMER_SYNC_SYNCT2_TATB
A timeout event for both Timer A and Timer B of GPTM2 is triggered
0x3
TIMER_SYNC_SYNCT3
Synchronize GPTM Timer 3
6
8
TIMER_SYNC_SYNCT3_NONE
GPTM3 is not affected
0x0
TIMER_SYNC_SYNCT3_TA
A timeout event for Timer A of GPTM3 is triggered
0x1
TIMER_SYNC_SYNCT3_TB
A timeout event for Timer B of GPTM3 is triggered
0x2
TIMER_SYNC_SYNCT3_TATB
A timeout event for both Timer A and Timer B of GPTM3 is triggered
0x3
TIMER_SYNC_SYNCT4
Synchronize GPTM Timer 4
8
10
TIMER_SYNC_SYNCT4_NONE
GPTM4 is not affected
0x0
TIMER_SYNC_SYNCT4_TA
A timeout event for Timer A of GPTM4 is triggered
0x1
TIMER_SYNC_SYNCT4_TB
A timeout event for Timer B of GPTM4 is triggered
0x2
TIMER_SYNC_SYNCT4_TATB
A timeout event for both Timer A and Timer B of GPTM4 is triggered
0x3
TIMER_SYNC_SYNCT5
Synchronize GPTM Timer 5
10
12
TIMER_SYNC_SYNCT5_NONE
GPTM5 is not affected
0x0
TIMER_SYNC_SYNCT5_TA
A timeout event for Timer A of GPTM5 is triggered
0x1
TIMER_SYNC_SYNCT5_TB
A timeout event for Timer B of GPTM5 is triggered
0x2
TIMER_SYNC_SYNCT5_TATB
A timeout event for both Timer A and Timer B of GPTM5 is triggered
0x3
TIMER_SYNC_SYNCWT0
Synchronize GPTM 32/64-Bit Timer 0
12
14
TIMER_SYNC_SYNCWT0_NONE
GPTM 32/64-Bit Timer 0 is not affected
0x0
TIMER_SYNC_SYNCWT0_TA
A timeout event for Timer A of GPTM 32/64-Bit Timer 0 is triggered
0x1
TIMER_SYNC_SYNCWT0_TB
A timeout event for Timer B of GPTM 32/64-Bit Timer 0 is triggered
0x2
TIMER_SYNC_SYNCWT0_TATB
A timeout event for both Timer A and Timer B of GPTM 32/64-Bit Timer 0 is triggered
0x3
TIMER_SYNC_SYNCWT1
Synchronize GPTM 32/64-Bit Timer 1
14
16
TIMER_SYNC_SYNCWT1_NONE
GPTM 32/64-Bit Timer 1 is not affected
0x0
TIMER_SYNC_SYNCWT1_TA
A timeout event for Timer A of GPTM 32/64-Bit Timer 1 is triggered
0x1
TIMER_SYNC_SYNCWT1_TB
A timeout event for Timer B of GPTM 32/64-Bit Timer 1 is triggered
0x2
TIMER_SYNC_SYNCWT1_TATB
A timeout event for both Timer A and Timer B of GPTM 32/64-Bit Timer 1 is triggered
0x3
TIMER_SYNC_SYNCWT2
Synchronize GPTM 32/64-Bit Timer 2
16
18
TIMER_SYNC_SYNCWT2_NONE
GPTM 32/64-Bit Timer 2 is not affected
0x0
TIMER_SYNC_SYNCWT2_TA
A timeout event for Timer A of GPTM 32/64-Bit Timer 2 is triggered
0x1
TIMER_SYNC_SYNCWT2_TB
A timeout event for Timer B of GPTM 32/64-Bit Timer 2 is triggered
0x2
TIMER_SYNC_SYNCWT2_TATB
A timeout event for both Timer A and Timer B of GPTM 32/64-Bit Timer 2 is triggered
0x3
TIMER_SYNC_SYNCWT3
Synchronize GPTM 32/64-Bit Timer 3
18
20
TIMER_SYNC_SYNCWT3_NONE
GPTM 32/64-Bit Timer 3 is not affected
0x0
TIMER_SYNC_SYNCWT3_TA
A timeout event for Timer A of GPTM 32/64-Bit Timer 3 is triggered
0x1
TIMER_SYNC_SYNCWT3_TB
A timeout event for Timer B of GPTM 32/64-Bit Timer 3 is triggered
0x2
TIMER_SYNC_SYNCWT3_TATB
A timeout event for both Timer A and Timer B of GPTM 32/64-Bit Timer 3 is triggered
0x3
TIMER_SYNC_SYNCWT4
Synchronize GPTM 32/64-Bit Timer 4
20
22
TIMER_SYNC_SYNCWT4_NONE
GPTM 32/64-Bit Timer 4 is not affected
0x0
TIMER_SYNC_SYNCWT4_TA
A timeout event for Timer A of GPTM 32/64-Bit Timer 4 is triggered
0x1
TIMER_SYNC_SYNCWT4_TB
A timeout event for Timer B of GPTM 32/64-Bit Timer 4 is triggered
0x2
TIMER_SYNC_SYNCWT4_TATB
A timeout event for both Timer A and Timer B of GPTM 32/64-Bit Timer 4 is triggered
0x3
TIMER_SYNC_SYNCWT5
Synchronize GPTM 32/64-Bit Timer 5
22
24
TIMER_SYNC_SYNCWT5_NONE
GPTM 32/64-Bit Timer 5 is not affected
0x0
TIMER_SYNC_SYNCWT5_TA
A timeout event for Timer A of GPTM 32/64-Bit Timer 5 is triggered
0x1
TIMER_SYNC_SYNCWT5_TB
A timeout event for Timer B of GPTM 32/64-Bit Timer 5 is triggered
0x2
TIMER_SYNC_SYNCWT5_TATB
A timeout event for both Timer A and Timer B of GPTM 32/64-Bit Timer 5 is triggered
0x3
TIMER0TAILR
GPTM Timer A Interval Load
0x28
read-write
n
0x0
0x0
TIMER0TAMATCHR
GPTM Timer A Match
0x30
read-write
n
0x0
0x0
TIMER0TAMR
GPTM Timer A Mode
0x4
read-write
n
0x0
0x0
TIMER_TAMR_TAAMS
GPTM Timer A Alternate Mode Select
3
4
TIMER_TAMR_TACDIR
GPTM Timer A Count Direction
4
5
TIMER_TAMR_TACMR
GPTM Timer A Capture Mode
2
3
TIMER_TAMR_TAILD
GPTM Timer A Interval Load Write
8
9
TIMER_TAMR_TAMIE
GPTM Timer A Match Interrupt Enable
5
6
TIMER_TAMR_TAMR
GPTM Timer A Mode
0
2
TIMER_TAMR_TAMR_1_SHOT
One-Shot Timer mode
0x1
TIMER_TAMR_TAMR_PERIOD
Periodic Timer mode
0x2
TIMER_TAMR_TAMR_CAP
Capture mode
0x3
TIMER_TAMR_TAMRSU
GPTM Timer A Match Register Update
10
11
TIMER_TAMR_TAPLO
GPTM Timer A PWM Legacy Operation
11
12
TIMER_TAMR_TAPWMIE
GPTM Timer A PWM Interrupt Enable
9
10
TIMER_TAMR_TASNAPS
GPTM Timer A Snap-Shot Mode
7
8
TIMER_TAMR_TAWOT
GPTM Timer A Wait-on-Trigger
6
7
TIMER0TAPMR
GPTM TimerA Prescale Match
0x40
read-write
n
0x0
0x0
TIMER_TAPMR_TAPSMR
GPTM TimerA Prescale Match
0
8
TIMER_TAPMR_TAPSMRH
GPTM Timer A Prescale Match High Byte
8
16
TIMER0TAPR
GPTM Timer A Prescale
0x38
read-write
n
0x0
0x0
TIMER_TAPR_TAPSR
GPTM Timer A Prescale
0
8
TIMER_TAPR_TAPSRH
GPTM Timer A Prescale High Byte
8
16
TIMER0TAPS
GPTM Timer A Prescale Snapshot
0x5C
read-write
n
0x0
0x0
TIMER_TAPS_PSS
GPTM Timer A Prescaler Snapshot
0
16
TIMER0TAPV
GPTM Timer A Prescale Value
0x64
read-write
n
0x0
0x0
TIMER_TAPV_PSV
GPTM Timer A Prescaler Value
0
16
TIMER0TAR
GPTM Timer A
0x48
read-write
n
0x0
0x0
TIMER0TAV
GPTM Timer A Value
0x50
read-write
n
0x0
0x0
TIMER0TBILR
GPTM Timer B Interval Load
0x2C
read-write
n
0x0
0x0
TIMER0TBMATCHR
GPTM Timer B Match
0x34
read-write
n
0x0
0x0
TIMER0TBMR
GPTM Timer B Mode
0x8
read-write
n
0x0
0x0
TIMER_TBMR_TBAMS
GPTM Timer B Alternate Mode Select
3
4
TIMER_TBMR_TBCDIR
GPTM Timer B Count Direction
4
5
TIMER_TBMR_TBCMR
GPTM Timer B Capture Mode
2
3
TIMER_TBMR_TBILD
GPTM Timer B Interval Load Write
8
9
TIMER_TBMR_TBMIE
GPTM Timer B Match Interrupt Enable
5
6
TIMER_TBMR_TBMR
GPTM Timer B Mode
0
2
TIMER_TBMR_TBMR_1_SHOT
One-Shot Timer mode
0x1
TIMER_TBMR_TBMR_PERIOD
Periodic Timer mode
0x2
TIMER_TBMR_TBMR_CAP
Capture mode
0x3
TIMER_TBMR_TBMRSU
GPTM Timer B Match Register Update
10
11
TIMER_TBMR_TBPLO
GPTM Timer B PWM Legacy Operation
11
12
TIMER_TBMR_TBPWMIE
GPTM Timer B PWM Interrupt Enable
9
10
TIMER_TBMR_TBSNAPS
GPTM Timer B Snap-Shot Mode
7
8
TIMER_TBMR_TBWOT
GPTM Timer B Wait-on-Trigger
6
7
TIMER0TBPMR
GPTM TimerB Prescale Match
0x44
read-write
n
0x0
0x0
TIMER_TBPMR_TBPSMR
GPTM TimerB Prescale Match
0
8
TIMER_TBPMR_TBPSMRH
GPTM Timer B Prescale Match High Byte
8
16
TIMER0TBPR
GPTM Timer B Prescale
0x3C
read-write
n
0x0
0x0
TIMER_TBPR_TBPSR
GPTM Timer B Prescale
0
8
TIMER_TBPR_TBPSRH
GPTM Timer B Prescale High Byte
8
16
TIMER0TBPS
GPTM Timer B Prescale Snapshot
0x60
read-write
n
0x0
0x0
TIMER_TBPS_PSS
GPTM Timer A Prescaler Value
0
16
TIMER0TBPV
GPTM Timer B Prescale Value
0x68
read-write
n
0x0
0x0
TIMER_TBPV_PSV
GPTM Timer B Prescaler Value
0
16
TIMER0TBR
GPTM Timer B
0x4C
read-write
n
0x0
0x0
TIMER0TBV
GPTM Timer B Value
0x54
read-write
n
0x0
0x0
TIMER3
Register map for TIMER0 peripheral
TIMER
0x0
0x0
0x1000
registers
n
TIMER3A
35
TIMER3B
36
CFG
GPTM Configuration
0x0
-1
read-write
n
0x0
0x0
TIMER_CFG
GPTM Configuration
0
3
TIMER_CFG_32_BIT_TIMER
For a 16/32-bit timer, this value selects the 32-bit timer configuration
0x0
TIMER_CFG_32_BIT_RTC
For a 16/32-bit timer, this value selects the 32-bit real-time clock (RTC) counter configuration
0x1
TIMER_CFG_16_BIT
For a 16/32-bit timer, this value selects the 16-bit timer configuration
0x4
CTL
GPTM Control
0xC
-1
read-write
n
0x0
0x0
TIMER_CTL_RTCEN
GPTM RTC Stall Enable
4
5
TIMER_CTL_TAEN
GPTM Timer A Enable
0
1
TIMER_CTL_TAEVENT
GPTM Timer A Event Mode
2
4
TIMER_CTL_TAEVENT_POS
Positive edge
0x0
TIMER_CTL_TAEVENT_NEG
Negative edge
0x1
TIMER_CTL_TAEVENT_BOTH
Both edges
0x3
TIMER_CTL_TAOTE
GPTM Timer A Output Trigger Enable
5
6
TIMER_CTL_TAPWML
GPTM Timer A PWM Output Level
6
7
TIMER_CTL_TASTALL
GPTM Timer A Stall Enable
1
2
TIMER_CTL_TBEN
GPTM Timer B Enable
8
9
TIMER_CTL_TBEVENT
GPTM Timer B Event Mode
10
12
TIMER_CTL_TBEVENT_POS
Positive edge
0x0
TIMER_CTL_TBEVENT_NEG
Negative edge
0x1
TIMER_CTL_TBEVENT_BOTH
Both edges
0x3
TIMER_CTL_TBOTE
GPTM Timer B Output Trigger Enable
13
14
TIMER_CTL_TBPWML
GPTM Timer B PWM Output Level
14
15
TIMER_CTL_TBSTALL
GPTM Timer B Stall Enable
9
10
ICR
GPTM Interrupt Clear
0x24
-1
write-only
n
0x0
0x0
TIMER_ICR_CAECINT
GPTM Timer A Capture Mode Event Interrupt Clear
2
3
write-only
TIMER_ICR_CAMCINT
GPTM Timer A Capture Mode Match Interrupt Clear
1
2
write-only
TIMER_ICR_CBECINT
GPTM Timer B Capture Mode Event Interrupt Clear
10
11
write-only
TIMER_ICR_CBMCINT
GPTM Timer B Capture Mode Match Interrupt Clear
9
10
write-only
TIMER_ICR_RTCCINT
GPTM RTC Interrupt Clear
3
4
write-only
TIMER_ICR_TAMCINT
GPTM Timer A Match Interrupt Clear
4
5
write-only
TIMER_ICR_TATOCINT
GPTM Timer A Time-Out Raw Interrupt
0
1
write-only
TIMER_ICR_TBMCINT
GPTM Timer B Match Interrupt Clear
11
12
write-only
TIMER_ICR_TBTOCINT
GPTM Timer B Time-Out Interrupt Clear
8
9
write-only
TIMER_ICR_WUECINT
32/64-Bit Wide GPTM Write Update Error Interrupt Clear
16
17
write-only
IMR
GPTM Interrupt Mask
0x18
-1
read-write
n
0x0
0x0
TIMER_IMR_CAEIM
GPTM Timer A Capture Mode Event Interrupt Mask
2
3
TIMER_IMR_CAMIM
GPTM Timer A Capture Mode Match Interrupt Mask
1
2
TIMER_IMR_CBEIM
GPTM Timer B Capture Mode Event Interrupt Mask
10
11
TIMER_IMR_CBMIM
GPTM Timer B Capture Mode Match Interrupt Mask
9
10
TIMER_IMR_RTCIM
GPTM RTC Interrupt Mask
3
4
TIMER_IMR_TAMIM
GPTM Timer A Match Interrupt Mask
4
5
TIMER_IMR_TATOIM
GPTM Timer A Time-Out Interrupt Mask
0
1
TIMER_IMR_TBMIM
GPTM Timer B Match Interrupt Mask
11
12
TIMER_IMR_TBTOIM
GPTM Timer B Time-Out Interrupt Mask
8
9
TIMER_IMR_WUEIM
32/64-Bit Wide GPTM Write Update Error Interrupt Mask
16
17
MIS
GPTM Masked Interrupt Status
0x20
-1
read-write
n
0x0
0x0
TIMER_MIS_CAEMIS
GPTM Timer A Capture Mode Event Masked Interrupt
2
3
TIMER_MIS_CAMMIS
GPTM Timer A Capture Mode Match Masked Interrupt
1
2
TIMER_MIS_CBEMIS
GPTM Timer B Capture Mode Event Masked Interrupt
10
11
TIMER_MIS_CBMMIS
GPTM Timer B Capture Mode Match Masked Interrupt
9
10
TIMER_MIS_RTCMIS
GPTM RTC Masked Interrupt
3
4
TIMER_MIS_TAMMIS
GPTM Timer A Match Masked Interrupt
4
5
TIMER_MIS_TATOMIS
GPTM Timer A Time-Out Masked Interrupt
0
1
TIMER_MIS_TBMMIS
GPTM Timer B Match Masked Interrupt
11
12
TIMER_MIS_TBTOMIS
GPTM Timer B Time-Out Masked Interrupt
8
9
TIMER_MIS_WUEMIS
32/64-Bit Wide GPTM Write Update Error Masked Interrupt Status
16
17
PP
GPTM Peripheral Properties
0xFC0
-1
read-write
n
0x0
0x0
TIMER_PP_SIZE
Count Size
0
4
TIMER_PP_SIZE_16
Timer A and Timer B counters are 16 bits each with an 8-bit prescale counter
0x0
TIMER_PP_SIZE_32
Timer A and Timer B counters are 32 bits each with a 16-bit prescale counter
0x1
RIS
GPTM Raw Interrupt Status
0x1C
-1
read-write
n
0x0
0x0
TIMER_RIS_CAERIS
GPTM Timer A Capture Mode Event Raw Interrupt
2
3
TIMER_RIS_CAMRIS
GPTM Timer A Capture Mode Match Raw Interrupt
1
2
TIMER_RIS_CBERIS
GPTM Timer B Capture Mode Event Raw Interrupt
10
11
TIMER_RIS_CBMRIS
GPTM Timer B Capture Mode Match Raw Interrupt
9
10
TIMER_RIS_RTCRIS
GPTM RTC Raw Interrupt
3
4
TIMER_RIS_TAMRIS
GPTM Timer A Match Raw Interrupt
4
5
TIMER_RIS_TATORIS
GPTM Timer A Time-Out Raw Interrupt
0
1
TIMER_RIS_TBMRIS
GPTM Timer B Match Raw Interrupt
11
12
TIMER_RIS_TBTORIS
GPTM Timer B Time-Out Raw Interrupt
8
9
TIMER_RIS_WUERIS
32/64-Bit Wide GPTM Write Update Error Raw Interrupt Status
16
17
RTCPD
GPTM RTC Predivide
0x58
-1
read-write
n
0x0
0x0
TIMER_RTCPD_RTCPD
RTC Predivide Counter Value
0
16
SYNC
GPTM Synchronize
0x10
-1
read-write
n
0x0
0x0
TIMER_SYNC_SYNCT0
Synchronize GPTM Timer 0
0
2
TIMER_SYNC_SYNCT0_NONE
GPTM0 is not affected
0x0
TIMER_SYNC_SYNCT0_TA
A timeout event for Timer A of GPTM0 is triggered
0x1
TIMER_SYNC_SYNCT0_TB
A timeout event for Timer B of GPTM0 is triggered
0x2
TIMER_SYNC_SYNCT0_TATB
A timeout event for both Timer A and Timer B of GPTM0 is triggered
0x3
TIMER_SYNC_SYNCT1
Synchronize GPTM Timer 1
2
4
TIMER_SYNC_SYNCT1_NONE
GPTM1 is not affected
0x0
TIMER_SYNC_SYNCT1_TA
A timeout event for Timer A of GPTM1 is triggered
0x1
TIMER_SYNC_SYNCT1_TB
A timeout event for Timer B of GPTM1 is triggered
0x2
TIMER_SYNC_SYNCT1_TATB
A timeout event for both Timer A and Timer B of GPTM1 is triggered
0x3
TIMER_SYNC_SYNCT2
Synchronize GPTM Timer 2
4
6
TIMER_SYNC_SYNCT2_NONE
GPTM2 is not affected
0x0
TIMER_SYNC_SYNCT2_TA
A timeout event for Timer A of GPTM2 is triggered
0x1
TIMER_SYNC_SYNCT2_TB
A timeout event for Timer B of GPTM2 is triggered
0x2
TIMER_SYNC_SYNCT2_TATB
A timeout event for both Timer A and Timer B of GPTM2 is triggered
0x3
TIMER_SYNC_SYNCT3
Synchronize GPTM Timer 3
6
8
TIMER_SYNC_SYNCT3_NONE
GPTM3 is not affected
0x0
TIMER_SYNC_SYNCT3_TA
A timeout event for Timer A of GPTM3 is triggered
0x1
TIMER_SYNC_SYNCT3_TB
A timeout event for Timer B of GPTM3 is triggered
0x2
TIMER_SYNC_SYNCT3_TATB
A timeout event for both Timer A and Timer B of GPTM3 is triggered
0x3
TIMER_SYNC_SYNCT4
Synchronize GPTM Timer 4
8
10
TIMER_SYNC_SYNCT4_NONE
GPTM4 is not affected
0x0
TIMER_SYNC_SYNCT4_TA
A timeout event for Timer A of GPTM4 is triggered
0x1
TIMER_SYNC_SYNCT4_TB
A timeout event for Timer B of GPTM4 is triggered
0x2
TIMER_SYNC_SYNCT4_TATB
A timeout event for both Timer A and Timer B of GPTM4 is triggered
0x3
TIMER_SYNC_SYNCT5
Synchronize GPTM Timer 5
10
12
TIMER_SYNC_SYNCT5_NONE
GPTM5 is not affected
0x0
TIMER_SYNC_SYNCT5_TA
A timeout event for Timer A of GPTM5 is triggered
0x1
TIMER_SYNC_SYNCT5_TB
A timeout event for Timer B of GPTM5 is triggered
0x2
TIMER_SYNC_SYNCT5_TATB
A timeout event for both Timer A and Timer B of GPTM5 is triggered
0x3
TIMER_SYNC_SYNCWT0
Synchronize GPTM 32/64-Bit Timer 0
12
14
TIMER_SYNC_SYNCWT0_NONE
GPTM 32/64-Bit Timer 0 is not affected
0x0
TIMER_SYNC_SYNCWT0_TA
A timeout event for Timer A of GPTM 32/64-Bit Timer 0 is triggered
0x1
TIMER_SYNC_SYNCWT0_TB
A timeout event for Timer B of GPTM 32/64-Bit Timer 0 is triggered
0x2
TIMER_SYNC_SYNCWT0_TATB
A timeout event for both Timer A and Timer B of GPTM 32/64-Bit Timer 0 is triggered
0x3
TIMER_SYNC_SYNCWT1
Synchronize GPTM 32/64-Bit Timer 1
14
16
TIMER_SYNC_SYNCWT1_NONE
GPTM 32/64-Bit Timer 1 is not affected
0x0
TIMER_SYNC_SYNCWT1_TA
A timeout event for Timer A of GPTM 32/64-Bit Timer 1 is triggered
0x1
TIMER_SYNC_SYNCWT1_TB
A timeout event for Timer B of GPTM 32/64-Bit Timer 1 is triggered
0x2
TIMER_SYNC_SYNCWT1_TATB
A timeout event for both Timer A and Timer B of GPTM 32/64-Bit Timer 1 is triggered
0x3
TIMER_SYNC_SYNCWT2
Synchronize GPTM 32/64-Bit Timer 2
16
18
TIMER_SYNC_SYNCWT2_NONE
GPTM 32/64-Bit Timer 2 is not affected
0x0
TIMER_SYNC_SYNCWT2_TA
A timeout event for Timer A of GPTM 32/64-Bit Timer 2 is triggered
0x1
TIMER_SYNC_SYNCWT2_TB
A timeout event for Timer B of GPTM 32/64-Bit Timer 2 is triggered
0x2
TIMER_SYNC_SYNCWT2_TATB
A timeout event for both Timer A and Timer B of GPTM 32/64-Bit Timer 2 is triggered
0x3
TIMER_SYNC_SYNCWT3
Synchronize GPTM 32/64-Bit Timer 3
18
20
TIMER_SYNC_SYNCWT3_NONE
GPTM 32/64-Bit Timer 3 is not affected
0x0
TIMER_SYNC_SYNCWT3_TA
A timeout event for Timer A of GPTM 32/64-Bit Timer 3 is triggered
0x1
TIMER_SYNC_SYNCWT3_TB
A timeout event for Timer B of GPTM 32/64-Bit Timer 3 is triggered
0x2
TIMER_SYNC_SYNCWT3_TATB
A timeout event for both Timer A and Timer B of GPTM 32/64-Bit Timer 3 is triggered
0x3
TIMER_SYNC_SYNCWT4
Synchronize GPTM 32/64-Bit Timer 4
20
22
TIMER_SYNC_SYNCWT4_NONE
GPTM 32/64-Bit Timer 4 is not affected
0x0
TIMER_SYNC_SYNCWT4_TA
A timeout event for Timer A of GPTM 32/64-Bit Timer 4 is triggered
0x1
TIMER_SYNC_SYNCWT4_TB
A timeout event for Timer B of GPTM 32/64-Bit Timer 4 is triggered
0x2
TIMER_SYNC_SYNCWT4_TATB
A timeout event for both Timer A and Timer B of GPTM 32/64-Bit Timer 4 is triggered
0x3
TIMER_SYNC_SYNCWT5
Synchronize GPTM 32/64-Bit Timer 5
22
24
TIMER_SYNC_SYNCWT5_NONE
GPTM 32/64-Bit Timer 5 is not affected
0x0
TIMER_SYNC_SYNCWT5_TA
A timeout event for Timer A of GPTM 32/64-Bit Timer 5 is triggered
0x1
TIMER_SYNC_SYNCWT5_TB
A timeout event for Timer B of GPTM 32/64-Bit Timer 5 is triggered
0x2
TIMER_SYNC_SYNCWT5_TATB
A timeout event for both Timer A and Timer B of GPTM 32/64-Bit Timer 5 is triggered
0x3
TAILR
GPTM Timer A Interval Load
0x28
-1
read-write
n
0x0
0x0
TAMATCHR
GPTM Timer A Match
0x30
-1
read-write
n
0x0
0x0
TAMR
GPTM Timer A Mode
0x4
-1
read-write
n
0x0
0x0
TIMER_TAMR_TAAMS
GPTM Timer A Alternate Mode Select
3
4
TIMER_TAMR_TACDIR
GPTM Timer A Count Direction
4
5
TIMER_TAMR_TACMR
GPTM Timer A Capture Mode
2
3
TIMER_TAMR_TAILD
GPTM Timer A Interval Load Write
8
9
TIMER_TAMR_TAMIE
GPTM Timer A Match Interrupt Enable
5
6
TIMER_TAMR_TAMR
GPTM Timer A Mode
0
2
TIMER_TAMR_TAMR_1_SHOT
One-Shot Timer mode
0x1
TIMER_TAMR_TAMR_PERIOD
Periodic Timer mode
0x2
TIMER_TAMR_TAMR_CAP
Capture mode
0x3
TIMER_TAMR_TAMRSU
GPTM Timer A Match Register Update
10
11
TIMER_TAMR_TAPLO
GPTM Timer A PWM Legacy Operation
11
12
TIMER_TAMR_TAPWMIE
GPTM Timer A PWM Interrupt Enable
9
10
TIMER_TAMR_TASNAPS
GPTM Timer A Snap-Shot Mode
7
8
TIMER_TAMR_TAWOT
GPTM Timer A Wait-on-Trigger
6
7
TAPMR
GPTM TimerA Prescale Match
0x40
-1
read-write
n
0x0
0x0
TIMER_TAPMR_TAPSMR
GPTM TimerA Prescale Match
0
8
TIMER_TAPMR_TAPSMRH
GPTM Timer A Prescale Match High Byte
8
16
TAPR
GPTM Timer A Prescale
0x38
-1
read-write
n
0x0
0x0
TIMER_TAPR_TAPSR
GPTM Timer A Prescale
0
8
TIMER_TAPR_TAPSRH
GPTM Timer A Prescale High Byte
8
16
TAPS
GPTM Timer A Prescale Snapshot
0x5C
-1
read-write
n
0x0
0x0
TIMER_TAPS_PSS
GPTM Timer A Prescaler Snapshot
0
16
TAPV
GPTM Timer A Prescale Value
0x64
-1
read-write
n
0x0
0x0
TIMER_TAPV_PSV
GPTM Timer A Prescaler Value
0
16
TAR
GPTM Timer A
0x48
-1
read-write
n
0x0
0x0
TAV
GPTM Timer A Value
0x50
-1
read-write
n
0x0
0x0
TBILR
GPTM Timer B Interval Load
0x2C
-1
read-write
n
0x0
0x0
TBMATCHR
GPTM Timer B Match
0x34
-1
read-write
n
0x0
0x0
TBMR
GPTM Timer B Mode
0x8
-1
read-write
n
0x0
0x0
TIMER_TBMR_TBAMS
GPTM Timer B Alternate Mode Select
3
4
TIMER_TBMR_TBCDIR
GPTM Timer B Count Direction
4
5
TIMER_TBMR_TBCMR
GPTM Timer B Capture Mode
2
3
TIMER_TBMR_TBILD
GPTM Timer B Interval Load Write
8
9
TIMER_TBMR_TBMIE
GPTM Timer B Match Interrupt Enable
5
6
TIMER_TBMR_TBMR
GPTM Timer B Mode
0
2
TIMER_TBMR_TBMR_1_SHOT
One-Shot Timer mode
0x1
TIMER_TBMR_TBMR_PERIOD
Periodic Timer mode
0x2
TIMER_TBMR_TBMR_CAP
Capture mode
0x3
TIMER_TBMR_TBMRSU
GPTM Timer B Match Register Update
10
11
TIMER_TBMR_TBPLO
GPTM Timer B PWM Legacy Operation
11
12
TIMER_TBMR_TBPWMIE
GPTM Timer B PWM Interrupt Enable
9
10
TIMER_TBMR_TBSNAPS
GPTM Timer B Snap-Shot Mode
7
8
TIMER_TBMR_TBWOT
GPTM Timer B Wait-on-Trigger
6
7
TBPMR
GPTM TimerB Prescale Match
0x44
-1
read-write
n
0x0
0x0
TIMER_TBPMR_TBPSMR
GPTM TimerB Prescale Match
0
8
TIMER_TBPMR_TBPSMRH
GPTM Timer B Prescale Match High Byte
8
16
TBPR
GPTM Timer B Prescale
0x3C
-1
read-write
n
0x0
0x0
TIMER_TBPR_TBPSR
GPTM Timer B Prescale
0
8
TIMER_TBPR_TBPSRH
GPTM Timer B Prescale High Byte
8
16
TBPS
GPTM Timer B Prescale Snapshot
0x60
-1
read-write
n
0x0
0x0
TIMER_TBPS_PSS
GPTM Timer A Prescaler Value
0
16
TBPV
GPTM Timer B Prescale Value
0x68
-1
read-write
n
0x0
0x0
TIMER_TBPV_PSV
GPTM Timer B Prescaler Value
0
16
TBR
GPTM Timer B
0x4C
-1
read-write
n
0x0
0x0
TBV
GPTM Timer B Value
0x54
-1
read-write
n
0x0
0x0
TIMER0CFG
GPTM Configuration
0x0
read-write
n
0x0
0x0
TIMER_CFG
GPTM Configuration
0
3
TIMER_CFG_32_BIT_TIMER
For a 16/32-bit timer, this value selects the 32-bit timer configuration
0x0
TIMER_CFG_32_BIT_RTC
For a 16/32-bit timer, this value selects the 32-bit real-time clock (RTC) counter configuration
0x1
TIMER_CFG_16_BIT
For a 16/32-bit timer, this value selects the 16-bit timer configuration
0x4
TIMER0CTL
GPTM Control
0xC
read-write
n
0x0
0x0
TIMER_CTL_RTCEN
GPTM RTC Stall Enable
4
5
TIMER_CTL_TAEN
GPTM Timer A Enable
0
1
TIMER_CTL_TAEVENT
GPTM Timer A Event Mode
2
4
TIMER_CTL_TAEVENT_POS
Positive edge
0x0
TIMER_CTL_TAEVENT_NEG
Negative edge
0x1
TIMER_CTL_TAEVENT_BOTH
Both edges
0x3
TIMER_CTL_TAOTE
GPTM Timer A Output Trigger Enable
5
6
TIMER_CTL_TAPWML
GPTM Timer A PWM Output Level
6
7
TIMER_CTL_TASTALL
GPTM Timer A Stall Enable
1
2
TIMER_CTL_TBEN
GPTM Timer B Enable
8
9
TIMER_CTL_TBEVENT
GPTM Timer B Event Mode
10
12
TIMER_CTL_TBEVENT_POS
Positive edge
0x0
TIMER_CTL_TBEVENT_NEG
Negative edge
0x1
TIMER_CTL_TBEVENT_BOTH
Both edges
0x3
TIMER_CTL_TBOTE
GPTM Timer B Output Trigger Enable
13
14
TIMER_CTL_TBPWML
GPTM Timer B PWM Output Level
14
15
TIMER_CTL_TBSTALL
GPTM Timer B Stall Enable
9
10
TIMER0ICR
GPTM Interrupt Clear
0x24
write-only
n
0x0
0x0
TIMER_ICR_CAECINT
GPTM Timer A Capture Mode Event Interrupt Clear
2
3
write-only
TIMER_ICR_CAMCINT
GPTM Timer A Capture Mode Match Interrupt Clear
1
2
write-only
TIMER_ICR_CBECINT
GPTM Timer B Capture Mode Event Interrupt Clear
10
11
write-only
TIMER_ICR_CBMCINT
GPTM Timer B Capture Mode Match Interrupt Clear
9
10
write-only
TIMER_ICR_RTCCINT
GPTM RTC Interrupt Clear
3
4
write-only
TIMER_ICR_TAMCINT
GPTM Timer A Match Interrupt Clear
4
5
write-only
TIMER_ICR_TATOCINT
GPTM Timer A Time-Out Raw Interrupt
0
1
write-only
TIMER_ICR_TBMCINT
GPTM Timer B Match Interrupt Clear
11
12
write-only
TIMER_ICR_TBTOCINT
GPTM Timer B Time-Out Interrupt Clear
8
9
write-only
TIMER_ICR_WUECINT
32/64-Bit Wide GPTM Write Update Error Interrupt Clear
16
17
write-only
TIMER0IMR
GPTM Interrupt Mask
0x18
read-write
n
0x0
0x0
TIMER_IMR_CAEIM
GPTM Timer A Capture Mode Event Interrupt Mask
2
3
TIMER_IMR_CAMIM
GPTM Timer A Capture Mode Match Interrupt Mask
1
2
TIMER_IMR_CBEIM
GPTM Timer B Capture Mode Event Interrupt Mask
10
11
TIMER_IMR_CBMIM
GPTM Timer B Capture Mode Match Interrupt Mask
9
10
TIMER_IMR_RTCIM
GPTM RTC Interrupt Mask
3
4
TIMER_IMR_TAMIM
GPTM Timer A Match Interrupt Mask
4
5
TIMER_IMR_TATOIM
GPTM Timer A Time-Out Interrupt Mask
0
1
TIMER_IMR_TBMIM
GPTM Timer B Match Interrupt Mask
11
12
TIMER_IMR_TBTOIM
GPTM Timer B Time-Out Interrupt Mask
8
9
TIMER_IMR_WUEIM
32/64-Bit Wide GPTM Write Update Error Interrupt Mask
16
17
TIMER0MIS
GPTM Masked Interrupt Status
0x20
read-write
n
0x0
0x0
TIMER_MIS_CAEMIS
GPTM Timer A Capture Mode Event Masked Interrupt
2
3
TIMER_MIS_CAMMIS
GPTM Timer A Capture Mode Match Masked Interrupt
1
2
TIMER_MIS_CBEMIS
GPTM Timer B Capture Mode Event Masked Interrupt
10
11
TIMER_MIS_CBMMIS
GPTM Timer B Capture Mode Match Masked Interrupt
9
10
TIMER_MIS_RTCMIS
GPTM RTC Masked Interrupt
3
4
TIMER_MIS_TAMMIS
GPTM Timer A Match Masked Interrupt
4
5
TIMER_MIS_TATOMIS
GPTM Timer A Time-Out Masked Interrupt
0
1
TIMER_MIS_TBMMIS
GPTM Timer B Match Masked Interrupt
11
12
TIMER_MIS_TBTOMIS
GPTM Timer B Time-Out Masked Interrupt
8
9
TIMER_MIS_WUEMIS
32/64-Bit Wide GPTM Write Update Error Masked Interrupt Status
16
17
TIMER0PP
GPTM Peripheral Properties
0xFC0
read-write
n
0x0
0x0
TIMER_PP_SIZE
Count Size
0
4
TIMER_PP_SIZE_16
Timer A and Timer B counters are 16 bits each with an 8-bit prescale counter
0x0
TIMER_PP_SIZE_32
Timer A and Timer B counters are 32 bits each with a 16-bit prescale counter
0x1
TIMER0RIS
GPTM Raw Interrupt Status
0x1C
read-write
n
0x0
0x0
TIMER_RIS_CAERIS
GPTM Timer A Capture Mode Event Raw Interrupt
2
3
TIMER_RIS_CAMRIS
GPTM Timer A Capture Mode Match Raw Interrupt
1
2
TIMER_RIS_CBERIS
GPTM Timer B Capture Mode Event Raw Interrupt
10
11
TIMER_RIS_CBMRIS
GPTM Timer B Capture Mode Match Raw Interrupt
9
10
TIMER_RIS_RTCRIS
GPTM RTC Raw Interrupt
3
4
TIMER_RIS_TAMRIS
GPTM Timer A Match Raw Interrupt
4
5
TIMER_RIS_TATORIS
GPTM Timer A Time-Out Raw Interrupt
0
1
TIMER_RIS_TBMRIS
GPTM Timer B Match Raw Interrupt
11
12
TIMER_RIS_TBTORIS
GPTM Timer B Time-Out Raw Interrupt
8
9
TIMER_RIS_WUERIS
32/64-Bit Wide GPTM Write Update Error Raw Interrupt Status
16
17
TIMER0RTCPD
GPTM RTC Predivide
0x58
read-write
n
0x0
0x0
TIMER_RTCPD_RTCPD
RTC Predivide Counter Value
0
16
TIMER0SYNC
GPTM Synchronize
0x10
read-write
n
0x0
0x0
TIMER_SYNC_SYNCT0
Synchronize GPTM Timer 0
0
2
TIMER_SYNC_SYNCT0_NONE
GPTM0 is not affected
0x0
TIMER_SYNC_SYNCT0_TA
A timeout event for Timer A of GPTM0 is triggered
0x1
TIMER_SYNC_SYNCT0_TB
A timeout event for Timer B of GPTM0 is triggered
0x2
TIMER_SYNC_SYNCT0_TATB
A timeout event for both Timer A and Timer B of GPTM0 is triggered
0x3
TIMER_SYNC_SYNCT1
Synchronize GPTM Timer 1
2
4
TIMER_SYNC_SYNCT1_NONE
GPTM1 is not affected
0x0
TIMER_SYNC_SYNCT1_TA
A timeout event for Timer A of GPTM1 is triggered
0x1
TIMER_SYNC_SYNCT1_TB
A timeout event for Timer B of GPTM1 is triggered
0x2
TIMER_SYNC_SYNCT1_TATB
A timeout event for both Timer A and Timer B of GPTM1 is triggered
0x3
TIMER_SYNC_SYNCT2
Synchronize GPTM Timer 2
4
6
TIMER_SYNC_SYNCT2_NONE
GPTM2 is not affected
0x0
TIMER_SYNC_SYNCT2_TA
A timeout event for Timer A of GPTM2 is triggered
0x1
TIMER_SYNC_SYNCT2_TB
A timeout event for Timer B of GPTM2 is triggered
0x2
TIMER_SYNC_SYNCT2_TATB
A timeout event for both Timer A and Timer B of GPTM2 is triggered
0x3
TIMER_SYNC_SYNCT3
Synchronize GPTM Timer 3
6
8
TIMER_SYNC_SYNCT3_NONE
GPTM3 is not affected
0x0
TIMER_SYNC_SYNCT3_TA
A timeout event for Timer A of GPTM3 is triggered
0x1
TIMER_SYNC_SYNCT3_TB
A timeout event for Timer B of GPTM3 is triggered
0x2
TIMER_SYNC_SYNCT3_TATB
A timeout event for both Timer A and Timer B of GPTM3 is triggered
0x3
TIMER_SYNC_SYNCT4
Synchronize GPTM Timer 4
8
10
TIMER_SYNC_SYNCT4_NONE
GPTM4 is not affected
0x0
TIMER_SYNC_SYNCT4_TA
A timeout event for Timer A of GPTM4 is triggered
0x1
TIMER_SYNC_SYNCT4_TB
A timeout event for Timer B of GPTM4 is triggered
0x2
TIMER_SYNC_SYNCT4_TATB
A timeout event for both Timer A and Timer B of GPTM4 is triggered
0x3
TIMER_SYNC_SYNCT5
Synchronize GPTM Timer 5
10
12
TIMER_SYNC_SYNCT5_NONE
GPTM5 is not affected
0x0
TIMER_SYNC_SYNCT5_TA
A timeout event for Timer A of GPTM5 is triggered
0x1
TIMER_SYNC_SYNCT5_TB
A timeout event for Timer B of GPTM5 is triggered
0x2
TIMER_SYNC_SYNCT5_TATB
A timeout event for both Timer A and Timer B of GPTM5 is triggered
0x3
TIMER_SYNC_SYNCWT0
Synchronize GPTM 32/64-Bit Timer 0
12
14
TIMER_SYNC_SYNCWT0_NONE
GPTM 32/64-Bit Timer 0 is not affected
0x0
TIMER_SYNC_SYNCWT0_TA
A timeout event for Timer A of GPTM 32/64-Bit Timer 0 is triggered
0x1
TIMER_SYNC_SYNCWT0_TB
A timeout event for Timer B of GPTM 32/64-Bit Timer 0 is triggered
0x2
TIMER_SYNC_SYNCWT0_TATB
A timeout event for both Timer A and Timer B of GPTM 32/64-Bit Timer 0 is triggered
0x3
TIMER_SYNC_SYNCWT1
Synchronize GPTM 32/64-Bit Timer 1
14
16
TIMER_SYNC_SYNCWT1_NONE
GPTM 32/64-Bit Timer 1 is not affected
0x0
TIMER_SYNC_SYNCWT1_TA
A timeout event for Timer A of GPTM 32/64-Bit Timer 1 is triggered
0x1
TIMER_SYNC_SYNCWT1_TB
A timeout event for Timer B of GPTM 32/64-Bit Timer 1 is triggered
0x2
TIMER_SYNC_SYNCWT1_TATB
A timeout event for both Timer A and Timer B of GPTM 32/64-Bit Timer 1 is triggered
0x3
TIMER_SYNC_SYNCWT2
Synchronize GPTM 32/64-Bit Timer 2
16
18
TIMER_SYNC_SYNCWT2_NONE
GPTM 32/64-Bit Timer 2 is not affected
0x0
TIMER_SYNC_SYNCWT2_TA
A timeout event for Timer A of GPTM 32/64-Bit Timer 2 is triggered
0x1
TIMER_SYNC_SYNCWT2_TB
A timeout event for Timer B of GPTM 32/64-Bit Timer 2 is triggered
0x2
TIMER_SYNC_SYNCWT2_TATB
A timeout event for both Timer A and Timer B of GPTM 32/64-Bit Timer 2 is triggered
0x3
TIMER_SYNC_SYNCWT3
Synchronize GPTM 32/64-Bit Timer 3
18
20
TIMER_SYNC_SYNCWT3_NONE
GPTM 32/64-Bit Timer 3 is not affected
0x0
TIMER_SYNC_SYNCWT3_TA
A timeout event for Timer A of GPTM 32/64-Bit Timer 3 is triggered
0x1
TIMER_SYNC_SYNCWT3_TB
A timeout event for Timer B of GPTM 32/64-Bit Timer 3 is triggered
0x2
TIMER_SYNC_SYNCWT3_TATB
A timeout event for both Timer A and Timer B of GPTM 32/64-Bit Timer 3 is triggered
0x3
TIMER_SYNC_SYNCWT4
Synchronize GPTM 32/64-Bit Timer 4
20
22
TIMER_SYNC_SYNCWT4_NONE
GPTM 32/64-Bit Timer 4 is not affected
0x0
TIMER_SYNC_SYNCWT4_TA
A timeout event for Timer A of GPTM 32/64-Bit Timer 4 is triggered
0x1
TIMER_SYNC_SYNCWT4_TB
A timeout event for Timer B of GPTM 32/64-Bit Timer 4 is triggered
0x2
TIMER_SYNC_SYNCWT4_TATB
A timeout event for both Timer A and Timer B of GPTM 32/64-Bit Timer 4 is triggered
0x3
TIMER_SYNC_SYNCWT5
Synchronize GPTM 32/64-Bit Timer 5
22
24
TIMER_SYNC_SYNCWT5_NONE
GPTM 32/64-Bit Timer 5 is not affected
0x0
TIMER_SYNC_SYNCWT5_TA
A timeout event for Timer A of GPTM 32/64-Bit Timer 5 is triggered
0x1
TIMER_SYNC_SYNCWT5_TB
A timeout event for Timer B of GPTM 32/64-Bit Timer 5 is triggered
0x2
TIMER_SYNC_SYNCWT5_TATB
A timeout event for both Timer A and Timer B of GPTM 32/64-Bit Timer 5 is triggered
0x3
TIMER0TAILR
GPTM Timer A Interval Load
0x28
read-write
n
0x0
0x0
TIMER0TAMATCHR
GPTM Timer A Match
0x30
read-write
n
0x0
0x0
TIMER0TAMR
GPTM Timer A Mode
0x4
read-write
n
0x0
0x0
TIMER_TAMR_TAAMS
GPTM Timer A Alternate Mode Select
3
4
TIMER_TAMR_TACDIR
GPTM Timer A Count Direction
4
5
TIMER_TAMR_TACMR
GPTM Timer A Capture Mode
2
3
TIMER_TAMR_TAILD
GPTM Timer A Interval Load Write
8
9
TIMER_TAMR_TAMIE
GPTM Timer A Match Interrupt Enable
5
6
TIMER_TAMR_TAMR
GPTM Timer A Mode
0
2
TIMER_TAMR_TAMR_1_SHOT
One-Shot Timer mode
0x1
TIMER_TAMR_TAMR_PERIOD
Periodic Timer mode
0x2
TIMER_TAMR_TAMR_CAP
Capture mode
0x3
TIMER_TAMR_TAMRSU
GPTM Timer A Match Register Update
10
11
TIMER_TAMR_TAPLO
GPTM Timer A PWM Legacy Operation
11
12
TIMER_TAMR_TAPWMIE
GPTM Timer A PWM Interrupt Enable
9
10
TIMER_TAMR_TASNAPS
GPTM Timer A Snap-Shot Mode
7
8
TIMER_TAMR_TAWOT
GPTM Timer A Wait-on-Trigger
6
7
TIMER0TAPMR
GPTM TimerA Prescale Match
0x40
read-write
n
0x0
0x0
TIMER_TAPMR_TAPSMR
GPTM TimerA Prescale Match
0
8
TIMER_TAPMR_TAPSMRH
GPTM Timer A Prescale Match High Byte
8
16
TIMER0TAPR
GPTM Timer A Prescale
0x38
read-write
n
0x0
0x0
TIMER_TAPR_TAPSR
GPTM Timer A Prescale
0
8
TIMER_TAPR_TAPSRH
GPTM Timer A Prescale High Byte
8
16
TIMER0TAPS
GPTM Timer A Prescale Snapshot
0x5C
read-write
n
0x0
0x0
TIMER_TAPS_PSS
GPTM Timer A Prescaler Snapshot
0
16
TIMER0TAPV
GPTM Timer A Prescale Value
0x64
read-write
n
0x0
0x0
TIMER_TAPV_PSV
GPTM Timer A Prescaler Value
0
16
TIMER0TAR
GPTM Timer A
0x48
read-write
n
0x0
0x0
TIMER0TAV
GPTM Timer A Value
0x50
read-write
n
0x0
0x0
TIMER0TBILR
GPTM Timer B Interval Load
0x2C
read-write
n
0x0
0x0
TIMER0TBMATCHR
GPTM Timer B Match
0x34
read-write
n
0x0
0x0
TIMER0TBMR
GPTM Timer B Mode
0x8
read-write
n
0x0
0x0
TIMER_TBMR_TBAMS
GPTM Timer B Alternate Mode Select
3
4
TIMER_TBMR_TBCDIR
GPTM Timer B Count Direction
4
5
TIMER_TBMR_TBCMR
GPTM Timer B Capture Mode
2
3
TIMER_TBMR_TBILD
GPTM Timer B Interval Load Write
8
9
TIMER_TBMR_TBMIE
GPTM Timer B Match Interrupt Enable
5
6
TIMER_TBMR_TBMR
GPTM Timer B Mode
0
2
TIMER_TBMR_TBMR_1_SHOT
One-Shot Timer mode
0x1
TIMER_TBMR_TBMR_PERIOD
Periodic Timer mode
0x2
TIMER_TBMR_TBMR_CAP
Capture mode
0x3
TIMER_TBMR_TBMRSU
GPTM Timer B Match Register Update
10
11
TIMER_TBMR_TBPLO
GPTM Timer B PWM Legacy Operation
11
12
TIMER_TBMR_TBPWMIE
GPTM Timer B PWM Interrupt Enable
9
10
TIMER_TBMR_TBSNAPS
GPTM Timer B Snap-Shot Mode
7
8
TIMER_TBMR_TBWOT
GPTM Timer B Wait-on-Trigger
6
7
TIMER0TBPMR
GPTM TimerB Prescale Match
0x44
read-write
n
0x0
0x0
TIMER_TBPMR_TBPSMR
GPTM TimerB Prescale Match
0
8
TIMER_TBPMR_TBPSMRH
GPTM Timer B Prescale Match High Byte
8
16
TIMER0TBPR
GPTM Timer B Prescale
0x3C
read-write
n
0x0
0x0
TIMER_TBPR_TBPSR
GPTM Timer B Prescale
0
8
TIMER_TBPR_TBPSRH
GPTM Timer B Prescale High Byte
8
16
TIMER0TBPS
GPTM Timer B Prescale Snapshot
0x60
read-write
n
0x0
0x0
TIMER_TBPS_PSS
GPTM Timer A Prescaler Value
0
16
TIMER0TBPV
GPTM Timer B Prescale Value
0x68
read-write
n
0x0
0x0
TIMER_TBPV_PSV
GPTM Timer B Prescaler Value
0
16
TIMER0TBR
GPTM Timer B
0x4C
read-write
n
0x0
0x0
TIMER0TBV
GPTM Timer B Value
0x54
read-write
n
0x0
0x0
TIMER4
Register map for TIMER0 peripheral
TIMER
0x0
0x0
0x1000
registers
n
TIMER4A
70
TIMER4B
71
CFG
GPTM Configuration
0x0
-1
read-write
n
0x0
0x0
TIMER_CFG
GPTM Configuration
0
3
TIMER_CFG_32_BIT_TIMER
For a 16/32-bit timer, this value selects the 32-bit timer configuration
0x0
TIMER_CFG_32_BIT_RTC
For a 16/32-bit timer, this value selects the 32-bit real-time clock (RTC) counter configuration
0x1
TIMER_CFG_16_BIT
For a 16/32-bit timer, this value selects the 16-bit timer configuration
0x4
CTL
GPTM Control
0xC
-1
read-write
n
0x0
0x0
TIMER_CTL_RTCEN
GPTM RTC Stall Enable
4
5
TIMER_CTL_TAEN
GPTM Timer A Enable
0
1
TIMER_CTL_TAEVENT
GPTM Timer A Event Mode
2
4
TIMER_CTL_TAEVENT_POS
Positive edge
0x0
TIMER_CTL_TAEVENT_NEG
Negative edge
0x1
TIMER_CTL_TAEVENT_BOTH
Both edges
0x3
TIMER_CTL_TAOTE
GPTM Timer A Output Trigger Enable
5
6
TIMER_CTL_TAPWML
GPTM Timer A PWM Output Level
6
7
TIMER_CTL_TASTALL
GPTM Timer A Stall Enable
1
2
TIMER_CTL_TBEN
GPTM Timer B Enable
8
9
TIMER_CTL_TBEVENT
GPTM Timer B Event Mode
10
12
TIMER_CTL_TBEVENT_POS
Positive edge
0x0
TIMER_CTL_TBEVENT_NEG
Negative edge
0x1
TIMER_CTL_TBEVENT_BOTH
Both edges
0x3
TIMER_CTL_TBOTE
GPTM Timer B Output Trigger Enable
13
14
TIMER_CTL_TBPWML
GPTM Timer B PWM Output Level
14
15
TIMER_CTL_TBSTALL
GPTM Timer B Stall Enable
9
10
ICR
GPTM Interrupt Clear
0x24
-1
write-only
n
0x0
0x0
TIMER_ICR_CAECINT
GPTM Timer A Capture Mode Event Interrupt Clear
2
3
write-only
TIMER_ICR_CAMCINT
GPTM Timer A Capture Mode Match Interrupt Clear
1
2
write-only
TIMER_ICR_CBECINT
GPTM Timer B Capture Mode Event Interrupt Clear
10
11
write-only
TIMER_ICR_CBMCINT
GPTM Timer B Capture Mode Match Interrupt Clear
9
10
write-only
TIMER_ICR_RTCCINT
GPTM RTC Interrupt Clear
3
4
write-only
TIMER_ICR_TAMCINT
GPTM Timer A Match Interrupt Clear
4
5
write-only
TIMER_ICR_TATOCINT
GPTM Timer A Time-Out Raw Interrupt
0
1
write-only
TIMER_ICR_TBMCINT
GPTM Timer B Match Interrupt Clear
11
12
write-only
TIMER_ICR_TBTOCINT
GPTM Timer B Time-Out Interrupt Clear
8
9
write-only
TIMER_ICR_WUECINT
32/64-Bit Wide GPTM Write Update Error Interrupt Clear
16
17
write-only
IMR
GPTM Interrupt Mask
0x18
-1
read-write
n
0x0
0x0
TIMER_IMR_CAEIM
GPTM Timer A Capture Mode Event Interrupt Mask
2
3
TIMER_IMR_CAMIM
GPTM Timer A Capture Mode Match Interrupt Mask
1
2
TIMER_IMR_CBEIM
GPTM Timer B Capture Mode Event Interrupt Mask
10
11
TIMER_IMR_CBMIM
GPTM Timer B Capture Mode Match Interrupt Mask
9
10
TIMER_IMR_RTCIM
GPTM RTC Interrupt Mask
3
4
TIMER_IMR_TAMIM
GPTM Timer A Match Interrupt Mask
4
5
TIMER_IMR_TATOIM
GPTM Timer A Time-Out Interrupt Mask
0
1
TIMER_IMR_TBMIM
GPTM Timer B Match Interrupt Mask
11
12
TIMER_IMR_TBTOIM
GPTM Timer B Time-Out Interrupt Mask
8
9
TIMER_IMR_WUEIM
32/64-Bit Wide GPTM Write Update Error Interrupt Mask
16
17
MIS
GPTM Masked Interrupt Status
0x20
-1
read-write
n
0x0
0x0
TIMER_MIS_CAEMIS
GPTM Timer A Capture Mode Event Masked Interrupt
2
3
TIMER_MIS_CAMMIS
GPTM Timer A Capture Mode Match Masked Interrupt
1
2
TIMER_MIS_CBEMIS
GPTM Timer B Capture Mode Event Masked Interrupt
10
11
TIMER_MIS_CBMMIS
GPTM Timer B Capture Mode Match Masked Interrupt
9
10
TIMER_MIS_RTCMIS
GPTM RTC Masked Interrupt
3
4
TIMER_MIS_TAMMIS
GPTM Timer A Match Masked Interrupt
4
5
TIMER_MIS_TATOMIS
GPTM Timer A Time-Out Masked Interrupt
0
1
TIMER_MIS_TBMMIS
GPTM Timer B Match Masked Interrupt
11
12
TIMER_MIS_TBTOMIS
GPTM Timer B Time-Out Masked Interrupt
8
9
TIMER_MIS_WUEMIS
32/64-Bit Wide GPTM Write Update Error Masked Interrupt Status
16
17
PP
GPTM Peripheral Properties
0xFC0
-1
read-write
n
0x0
0x0
TIMER_PP_SIZE
Count Size
0
4
TIMER_PP_SIZE_16
Timer A and Timer B counters are 16 bits each with an 8-bit prescale counter
0x0
TIMER_PP_SIZE_32
Timer A and Timer B counters are 32 bits each with a 16-bit prescale counter
0x1
RIS
GPTM Raw Interrupt Status
0x1C
-1
read-write
n
0x0
0x0
TIMER_RIS_CAERIS
GPTM Timer A Capture Mode Event Raw Interrupt
2
3
TIMER_RIS_CAMRIS
GPTM Timer A Capture Mode Match Raw Interrupt
1
2
TIMER_RIS_CBERIS
GPTM Timer B Capture Mode Event Raw Interrupt
10
11
TIMER_RIS_CBMRIS
GPTM Timer B Capture Mode Match Raw Interrupt
9
10
TIMER_RIS_RTCRIS
GPTM RTC Raw Interrupt
3
4
TIMER_RIS_TAMRIS
GPTM Timer A Match Raw Interrupt
4
5
TIMER_RIS_TATORIS
GPTM Timer A Time-Out Raw Interrupt
0
1
TIMER_RIS_TBMRIS
GPTM Timer B Match Raw Interrupt
11
12
TIMER_RIS_TBTORIS
GPTM Timer B Time-Out Raw Interrupt
8
9
TIMER_RIS_WUERIS
32/64-Bit Wide GPTM Write Update Error Raw Interrupt Status
16
17
RTCPD
GPTM RTC Predivide
0x58
-1
read-write
n
0x0
0x0
TIMER_RTCPD_RTCPD
RTC Predivide Counter Value
0
16
SYNC
GPTM Synchronize
0x10
-1
read-write
n
0x0
0x0
TIMER_SYNC_SYNCT0
Synchronize GPTM Timer 0
0
2
TIMER_SYNC_SYNCT0_NONE
GPTM0 is not affected
0x0
TIMER_SYNC_SYNCT0_TA
A timeout event for Timer A of GPTM0 is triggered
0x1
TIMER_SYNC_SYNCT0_TB
A timeout event for Timer B of GPTM0 is triggered
0x2
TIMER_SYNC_SYNCT0_TATB
A timeout event for both Timer A and Timer B of GPTM0 is triggered
0x3
TIMER_SYNC_SYNCT1
Synchronize GPTM Timer 1
2
4
TIMER_SYNC_SYNCT1_NONE
GPTM1 is not affected
0x0
TIMER_SYNC_SYNCT1_TA
A timeout event for Timer A of GPTM1 is triggered
0x1
TIMER_SYNC_SYNCT1_TB
A timeout event for Timer B of GPTM1 is triggered
0x2
TIMER_SYNC_SYNCT1_TATB
A timeout event for both Timer A and Timer B of GPTM1 is triggered
0x3
TIMER_SYNC_SYNCT2
Synchronize GPTM Timer 2
4
6
TIMER_SYNC_SYNCT2_NONE
GPTM2 is not affected
0x0
TIMER_SYNC_SYNCT2_TA
A timeout event for Timer A of GPTM2 is triggered
0x1
TIMER_SYNC_SYNCT2_TB
A timeout event for Timer B of GPTM2 is triggered
0x2
TIMER_SYNC_SYNCT2_TATB
A timeout event for both Timer A and Timer B of GPTM2 is triggered
0x3
TIMER_SYNC_SYNCT3
Synchronize GPTM Timer 3
6
8
TIMER_SYNC_SYNCT3_NONE
GPTM3 is not affected
0x0
TIMER_SYNC_SYNCT3_TA
A timeout event for Timer A of GPTM3 is triggered
0x1
TIMER_SYNC_SYNCT3_TB
A timeout event for Timer B of GPTM3 is triggered
0x2
TIMER_SYNC_SYNCT3_TATB
A timeout event for both Timer A and Timer B of GPTM3 is triggered
0x3
TIMER_SYNC_SYNCT4
Synchronize GPTM Timer 4
8
10
TIMER_SYNC_SYNCT4_NONE
GPTM4 is not affected
0x0
TIMER_SYNC_SYNCT4_TA
A timeout event for Timer A of GPTM4 is triggered
0x1
TIMER_SYNC_SYNCT4_TB
A timeout event for Timer B of GPTM4 is triggered
0x2
TIMER_SYNC_SYNCT4_TATB
A timeout event for both Timer A and Timer B of GPTM4 is triggered
0x3
TIMER_SYNC_SYNCT5
Synchronize GPTM Timer 5
10
12
TIMER_SYNC_SYNCT5_NONE
GPTM5 is not affected
0x0
TIMER_SYNC_SYNCT5_TA
A timeout event for Timer A of GPTM5 is triggered
0x1
TIMER_SYNC_SYNCT5_TB
A timeout event for Timer B of GPTM5 is triggered
0x2
TIMER_SYNC_SYNCT5_TATB
A timeout event for both Timer A and Timer B of GPTM5 is triggered
0x3
TIMER_SYNC_SYNCWT0
Synchronize GPTM 32/64-Bit Timer 0
12
14
TIMER_SYNC_SYNCWT0_NONE
GPTM 32/64-Bit Timer 0 is not affected
0x0
TIMER_SYNC_SYNCWT0_TA
A timeout event for Timer A of GPTM 32/64-Bit Timer 0 is triggered
0x1
TIMER_SYNC_SYNCWT0_TB
A timeout event for Timer B of GPTM 32/64-Bit Timer 0 is triggered
0x2
TIMER_SYNC_SYNCWT0_TATB
A timeout event for both Timer A and Timer B of GPTM 32/64-Bit Timer 0 is triggered
0x3
TIMER_SYNC_SYNCWT1
Synchronize GPTM 32/64-Bit Timer 1
14
16
TIMER_SYNC_SYNCWT1_NONE
GPTM 32/64-Bit Timer 1 is not affected
0x0
TIMER_SYNC_SYNCWT1_TA
A timeout event for Timer A of GPTM 32/64-Bit Timer 1 is triggered
0x1
TIMER_SYNC_SYNCWT1_TB
A timeout event for Timer B of GPTM 32/64-Bit Timer 1 is triggered
0x2
TIMER_SYNC_SYNCWT1_TATB
A timeout event for both Timer A and Timer B of GPTM 32/64-Bit Timer 1 is triggered
0x3
TIMER_SYNC_SYNCWT2
Synchronize GPTM 32/64-Bit Timer 2
16
18
TIMER_SYNC_SYNCWT2_NONE
GPTM 32/64-Bit Timer 2 is not affected
0x0
TIMER_SYNC_SYNCWT2_TA
A timeout event for Timer A of GPTM 32/64-Bit Timer 2 is triggered
0x1
TIMER_SYNC_SYNCWT2_TB
A timeout event for Timer B of GPTM 32/64-Bit Timer 2 is triggered
0x2
TIMER_SYNC_SYNCWT2_TATB
A timeout event for both Timer A and Timer B of GPTM 32/64-Bit Timer 2 is triggered
0x3
TIMER_SYNC_SYNCWT3
Synchronize GPTM 32/64-Bit Timer 3
18
20
TIMER_SYNC_SYNCWT3_NONE
GPTM 32/64-Bit Timer 3 is not affected
0x0
TIMER_SYNC_SYNCWT3_TA
A timeout event for Timer A of GPTM 32/64-Bit Timer 3 is triggered
0x1
TIMER_SYNC_SYNCWT3_TB
A timeout event for Timer B of GPTM 32/64-Bit Timer 3 is triggered
0x2
TIMER_SYNC_SYNCWT3_TATB
A timeout event for both Timer A and Timer B of GPTM 32/64-Bit Timer 3 is triggered
0x3
TIMER_SYNC_SYNCWT4
Synchronize GPTM 32/64-Bit Timer 4
20
22
TIMER_SYNC_SYNCWT4_NONE
GPTM 32/64-Bit Timer 4 is not affected
0x0
TIMER_SYNC_SYNCWT4_TA
A timeout event for Timer A of GPTM 32/64-Bit Timer 4 is triggered
0x1
TIMER_SYNC_SYNCWT4_TB
A timeout event for Timer B of GPTM 32/64-Bit Timer 4 is triggered
0x2
TIMER_SYNC_SYNCWT4_TATB
A timeout event for both Timer A and Timer B of GPTM 32/64-Bit Timer 4 is triggered
0x3
TIMER_SYNC_SYNCWT5
Synchronize GPTM 32/64-Bit Timer 5
22
24
TIMER_SYNC_SYNCWT5_NONE
GPTM 32/64-Bit Timer 5 is not affected
0x0
TIMER_SYNC_SYNCWT5_TA
A timeout event for Timer A of GPTM 32/64-Bit Timer 5 is triggered
0x1
TIMER_SYNC_SYNCWT5_TB
A timeout event for Timer B of GPTM 32/64-Bit Timer 5 is triggered
0x2
TIMER_SYNC_SYNCWT5_TATB
A timeout event for both Timer A and Timer B of GPTM 32/64-Bit Timer 5 is triggered
0x3
TAILR
GPTM Timer A Interval Load
0x28
-1
read-write
n
0x0
0x0
TAMATCHR
GPTM Timer A Match
0x30
-1
read-write
n
0x0
0x0
TAMR
GPTM Timer A Mode
0x4
-1
read-write
n
0x0
0x0
TIMER_TAMR_TAAMS
GPTM Timer A Alternate Mode Select
3
4
TIMER_TAMR_TACDIR
GPTM Timer A Count Direction
4
5
TIMER_TAMR_TACMR
GPTM Timer A Capture Mode
2
3
TIMER_TAMR_TAILD
GPTM Timer A Interval Load Write
8
9
TIMER_TAMR_TAMIE
GPTM Timer A Match Interrupt Enable
5
6
TIMER_TAMR_TAMR
GPTM Timer A Mode
0
2
TIMER_TAMR_TAMR_1_SHOT
One-Shot Timer mode
0x1
TIMER_TAMR_TAMR_PERIOD
Periodic Timer mode
0x2
TIMER_TAMR_TAMR_CAP
Capture mode
0x3
TIMER_TAMR_TAMRSU
GPTM Timer A Match Register Update
10
11
TIMER_TAMR_TAPLO
GPTM Timer A PWM Legacy Operation
11
12
TIMER_TAMR_TAPWMIE
GPTM Timer A PWM Interrupt Enable
9
10
TIMER_TAMR_TASNAPS
GPTM Timer A Snap-Shot Mode
7
8
TIMER_TAMR_TAWOT
GPTM Timer A Wait-on-Trigger
6
7
TAPMR
GPTM TimerA Prescale Match
0x40
-1
read-write
n
0x0
0x0
TIMER_TAPMR_TAPSMR
GPTM TimerA Prescale Match
0
8
TIMER_TAPMR_TAPSMRH
GPTM Timer A Prescale Match High Byte
8
16
TAPR
GPTM Timer A Prescale
0x38
-1
read-write
n
0x0
0x0
TIMER_TAPR_TAPSR
GPTM Timer A Prescale
0
8
TIMER_TAPR_TAPSRH
GPTM Timer A Prescale High Byte
8
16
TAPS
GPTM Timer A Prescale Snapshot
0x5C
-1
read-write
n
0x0
0x0
TIMER_TAPS_PSS
GPTM Timer A Prescaler Snapshot
0
16
TAPV
GPTM Timer A Prescale Value
0x64
-1
read-write
n
0x0
0x0
TIMER_TAPV_PSV
GPTM Timer A Prescaler Value
0
16
TAR
GPTM Timer A
0x48
-1
read-write
n
0x0
0x0
TAV
GPTM Timer A Value
0x50
-1
read-write
n
0x0
0x0
TBILR
GPTM Timer B Interval Load
0x2C
-1
read-write
n
0x0
0x0
TBMATCHR
GPTM Timer B Match
0x34
-1
read-write
n
0x0
0x0
TBMR
GPTM Timer B Mode
0x8
-1
read-write
n
0x0
0x0
TIMER_TBMR_TBAMS
GPTM Timer B Alternate Mode Select
3
4
TIMER_TBMR_TBCDIR
GPTM Timer B Count Direction
4
5
TIMER_TBMR_TBCMR
GPTM Timer B Capture Mode
2
3
TIMER_TBMR_TBILD
GPTM Timer B Interval Load Write
8
9
TIMER_TBMR_TBMIE
GPTM Timer B Match Interrupt Enable
5
6
TIMER_TBMR_TBMR
GPTM Timer B Mode
0
2
TIMER_TBMR_TBMR_1_SHOT
One-Shot Timer mode
0x1
TIMER_TBMR_TBMR_PERIOD
Periodic Timer mode
0x2
TIMER_TBMR_TBMR_CAP
Capture mode
0x3
TIMER_TBMR_TBMRSU
GPTM Timer B Match Register Update
10
11
TIMER_TBMR_TBPLO
GPTM Timer B PWM Legacy Operation
11
12
TIMER_TBMR_TBPWMIE
GPTM Timer B PWM Interrupt Enable
9
10
TIMER_TBMR_TBSNAPS
GPTM Timer B Snap-Shot Mode
7
8
TIMER_TBMR_TBWOT
GPTM Timer B Wait-on-Trigger
6
7
TBPMR
GPTM TimerB Prescale Match
0x44
-1
read-write
n
0x0
0x0
TIMER_TBPMR_TBPSMR
GPTM TimerB Prescale Match
0
8
TIMER_TBPMR_TBPSMRH
GPTM Timer B Prescale Match High Byte
8
16
TBPR
GPTM Timer B Prescale
0x3C
-1
read-write
n
0x0
0x0
TIMER_TBPR_TBPSR
GPTM Timer B Prescale
0
8
TIMER_TBPR_TBPSRH
GPTM Timer B Prescale High Byte
8
16
TBPS
GPTM Timer B Prescale Snapshot
0x60
-1
read-write
n
0x0
0x0
TIMER_TBPS_PSS
GPTM Timer A Prescaler Value
0
16
TBPV
GPTM Timer B Prescale Value
0x68
-1
read-write
n
0x0
0x0
TIMER_TBPV_PSV
GPTM Timer B Prescaler Value
0
16
TBR
GPTM Timer B
0x4C
-1
read-write
n
0x0
0x0
TBV
GPTM Timer B Value
0x54
-1
read-write
n
0x0
0x0
TIMER0CFG
GPTM Configuration
0x0
read-write
n
0x0
0x0
TIMER_CFG
GPTM Configuration
0
3
TIMER_CFG_32_BIT_TIMER
For a 16/32-bit timer, this value selects the 32-bit timer configuration
0x0
TIMER_CFG_32_BIT_RTC
For a 16/32-bit timer, this value selects the 32-bit real-time clock (RTC) counter configuration
0x1
TIMER_CFG_16_BIT
For a 16/32-bit timer, this value selects the 16-bit timer configuration
0x4
TIMER0CTL
GPTM Control
0xC
read-write
n
0x0
0x0
TIMER_CTL_RTCEN
GPTM RTC Stall Enable
4
5
TIMER_CTL_TAEN
GPTM Timer A Enable
0
1
TIMER_CTL_TAEVENT
GPTM Timer A Event Mode
2
4
TIMER_CTL_TAEVENT_POS
Positive edge
0x0
TIMER_CTL_TAEVENT_NEG
Negative edge
0x1
TIMER_CTL_TAEVENT_BOTH
Both edges
0x3
TIMER_CTL_TAOTE
GPTM Timer A Output Trigger Enable
5
6
TIMER_CTL_TAPWML
GPTM Timer A PWM Output Level
6
7
TIMER_CTL_TASTALL
GPTM Timer A Stall Enable
1
2
TIMER_CTL_TBEN
GPTM Timer B Enable
8
9
TIMER_CTL_TBEVENT
GPTM Timer B Event Mode
10
12
TIMER_CTL_TBEVENT_POS
Positive edge
0x0
TIMER_CTL_TBEVENT_NEG
Negative edge
0x1
TIMER_CTL_TBEVENT_BOTH
Both edges
0x3
TIMER_CTL_TBOTE
GPTM Timer B Output Trigger Enable
13
14
TIMER_CTL_TBPWML
GPTM Timer B PWM Output Level
14
15
TIMER_CTL_TBSTALL
GPTM Timer B Stall Enable
9
10
TIMER0ICR
GPTM Interrupt Clear
0x24
write-only
n
0x0
0x0
TIMER_ICR_CAECINT
GPTM Timer A Capture Mode Event Interrupt Clear
2
3
write-only
TIMER_ICR_CAMCINT
GPTM Timer A Capture Mode Match Interrupt Clear
1
2
write-only
TIMER_ICR_CBECINT
GPTM Timer B Capture Mode Event Interrupt Clear
10
11
write-only
TIMER_ICR_CBMCINT
GPTM Timer B Capture Mode Match Interrupt Clear
9
10
write-only
TIMER_ICR_RTCCINT
GPTM RTC Interrupt Clear
3
4
write-only
TIMER_ICR_TAMCINT
GPTM Timer A Match Interrupt Clear
4
5
write-only
TIMER_ICR_TATOCINT
GPTM Timer A Time-Out Raw Interrupt
0
1
write-only
TIMER_ICR_TBMCINT
GPTM Timer B Match Interrupt Clear
11
12
write-only
TIMER_ICR_TBTOCINT
GPTM Timer B Time-Out Interrupt Clear
8
9
write-only
TIMER_ICR_WUECINT
32/64-Bit Wide GPTM Write Update Error Interrupt Clear
16
17
write-only
TIMER0IMR
GPTM Interrupt Mask
0x18
read-write
n
0x0
0x0
TIMER_IMR_CAEIM
GPTM Timer A Capture Mode Event Interrupt Mask
2
3
TIMER_IMR_CAMIM
GPTM Timer A Capture Mode Match Interrupt Mask
1
2
TIMER_IMR_CBEIM
GPTM Timer B Capture Mode Event Interrupt Mask
10
11
TIMER_IMR_CBMIM
GPTM Timer B Capture Mode Match Interrupt Mask
9
10
TIMER_IMR_RTCIM
GPTM RTC Interrupt Mask
3
4
TIMER_IMR_TAMIM
GPTM Timer A Match Interrupt Mask
4
5
TIMER_IMR_TATOIM
GPTM Timer A Time-Out Interrupt Mask
0
1
TIMER_IMR_TBMIM
GPTM Timer B Match Interrupt Mask
11
12
TIMER_IMR_TBTOIM
GPTM Timer B Time-Out Interrupt Mask
8
9
TIMER_IMR_WUEIM
32/64-Bit Wide GPTM Write Update Error Interrupt Mask
16
17
TIMER0MIS
GPTM Masked Interrupt Status
0x20
read-write
n
0x0
0x0
TIMER_MIS_CAEMIS
GPTM Timer A Capture Mode Event Masked Interrupt
2
3
TIMER_MIS_CAMMIS
GPTM Timer A Capture Mode Match Masked Interrupt
1
2
TIMER_MIS_CBEMIS
GPTM Timer B Capture Mode Event Masked Interrupt
10
11
TIMER_MIS_CBMMIS
GPTM Timer B Capture Mode Match Masked Interrupt
9
10
TIMER_MIS_RTCMIS
GPTM RTC Masked Interrupt
3
4
TIMER_MIS_TAMMIS
GPTM Timer A Match Masked Interrupt
4
5
TIMER_MIS_TATOMIS
GPTM Timer A Time-Out Masked Interrupt
0
1
TIMER_MIS_TBMMIS
GPTM Timer B Match Masked Interrupt
11
12
TIMER_MIS_TBTOMIS
GPTM Timer B Time-Out Masked Interrupt
8
9
TIMER_MIS_WUEMIS
32/64-Bit Wide GPTM Write Update Error Masked Interrupt Status
16
17
TIMER0PP
GPTM Peripheral Properties
0xFC0
read-write
n
0x0
0x0
TIMER_PP_SIZE
Count Size
0
4
TIMER_PP_SIZE_16
Timer A and Timer B counters are 16 bits each with an 8-bit prescale counter
0x0
TIMER_PP_SIZE_32
Timer A and Timer B counters are 32 bits each with a 16-bit prescale counter
0x1
TIMER0RIS
GPTM Raw Interrupt Status
0x1C
read-write
n
0x0
0x0
TIMER_RIS_CAERIS
GPTM Timer A Capture Mode Event Raw Interrupt
2
3
TIMER_RIS_CAMRIS
GPTM Timer A Capture Mode Match Raw Interrupt
1
2
TIMER_RIS_CBERIS
GPTM Timer B Capture Mode Event Raw Interrupt
10
11
TIMER_RIS_CBMRIS
GPTM Timer B Capture Mode Match Raw Interrupt
9
10
TIMER_RIS_RTCRIS
GPTM RTC Raw Interrupt
3
4
TIMER_RIS_TAMRIS
GPTM Timer A Match Raw Interrupt
4
5
TIMER_RIS_TATORIS
GPTM Timer A Time-Out Raw Interrupt
0
1
TIMER_RIS_TBMRIS
GPTM Timer B Match Raw Interrupt
11
12
TIMER_RIS_TBTORIS
GPTM Timer B Time-Out Raw Interrupt
8
9
TIMER_RIS_WUERIS
32/64-Bit Wide GPTM Write Update Error Raw Interrupt Status
16
17
TIMER0RTCPD
GPTM RTC Predivide
0x58
read-write
n
0x0
0x0
TIMER_RTCPD_RTCPD
RTC Predivide Counter Value
0
16
TIMER0SYNC
GPTM Synchronize
0x10
read-write
n
0x0
0x0
TIMER_SYNC_SYNCT0
Synchronize GPTM Timer 0
0
2
TIMER_SYNC_SYNCT0_NONE
GPTM0 is not affected
0x0
TIMER_SYNC_SYNCT0_TA
A timeout event for Timer A of GPTM0 is triggered
0x1
TIMER_SYNC_SYNCT0_TB
A timeout event for Timer B of GPTM0 is triggered
0x2
TIMER_SYNC_SYNCT0_TATB
A timeout event for both Timer A and Timer B of GPTM0 is triggered
0x3
TIMER_SYNC_SYNCT1
Synchronize GPTM Timer 1
2
4
TIMER_SYNC_SYNCT1_NONE
GPTM1 is not affected
0x0
TIMER_SYNC_SYNCT1_TA
A timeout event for Timer A of GPTM1 is triggered
0x1
TIMER_SYNC_SYNCT1_TB
A timeout event for Timer B of GPTM1 is triggered
0x2
TIMER_SYNC_SYNCT1_TATB
A timeout event for both Timer A and Timer B of GPTM1 is triggered
0x3
TIMER_SYNC_SYNCT2
Synchronize GPTM Timer 2
4
6
TIMER_SYNC_SYNCT2_NONE
GPTM2 is not affected
0x0
TIMER_SYNC_SYNCT2_TA
A timeout event for Timer A of GPTM2 is triggered
0x1
TIMER_SYNC_SYNCT2_TB
A timeout event for Timer B of GPTM2 is triggered
0x2
TIMER_SYNC_SYNCT2_TATB
A timeout event for both Timer A and Timer B of GPTM2 is triggered
0x3
TIMER_SYNC_SYNCT3
Synchronize GPTM Timer 3
6
8
TIMER_SYNC_SYNCT3_NONE
GPTM3 is not affected
0x0
TIMER_SYNC_SYNCT3_TA
A timeout event for Timer A of GPTM3 is triggered
0x1
TIMER_SYNC_SYNCT3_TB
A timeout event for Timer B of GPTM3 is triggered
0x2
TIMER_SYNC_SYNCT3_TATB
A timeout event for both Timer A and Timer B of GPTM3 is triggered
0x3
TIMER_SYNC_SYNCT4
Synchronize GPTM Timer 4
8
10
TIMER_SYNC_SYNCT4_NONE
GPTM4 is not affected
0x0
TIMER_SYNC_SYNCT4_TA
A timeout event for Timer A of GPTM4 is triggered
0x1
TIMER_SYNC_SYNCT4_TB
A timeout event for Timer B of GPTM4 is triggered
0x2
TIMER_SYNC_SYNCT4_TATB
A timeout event for both Timer A and Timer B of GPTM4 is triggered
0x3
TIMER_SYNC_SYNCT5
Synchronize GPTM Timer 5
10
12
TIMER_SYNC_SYNCT5_NONE
GPTM5 is not affected
0x0
TIMER_SYNC_SYNCT5_TA
A timeout event for Timer A of GPTM5 is triggered
0x1
TIMER_SYNC_SYNCT5_TB
A timeout event for Timer B of GPTM5 is triggered
0x2
TIMER_SYNC_SYNCT5_TATB
A timeout event for both Timer A and Timer B of GPTM5 is triggered
0x3
TIMER_SYNC_SYNCWT0
Synchronize GPTM 32/64-Bit Timer 0
12
14
TIMER_SYNC_SYNCWT0_NONE
GPTM 32/64-Bit Timer 0 is not affected
0x0
TIMER_SYNC_SYNCWT0_TA
A timeout event for Timer A of GPTM 32/64-Bit Timer 0 is triggered
0x1
TIMER_SYNC_SYNCWT0_TB
A timeout event for Timer B of GPTM 32/64-Bit Timer 0 is triggered
0x2
TIMER_SYNC_SYNCWT0_TATB
A timeout event for both Timer A and Timer B of GPTM 32/64-Bit Timer 0 is triggered
0x3
TIMER_SYNC_SYNCWT1
Synchronize GPTM 32/64-Bit Timer 1
14
16
TIMER_SYNC_SYNCWT1_NONE
GPTM 32/64-Bit Timer 1 is not affected
0x0
TIMER_SYNC_SYNCWT1_TA
A timeout event for Timer A of GPTM 32/64-Bit Timer 1 is triggered
0x1
TIMER_SYNC_SYNCWT1_TB
A timeout event for Timer B of GPTM 32/64-Bit Timer 1 is triggered
0x2
TIMER_SYNC_SYNCWT1_TATB
A timeout event for both Timer A and Timer B of GPTM 32/64-Bit Timer 1 is triggered
0x3
TIMER_SYNC_SYNCWT2
Synchronize GPTM 32/64-Bit Timer 2
16
18
TIMER_SYNC_SYNCWT2_NONE
GPTM 32/64-Bit Timer 2 is not affected
0x0
TIMER_SYNC_SYNCWT2_TA
A timeout event for Timer A of GPTM 32/64-Bit Timer 2 is triggered
0x1
TIMER_SYNC_SYNCWT2_TB
A timeout event for Timer B of GPTM 32/64-Bit Timer 2 is triggered
0x2
TIMER_SYNC_SYNCWT2_TATB
A timeout event for both Timer A and Timer B of GPTM 32/64-Bit Timer 2 is triggered
0x3
TIMER_SYNC_SYNCWT3
Synchronize GPTM 32/64-Bit Timer 3
18
20
TIMER_SYNC_SYNCWT3_NONE
GPTM 32/64-Bit Timer 3 is not affected
0x0
TIMER_SYNC_SYNCWT3_TA
A timeout event for Timer A of GPTM 32/64-Bit Timer 3 is triggered
0x1
TIMER_SYNC_SYNCWT3_TB
A timeout event for Timer B of GPTM 32/64-Bit Timer 3 is triggered
0x2
TIMER_SYNC_SYNCWT3_TATB
A timeout event for both Timer A and Timer B of GPTM 32/64-Bit Timer 3 is triggered
0x3
TIMER_SYNC_SYNCWT4
Synchronize GPTM 32/64-Bit Timer 4
20
22
TIMER_SYNC_SYNCWT4_NONE
GPTM 32/64-Bit Timer 4 is not affected
0x0
TIMER_SYNC_SYNCWT4_TA
A timeout event for Timer A of GPTM 32/64-Bit Timer 4 is triggered
0x1
TIMER_SYNC_SYNCWT4_TB
A timeout event for Timer B of GPTM 32/64-Bit Timer 4 is triggered
0x2
TIMER_SYNC_SYNCWT4_TATB
A timeout event for both Timer A and Timer B of GPTM 32/64-Bit Timer 4 is triggered
0x3
TIMER_SYNC_SYNCWT5
Synchronize GPTM 32/64-Bit Timer 5
22
24
TIMER_SYNC_SYNCWT5_NONE
GPTM 32/64-Bit Timer 5 is not affected
0x0
TIMER_SYNC_SYNCWT5_TA
A timeout event for Timer A of GPTM 32/64-Bit Timer 5 is triggered
0x1
TIMER_SYNC_SYNCWT5_TB
A timeout event for Timer B of GPTM 32/64-Bit Timer 5 is triggered
0x2
TIMER_SYNC_SYNCWT5_TATB
A timeout event for both Timer A and Timer B of GPTM 32/64-Bit Timer 5 is triggered
0x3
TIMER0TAILR
GPTM Timer A Interval Load
0x28
read-write
n
0x0
0x0
TIMER0TAMATCHR
GPTM Timer A Match
0x30
read-write
n
0x0
0x0
TIMER0TAMR
GPTM Timer A Mode
0x4
read-write
n
0x0
0x0
TIMER_TAMR_TAAMS
GPTM Timer A Alternate Mode Select
3
4
TIMER_TAMR_TACDIR
GPTM Timer A Count Direction
4
5
TIMER_TAMR_TACMR
GPTM Timer A Capture Mode
2
3
TIMER_TAMR_TAILD
GPTM Timer A Interval Load Write
8
9
TIMER_TAMR_TAMIE
GPTM Timer A Match Interrupt Enable
5
6
TIMER_TAMR_TAMR
GPTM Timer A Mode
0
2
TIMER_TAMR_TAMR_1_SHOT
One-Shot Timer mode
0x1
TIMER_TAMR_TAMR_PERIOD
Periodic Timer mode
0x2
TIMER_TAMR_TAMR_CAP
Capture mode
0x3
TIMER_TAMR_TAMRSU
GPTM Timer A Match Register Update
10
11
TIMER_TAMR_TAPLO
GPTM Timer A PWM Legacy Operation
11
12
TIMER_TAMR_TAPWMIE
GPTM Timer A PWM Interrupt Enable
9
10
TIMER_TAMR_TASNAPS
GPTM Timer A Snap-Shot Mode
7
8
TIMER_TAMR_TAWOT
GPTM Timer A Wait-on-Trigger
6
7
TIMER0TAPMR
GPTM TimerA Prescale Match
0x40
read-write
n
0x0
0x0
TIMER_TAPMR_TAPSMR
GPTM TimerA Prescale Match
0
8
TIMER_TAPMR_TAPSMRH
GPTM Timer A Prescale Match High Byte
8
16
TIMER0TAPR
GPTM Timer A Prescale
0x38
read-write
n
0x0
0x0
TIMER_TAPR_TAPSR
GPTM Timer A Prescale
0
8
TIMER_TAPR_TAPSRH
GPTM Timer A Prescale High Byte
8
16
TIMER0TAPS
GPTM Timer A Prescale Snapshot
0x5C
read-write
n
0x0
0x0
TIMER_TAPS_PSS
GPTM Timer A Prescaler Snapshot
0
16
TIMER0TAPV
GPTM Timer A Prescale Value
0x64
read-write
n
0x0
0x0
TIMER_TAPV_PSV
GPTM Timer A Prescaler Value
0
16
TIMER0TAR
GPTM Timer A
0x48
read-write
n
0x0
0x0
TIMER0TAV
GPTM Timer A Value
0x50
read-write
n
0x0
0x0
TIMER0TBILR
GPTM Timer B Interval Load
0x2C
read-write
n
0x0
0x0
TIMER0TBMATCHR
GPTM Timer B Match
0x34
read-write
n
0x0
0x0
TIMER0TBMR
GPTM Timer B Mode
0x8
read-write
n
0x0
0x0
TIMER_TBMR_TBAMS
GPTM Timer B Alternate Mode Select
3
4
TIMER_TBMR_TBCDIR
GPTM Timer B Count Direction
4
5
TIMER_TBMR_TBCMR
GPTM Timer B Capture Mode
2
3
TIMER_TBMR_TBILD
GPTM Timer B Interval Load Write
8
9
TIMER_TBMR_TBMIE
GPTM Timer B Match Interrupt Enable
5
6
TIMER_TBMR_TBMR
GPTM Timer B Mode
0
2
TIMER_TBMR_TBMR_1_SHOT
One-Shot Timer mode
0x1
TIMER_TBMR_TBMR_PERIOD
Periodic Timer mode
0x2
TIMER_TBMR_TBMR_CAP
Capture mode
0x3
TIMER_TBMR_TBMRSU
GPTM Timer B Match Register Update
10
11
TIMER_TBMR_TBPLO
GPTM Timer B PWM Legacy Operation
11
12
TIMER_TBMR_TBPWMIE
GPTM Timer B PWM Interrupt Enable
9
10
TIMER_TBMR_TBSNAPS
GPTM Timer B Snap-Shot Mode
7
8
TIMER_TBMR_TBWOT
GPTM Timer B Wait-on-Trigger
6
7
TIMER0TBPMR
GPTM TimerB Prescale Match
0x44
read-write
n
0x0
0x0
TIMER_TBPMR_TBPSMR
GPTM TimerB Prescale Match
0
8
TIMER_TBPMR_TBPSMRH
GPTM Timer B Prescale Match High Byte
8
16
TIMER0TBPR
GPTM Timer B Prescale
0x3C
read-write
n
0x0
0x0
TIMER_TBPR_TBPSR
GPTM Timer B Prescale
0
8
TIMER_TBPR_TBPSRH
GPTM Timer B Prescale High Byte
8
16
TIMER0TBPS
GPTM Timer B Prescale Snapshot
0x60
read-write
n
0x0
0x0
TIMER_TBPS_PSS
GPTM Timer A Prescaler Value
0
16
TIMER0TBPV
GPTM Timer B Prescale Value
0x68
read-write
n
0x0
0x0
TIMER_TBPV_PSV
GPTM Timer B Prescaler Value
0
16
TIMER0TBR
GPTM Timer B
0x4C
read-write
n
0x0
0x0
TIMER0TBV
GPTM Timer B Value
0x54
read-write
n
0x0
0x0
TIMER5
Register map for TIMER0 peripheral
TIMER
0x0
0x0
0x1000
registers
n
TIMER5A
92
TIMER5B
93
CFG
GPTM Configuration
0x0
-1
read-write
n
0x0
0x0
TIMER_CFG
GPTM Configuration
0
3
TIMER_CFG_32_BIT_TIMER
For a 16/32-bit timer, this value selects the 32-bit timer configuration
0x0
TIMER_CFG_32_BIT_RTC
For a 16/32-bit timer, this value selects the 32-bit real-time clock (RTC) counter configuration
0x1
TIMER_CFG_16_BIT
For a 16/32-bit timer, this value selects the 16-bit timer configuration
0x4
CTL
GPTM Control
0xC
-1
read-write
n
0x0
0x0
TIMER_CTL_RTCEN
GPTM RTC Stall Enable
4
5
TIMER_CTL_TAEN
GPTM Timer A Enable
0
1
TIMER_CTL_TAEVENT
GPTM Timer A Event Mode
2
4
TIMER_CTL_TAEVENT_POS
Positive edge
0x0
TIMER_CTL_TAEVENT_NEG
Negative edge
0x1
TIMER_CTL_TAEVENT_BOTH
Both edges
0x3
TIMER_CTL_TAOTE
GPTM Timer A Output Trigger Enable
5
6
TIMER_CTL_TAPWML
GPTM Timer A PWM Output Level
6
7
TIMER_CTL_TASTALL
GPTM Timer A Stall Enable
1
2
TIMER_CTL_TBEN
GPTM Timer B Enable
8
9
TIMER_CTL_TBEVENT
GPTM Timer B Event Mode
10
12
TIMER_CTL_TBEVENT_POS
Positive edge
0x0
TIMER_CTL_TBEVENT_NEG
Negative edge
0x1
TIMER_CTL_TBEVENT_BOTH
Both edges
0x3
TIMER_CTL_TBOTE
GPTM Timer B Output Trigger Enable
13
14
TIMER_CTL_TBPWML
GPTM Timer B PWM Output Level
14
15
TIMER_CTL_TBSTALL
GPTM Timer B Stall Enable
9
10
ICR
GPTM Interrupt Clear
0x24
-1
write-only
n
0x0
0x0
TIMER_ICR_CAECINT
GPTM Timer A Capture Mode Event Interrupt Clear
2
3
write-only
TIMER_ICR_CAMCINT
GPTM Timer A Capture Mode Match Interrupt Clear
1
2
write-only
TIMER_ICR_CBECINT
GPTM Timer B Capture Mode Event Interrupt Clear
10
11
write-only
TIMER_ICR_CBMCINT
GPTM Timer B Capture Mode Match Interrupt Clear
9
10
write-only
TIMER_ICR_RTCCINT
GPTM RTC Interrupt Clear
3
4
write-only
TIMER_ICR_TAMCINT
GPTM Timer A Match Interrupt Clear
4
5
write-only
TIMER_ICR_TATOCINT
GPTM Timer A Time-Out Raw Interrupt
0
1
write-only
TIMER_ICR_TBMCINT
GPTM Timer B Match Interrupt Clear
11
12
write-only
TIMER_ICR_TBTOCINT
GPTM Timer B Time-Out Interrupt Clear
8
9
write-only
TIMER_ICR_WUECINT
32/64-Bit Wide GPTM Write Update Error Interrupt Clear
16
17
write-only
IMR
GPTM Interrupt Mask
0x18
-1
read-write
n
0x0
0x0
TIMER_IMR_CAEIM
GPTM Timer A Capture Mode Event Interrupt Mask
2
3
TIMER_IMR_CAMIM
GPTM Timer A Capture Mode Match Interrupt Mask
1
2
TIMER_IMR_CBEIM
GPTM Timer B Capture Mode Event Interrupt Mask
10
11
TIMER_IMR_CBMIM
GPTM Timer B Capture Mode Match Interrupt Mask
9
10
TIMER_IMR_RTCIM
GPTM RTC Interrupt Mask
3
4
TIMER_IMR_TAMIM
GPTM Timer A Match Interrupt Mask
4
5
TIMER_IMR_TATOIM
GPTM Timer A Time-Out Interrupt Mask
0
1
TIMER_IMR_TBMIM
GPTM Timer B Match Interrupt Mask
11
12
TIMER_IMR_TBTOIM
GPTM Timer B Time-Out Interrupt Mask
8
9
TIMER_IMR_WUEIM
32/64-Bit Wide GPTM Write Update Error Interrupt Mask
16
17
MIS
GPTM Masked Interrupt Status
0x20
-1
read-write
n
0x0
0x0
TIMER_MIS_CAEMIS
GPTM Timer A Capture Mode Event Masked Interrupt
2
3
TIMER_MIS_CAMMIS
GPTM Timer A Capture Mode Match Masked Interrupt
1
2
TIMER_MIS_CBEMIS
GPTM Timer B Capture Mode Event Masked Interrupt
10
11
TIMER_MIS_CBMMIS
GPTM Timer B Capture Mode Match Masked Interrupt
9
10
TIMER_MIS_RTCMIS
GPTM RTC Masked Interrupt
3
4
TIMER_MIS_TAMMIS
GPTM Timer A Match Masked Interrupt
4
5
TIMER_MIS_TATOMIS
GPTM Timer A Time-Out Masked Interrupt
0
1
TIMER_MIS_TBMMIS
GPTM Timer B Match Masked Interrupt
11
12
TIMER_MIS_TBTOMIS
GPTM Timer B Time-Out Masked Interrupt
8
9
TIMER_MIS_WUEMIS
32/64-Bit Wide GPTM Write Update Error Masked Interrupt Status
16
17
PP
GPTM Peripheral Properties
0xFC0
-1
read-write
n
0x0
0x0
TIMER_PP_SIZE
Count Size
0
4
TIMER_PP_SIZE_16
Timer A and Timer B counters are 16 bits each with an 8-bit prescale counter
0x0
TIMER_PP_SIZE_32
Timer A and Timer B counters are 32 bits each with a 16-bit prescale counter
0x1
RIS
GPTM Raw Interrupt Status
0x1C
-1
read-write
n
0x0
0x0
TIMER_RIS_CAERIS
GPTM Timer A Capture Mode Event Raw Interrupt
2
3
TIMER_RIS_CAMRIS
GPTM Timer A Capture Mode Match Raw Interrupt
1
2
TIMER_RIS_CBERIS
GPTM Timer B Capture Mode Event Raw Interrupt
10
11
TIMER_RIS_CBMRIS
GPTM Timer B Capture Mode Match Raw Interrupt
9
10
TIMER_RIS_RTCRIS
GPTM RTC Raw Interrupt
3
4
TIMER_RIS_TAMRIS
GPTM Timer A Match Raw Interrupt
4
5
TIMER_RIS_TATORIS
GPTM Timer A Time-Out Raw Interrupt
0
1
TIMER_RIS_TBMRIS
GPTM Timer B Match Raw Interrupt
11
12
TIMER_RIS_TBTORIS
GPTM Timer B Time-Out Raw Interrupt
8
9
TIMER_RIS_WUERIS
32/64-Bit Wide GPTM Write Update Error Raw Interrupt Status
16
17
RTCPD
GPTM RTC Predivide
0x58
-1
read-write
n
0x0
0x0
TIMER_RTCPD_RTCPD
RTC Predivide Counter Value
0
16
SYNC
GPTM Synchronize
0x10
-1
read-write
n
0x0
0x0
TIMER_SYNC_SYNCT0
Synchronize GPTM Timer 0
0
2
TIMER_SYNC_SYNCT0_NONE
GPTM0 is not affected
0x0
TIMER_SYNC_SYNCT0_TA
A timeout event for Timer A of GPTM0 is triggered
0x1
TIMER_SYNC_SYNCT0_TB
A timeout event for Timer B of GPTM0 is triggered
0x2
TIMER_SYNC_SYNCT0_TATB
A timeout event for both Timer A and Timer B of GPTM0 is triggered
0x3
TIMER_SYNC_SYNCT1
Synchronize GPTM Timer 1
2
4
TIMER_SYNC_SYNCT1_NONE
GPTM1 is not affected
0x0
TIMER_SYNC_SYNCT1_TA
A timeout event for Timer A of GPTM1 is triggered
0x1
TIMER_SYNC_SYNCT1_TB
A timeout event for Timer B of GPTM1 is triggered
0x2
TIMER_SYNC_SYNCT1_TATB
A timeout event for both Timer A and Timer B of GPTM1 is triggered
0x3
TIMER_SYNC_SYNCT2
Synchronize GPTM Timer 2
4
6
TIMER_SYNC_SYNCT2_NONE
GPTM2 is not affected
0x0
TIMER_SYNC_SYNCT2_TA
A timeout event for Timer A of GPTM2 is triggered
0x1
TIMER_SYNC_SYNCT2_TB
A timeout event for Timer B of GPTM2 is triggered
0x2
TIMER_SYNC_SYNCT2_TATB
A timeout event for both Timer A and Timer B of GPTM2 is triggered
0x3
TIMER_SYNC_SYNCT3
Synchronize GPTM Timer 3
6
8
TIMER_SYNC_SYNCT3_NONE
GPTM3 is not affected
0x0
TIMER_SYNC_SYNCT3_TA
A timeout event for Timer A of GPTM3 is triggered
0x1
TIMER_SYNC_SYNCT3_TB
A timeout event for Timer B of GPTM3 is triggered
0x2
TIMER_SYNC_SYNCT3_TATB
A timeout event for both Timer A and Timer B of GPTM3 is triggered
0x3
TIMER_SYNC_SYNCT4
Synchronize GPTM Timer 4
8
10
TIMER_SYNC_SYNCT4_NONE
GPTM4 is not affected
0x0
TIMER_SYNC_SYNCT4_TA
A timeout event for Timer A of GPTM4 is triggered
0x1
TIMER_SYNC_SYNCT4_TB
A timeout event for Timer B of GPTM4 is triggered
0x2
TIMER_SYNC_SYNCT4_TATB
A timeout event for both Timer A and Timer B of GPTM4 is triggered
0x3
TIMER_SYNC_SYNCT5
Synchronize GPTM Timer 5
10
12
TIMER_SYNC_SYNCT5_NONE
GPTM5 is not affected
0x0
TIMER_SYNC_SYNCT5_TA
A timeout event for Timer A of GPTM5 is triggered
0x1
TIMER_SYNC_SYNCT5_TB
A timeout event for Timer B of GPTM5 is triggered
0x2
TIMER_SYNC_SYNCT5_TATB
A timeout event for both Timer A and Timer B of GPTM5 is triggered
0x3
TIMER_SYNC_SYNCWT0
Synchronize GPTM 32/64-Bit Timer 0
12
14
TIMER_SYNC_SYNCWT0_NONE
GPTM 32/64-Bit Timer 0 is not affected
0x0
TIMER_SYNC_SYNCWT0_TA
A timeout event for Timer A of GPTM 32/64-Bit Timer 0 is triggered
0x1
TIMER_SYNC_SYNCWT0_TB
A timeout event for Timer B of GPTM 32/64-Bit Timer 0 is triggered
0x2
TIMER_SYNC_SYNCWT0_TATB
A timeout event for both Timer A and Timer B of GPTM 32/64-Bit Timer 0 is triggered
0x3
TIMER_SYNC_SYNCWT1
Synchronize GPTM 32/64-Bit Timer 1
14
16
TIMER_SYNC_SYNCWT1_NONE
GPTM 32/64-Bit Timer 1 is not affected
0x0
TIMER_SYNC_SYNCWT1_TA
A timeout event for Timer A of GPTM 32/64-Bit Timer 1 is triggered
0x1
TIMER_SYNC_SYNCWT1_TB
A timeout event for Timer B of GPTM 32/64-Bit Timer 1 is triggered
0x2
TIMER_SYNC_SYNCWT1_TATB
A timeout event for both Timer A and Timer B of GPTM 32/64-Bit Timer 1 is triggered
0x3
TIMER_SYNC_SYNCWT2
Synchronize GPTM 32/64-Bit Timer 2
16
18
TIMER_SYNC_SYNCWT2_NONE
GPTM 32/64-Bit Timer 2 is not affected
0x0
TIMER_SYNC_SYNCWT2_TA
A timeout event for Timer A of GPTM 32/64-Bit Timer 2 is triggered
0x1
TIMER_SYNC_SYNCWT2_TB
A timeout event for Timer B of GPTM 32/64-Bit Timer 2 is triggered
0x2
TIMER_SYNC_SYNCWT2_TATB
A timeout event for both Timer A and Timer B of GPTM 32/64-Bit Timer 2 is triggered
0x3
TIMER_SYNC_SYNCWT3
Synchronize GPTM 32/64-Bit Timer 3
18
20
TIMER_SYNC_SYNCWT3_NONE
GPTM 32/64-Bit Timer 3 is not affected
0x0
TIMER_SYNC_SYNCWT3_TA
A timeout event for Timer A of GPTM 32/64-Bit Timer 3 is triggered
0x1
TIMER_SYNC_SYNCWT3_TB
A timeout event for Timer B of GPTM 32/64-Bit Timer 3 is triggered
0x2
TIMER_SYNC_SYNCWT3_TATB
A timeout event for both Timer A and Timer B of GPTM 32/64-Bit Timer 3 is triggered
0x3
TIMER_SYNC_SYNCWT4
Synchronize GPTM 32/64-Bit Timer 4
20
22
TIMER_SYNC_SYNCWT4_NONE
GPTM 32/64-Bit Timer 4 is not affected
0x0
TIMER_SYNC_SYNCWT4_TA
A timeout event for Timer A of GPTM 32/64-Bit Timer 4 is triggered
0x1
TIMER_SYNC_SYNCWT4_TB
A timeout event for Timer B of GPTM 32/64-Bit Timer 4 is triggered
0x2
TIMER_SYNC_SYNCWT4_TATB
A timeout event for both Timer A and Timer B of GPTM 32/64-Bit Timer 4 is triggered
0x3
TIMER_SYNC_SYNCWT5
Synchronize GPTM 32/64-Bit Timer 5
22
24
TIMER_SYNC_SYNCWT5_NONE
GPTM 32/64-Bit Timer 5 is not affected
0x0
TIMER_SYNC_SYNCWT5_TA
A timeout event for Timer A of GPTM 32/64-Bit Timer 5 is triggered
0x1
TIMER_SYNC_SYNCWT5_TB
A timeout event for Timer B of GPTM 32/64-Bit Timer 5 is triggered
0x2
TIMER_SYNC_SYNCWT5_TATB
A timeout event for both Timer A and Timer B of GPTM 32/64-Bit Timer 5 is triggered
0x3
TAILR
GPTM Timer A Interval Load
0x28
-1
read-write
n
0x0
0x0
TAMATCHR
GPTM Timer A Match
0x30
-1
read-write
n
0x0
0x0
TAMR
GPTM Timer A Mode
0x4
-1
read-write
n
0x0
0x0
TIMER_TAMR_TAAMS
GPTM Timer A Alternate Mode Select
3
4
TIMER_TAMR_TACDIR
GPTM Timer A Count Direction
4
5
TIMER_TAMR_TACMR
GPTM Timer A Capture Mode
2
3
TIMER_TAMR_TAILD
GPTM Timer A Interval Load Write
8
9
TIMER_TAMR_TAMIE
GPTM Timer A Match Interrupt Enable
5
6
TIMER_TAMR_TAMR
GPTM Timer A Mode
0
2
TIMER_TAMR_TAMR_1_SHOT
One-Shot Timer mode
0x1
TIMER_TAMR_TAMR_PERIOD
Periodic Timer mode
0x2
TIMER_TAMR_TAMR_CAP
Capture mode
0x3
TIMER_TAMR_TAMRSU
GPTM Timer A Match Register Update
10
11
TIMER_TAMR_TAPLO
GPTM Timer A PWM Legacy Operation
11
12
TIMER_TAMR_TAPWMIE
GPTM Timer A PWM Interrupt Enable
9
10
TIMER_TAMR_TASNAPS
GPTM Timer A Snap-Shot Mode
7
8
TIMER_TAMR_TAWOT
GPTM Timer A Wait-on-Trigger
6
7
TAPMR
GPTM TimerA Prescale Match
0x40
-1
read-write
n
0x0
0x0
TIMER_TAPMR_TAPSMR
GPTM TimerA Prescale Match
0
8
TIMER_TAPMR_TAPSMRH
GPTM Timer A Prescale Match High Byte
8
16
TAPR
GPTM Timer A Prescale
0x38
-1
read-write
n
0x0
0x0
TIMER_TAPR_TAPSR
GPTM Timer A Prescale
0
8
TIMER_TAPR_TAPSRH
GPTM Timer A Prescale High Byte
8
16
TAPS
GPTM Timer A Prescale Snapshot
0x5C
-1
read-write
n
0x0
0x0
TIMER_TAPS_PSS
GPTM Timer A Prescaler Snapshot
0
16
TAPV
GPTM Timer A Prescale Value
0x64
-1
read-write
n
0x0
0x0
TIMER_TAPV_PSV
GPTM Timer A Prescaler Value
0
16
TAR
GPTM Timer A
0x48
-1
read-write
n
0x0
0x0
TAV
GPTM Timer A Value
0x50
-1
read-write
n
0x0
0x0
TBILR
GPTM Timer B Interval Load
0x2C
-1
read-write
n
0x0
0x0
TBMATCHR
GPTM Timer B Match
0x34
-1
read-write
n
0x0
0x0
TBMR
GPTM Timer B Mode
0x8
-1
read-write
n
0x0
0x0
TIMER_TBMR_TBAMS
GPTM Timer B Alternate Mode Select
3
4
TIMER_TBMR_TBCDIR
GPTM Timer B Count Direction
4
5
TIMER_TBMR_TBCMR
GPTM Timer B Capture Mode
2
3
TIMER_TBMR_TBILD
GPTM Timer B Interval Load Write
8
9
TIMER_TBMR_TBMIE
GPTM Timer B Match Interrupt Enable
5
6
TIMER_TBMR_TBMR
GPTM Timer B Mode
0
2
TIMER_TBMR_TBMR_1_SHOT
One-Shot Timer mode
0x1
TIMER_TBMR_TBMR_PERIOD
Periodic Timer mode
0x2
TIMER_TBMR_TBMR_CAP
Capture mode
0x3
TIMER_TBMR_TBMRSU
GPTM Timer B Match Register Update
10
11
TIMER_TBMR_TBPLO
GPTM Timer B PWM Legacy Operation
11
12
TIMER_TBMR_TBPWMIE
GPTM Timer B PWM Interrupt Enable
9
10
TIMER_TBMR_TBSNAPS
GPTM Timer B Snap-Shot Mode
7
8
TIMER_TBMR_TBWOT
GPTM Timer B Wait-on-Trigger
6
7
TBPMR
GPTM TimerB Prescale Match
0x44
-1
read-write
n
0x0
0x0
TIMER_TBPMR_TBPSMR
GPTM TimerB Prescale Match
0
8
TIMER_TBPMR_TBPSMRH
GPTM Timer B Prescale Match High Byte
8
16
TBPR
GPTM Timer B Prescale
0x3C
-1
read-write
n
0x0
0x0
TIMER_TBPR_TBPSR
GPTM Timer B Prescale
0
8
TIMER_TBPR_TBPSRH
GPTM Timer B Prescale High Byte
8
16
TBPS
GPTM Timer B Prescale Snapshot
0x60
-1
read-write
n
0x0
0x0
TIMER_TBPS_PSS
GPTM Timer A Prescaler Value
0
16
TBPV
GPTM Timer B Prescale Value
0x68
-1
read-write
n
0x0
0x0
TIMER_TBPV_PSV
GPTM Timer B Prescaler Value
0
16
TBR
GPTM Timer B
0x4C
-1
read-write
n
0x0
0x0
TBV
GPTM Timer B Value
0x54
-1
read-write
n
0x0
0x0
TIMER0CFG
GPTM Configuration
0x0
read-write
n
0x0
0x0
TIMER_CFG
GPTM Configuration
0
3
TIMER_CFG_32_BIT_TIMER
For a 16/32-bit timer, this value selects the 32-bit timer configuration
0x0
TIMER_CFG_32_BIT_RTC
For a 16/32-bit timer, this value selects the 32-bit real-time clock (RTC) counter configuration
0x1
TIMER_CFG_16_BIT
For a 16/32-bit timer, this value selects the 16-bit timer configuration
0x4
TIMER0CTL
GPTM Control
0xC
read-write
n
0x0
0x0
TIMER_CTL_RTCEN
GPTM RTC Stall Enable
4
5
TIMER_CTL_TAEN
GPTM Timer A Enable
0
1
TIMER_CTL_TAEVENT
GPTM Timer A Event Mode
2
4
TIMER_CTL_TAEVENT_POS
Positive edge
0x0
TIMER_CTL_TAEVENT_NEG
Negative edge
0x1
TIMER_CTL_TAEVENT_BOTH
Both edges
0x3
TIMER_CTL_TAOTE
GPTM Timer A Output Trigger Enable
5
6
TIMER_CTL_TAPWML
GPTM Timer A PWM Output Level
6
7
TIMER_CTL_TASTALL
GPTM Timer A Stall Enable
1
2
TIMER_CTL_TBEN
GPTM Timer B Enable
8
9
TIMER_CTL_TBEVENT
GPTM Timer B Event Mode
10
12
TIMER_CTL_TBEVENT_POS
Positive edge
0x0
TIMER_CTL_TBEVENT_NEG
Negative edge
0x1
TIMER_CTL_TBEVENT_BOTH
Both edges
0x3
TIMER_CTL_TBOTE
GPTM Timer B Output Trigger Enable
13
14
TIMER_CTL_TBPWML
GPTM Timer B PWM Output Level
14
15
TIMER_CTL_TBSTALL
GPTM Timer B Stall Enable
9
10
TIMER0ICR
GPTM Interrupt Clear
0x24
write-only
n
0x0
0x0
TIMER_ICR_CAECINT
GPTM Timer A Capture Mode Event Interrupt Clear
2
3
write-only
TIMER_ICR_CAMCINT
GPTM Timer A Capture Mode Match Interrupt Clear
1
2
write-only
TIMER_ICR_CBECINT
GPTM Timer B Capture Mode Event Interrupt Clear
10
11
write-only
TIMER_ICR_CBMCINT
GPTM Timer B Capture Mode Match Interrupt Clear
9
10
write-only
TIMER_ICR_RTCCINT
GPTM RTC Interrupt Clear
3
4
write-only
TIMER_ICR_TAMCINT
GPTM Timer A Match Interrupt Clear
4
5
write-only
TIMER_ICR_TATOCINT
GPTM Timer A Time-Out Raw Interrupt
0
1
write-only
TIMER_ICR_TBMCINT
GPTM Timer B Match Interrupt Clear
11
12
write-only
TIMER_ICR_TBTOCINT
GPTM Timer B Time-Out Interrupt Clear
8
9
write-only
TIMER_ICR_WUECINT
32/64-Bit Wide GPTM Write Update Error Interrupt Clear
16
17
write-only
TIMER0IMR
GPTM Interrupt Mask
0x18
read-write
n
0x0
0x0
TIMER_IMR_CAEIM
GPTM Timer A Capture Mode Event Interrupt Mask
2
3
TIMER_IMR_CAMIM
GPTM Timer A Capture Mode Match Interrupt Mask
1
2
TIMER_IMR_CBEIM
GPTM Timer B Capture Mode Event Interrupt Mask
10
11
TIMER_IMR_CBMIM
GPTM Timer B Capture Mode Match Interrupt Mask
9
10
TIMER_IMR_RTCIM
GPTM RTC Interrupt Mask
3
4
TIMER_IMR_TAMIM
GPTM Timer A Match Interrupt Mask
4
5
TIMER_IMR_TATOIM
GPTM Timer A Time-Out Interrupt Mask
0
1
TIMER_IMR_TBMIM
GPTM Timer B Match Interrupt Mask
11
12
TIMER_IMR_TBTOIM
GPTM Timer B Time-Out Interrupt Mask
8
9
TIMER_IMR_WUEIM
32/64-Bit Wide GPTM Write Update Error Interrupt Mask
16
17
TIMER0MIS
GPTM Masked Interrupt Status
0x20
read-write
n
0x0
0x0
TIMER_MIS_CAEMIS
GPTM Timer A Capture Mode Event Masked Interrupt
2
3
TIMER_MIS_CAMMIS
GPTM Timer A Capture Mode Match Masked Interrupt
1
2
TIMER_MIS_CBEMIS
GPTM Timer B Capture Mode Event Masked Interrupt
10
11
TIMER_MIS_CBMMIS
GPTM Timer B Capture Mode Match Masked Interrupt
9
10
TIMER_MIS_RTCMIS
GPTM RTC Masked Interrupt
3
4
TIMER_MIS_TAMMIS
GPTM Timer A Match Masked Interrupt
4
5
TIMER_MIS_TATOMIS
GPTM Timer A Time-Out Masked Interrupt
0
1
TIMER_MIS_TBMMIS
GPTM Timer B Match Masked Interrupt
11
12
TIMER_MIS_TBTOMIS
GPTM Timer B Time-Out Masked Interrupt
8
9
TIMER_MIS_WUEMIS
32/64-Bit Wide GPTM Write Update Error Masked Interrupt Status
16
17
TIMER0PP
GPTM Peripheral Properties
0xFC0
read-write
n
0x0
0x0
TIMER_PP_SIZE
Count Size
0
4
TIMER_PP_SIZE_16
Timer A and Timer B counters are 16 bits each with an 8-bit prescale counter
0x0
TIMER_PP_SIZE_32
Timer A and Timer B counters are 32 bits each with a 16-bit prescale counter
0x1
TIMER0RIS
GPTM Raw Interrupt Status
0x1C
read-write
n
0x0
0x0
TIMER_RIS_CAERIS
GPTM Timer A Capture Mode Event Raw Interrupt
2
3
TIMER_RIS_CAMRIS
GPTM Timer A Capture Mode Match Raw Interrupt
1
2
TIMER_RIS_CBERIS
GPTM Timer B Capture Mode Event Raw Interrupt
10
11
TIMER_RIS_CBMRIS
GPTM Timer B Capture Mode Match Raw Interrupt
9
10
TIMER_RIS_RTCRIS
GPTM RTC Raw Interrupt
3
4
TIMER_RIS_TAMRIS
GPTM Timer A Match Raw Interrupt
4
5
TIMER_RIS_TATORIS
GPTM Timer A Time-Out Raw Interrupt
0
1
TIMER_RIS_TBMRIS
GPTM Timer B Match Raw Interrupt
11
12
TIMER_RIS_TBTORIS
GPTM Timer B Time-Out Raw Interrupt
8
9
TIMER_RIS_WUERIS
32/64-Bit Wide GPTM Write Update Error Raw Interrupt Status
16
17
TIMER0RTCPD
GPTM RTC Predivide
0x58
read-write
n
0x0
0x0
TIMER_RTCPD_RTCPD
RTC Predivide Counter Value
0
16
TIMER0SYNC
GPTM Synchronize
0x10
read-write
n
0x0
0x0
TIMER_SYNC_SYNCT0
Synchronize GPTM Timer 0
0
2
TIMER_SYNC_SYNCT0_NONE
GPTM0 is not affected
0x0
TIMER_SYNC_SYNCT0_TA
A timeout event for Timer A of GPTM0 is triggered
0x1
TIMER_SYNC_SYNCT0_TB
A timeout event for Timer B of GPTM0 is triggered
0x2
TIMER_SYNC_SYNCT0_TATB
A timeout event for both Timer A and Timer B of GPTM0 is triggered
0x3
TIMER_SYNC_SYNCT1
Synchronize GPTM Timer 1
2
4
TIMER_SYNC_SYNCT1_NONE
GPTM1 is not affected
0x0
TIMER_SYNC_SYNCT1_TA
A timeout event for Timer A of GPTM1 is triggered
0x1
TIMER_SYNC_SYNCT1_TB
A timeout event for Timer B of GPTM1 is triggered
0x2
TIMER_SYNC_SYNCT1_TATB
A timeout event for both Timer A and Timer B of GPTM1 is triggered
0x3
TIMER_SYNC_SYNCT2
Synchronize GPTM Timer 2
4
6
TIMER_SYNC_SYNCT2_NONE
GPTM2 is not affected
0x0
TIMER_SYNC_SYNCT2_TA
A timeout event for Timer A of GPTM2 is triggered
0x1
TIMER_SYNC_SYNCT2_TB
A timeout event for Timer B of GPTM2 is triggered
0x2
TIMER_SYNC_SYNCT2_TATB
A timeout event for both Timer A and Timer B of GPTM2 is triggered
0x3
TIMER_SYNC_SYNCT3
Synchronize GPTM Timer 3
6
8
TIMER_SYNC_SYNCT3_NONE
GPTM3 is not affected
0x0
TIMER_SYNC_SYNCT3_TA
A timeout event for Timer A of GPTM3 is triggered
0x1
TIMER_SYNC_SYNCT3_TB
A timeout event for Timer B of GPTM3 is triggered
0x2
TIMER_SYNC_SYNCT3_TATB
A timeout event for both Timer A and Timer B of GPTM3 is triggered
0x3
TIMER_SYNC_SYNCT4
Synchronize GPTM Timer 4
8
10
TIMER_SYNC_SYNCT4_NONE
GPTM4 is not affected
0x0
TIMER_SYNC_SYNCT4_TA
A timeout event for Timer A of GPTM4 is triggered
0x1
TIMER_SYNC_SYNCT4_TB
A timeout event for Timer B of GPTM4 is triggered
0x2
TIMER_SYNC_SYNCT4_TATB
A timeout event for both Timer A and Timer B of GPTM4 is triggered
0x3
TIMER_SYNC_SYNCT5
Synchronize GPTM Timer 5
10
12
TIMER_SYNC_SYNCT5_NONE
GPTM5 is not affected
0x0
TIMER_SYNC_SYNCT5_TA
A timeout event for Timer A of GPTM5 is triggered
0x1
TIMER_SYNC_SYNCT5_TB
A timeout event for Timer B of GPTM5 is triggered
0x2
TIMER_SYNC_SYNCT5_TATB
A timeout event for both Timer A and Timer B of GPTM5 is triggered
0x3
TIMER_SYNC_SYNCWT0
Synchronize GPTM 32/64-Bit Timer 0
12
14
TIMER_SYNC_SYNCWT0_NONE
GPTM 32/64-Bit Timer 0 is not affected
0x0
TIMER_SYNC_SYNCWT0_TA
A timeout event for Timer A of GPTM 32/64-Bit Timer 0 is triggered
0x1
TIMER_SYNC_SYNCWT0_TB
A timeout event for Timer B of GPTM 32/64-Bit Timer 0 is triggered
0x2
TIMER_SYNC_SYNCWT0_TATB
A timeout event for both Timer A and Timer B of GPTM 32/64-Bit Timer 0 is triggered
0x3
TIMER_SYNC_SYNCWT1
Synchronize GPTM 32/64-Bit Timer 1
14
16
TIMER_SYNC_SYNCWT1_NONE
GPTM 32/64-Bit Timer 1 is not affected
0x0
TIMER_SYNC_SYNCWT1_TA
A timeout event for Timer A of GPTM 32/64-Bit Timer 1 is triggered
0x1
TIMER_SYNC_SYNCWT1_TB
A timeout event for Timer B of GPTM 32/64-Bit Timer 1 is triggered
0x2
TIMER_SYNC_SYNCWT1_TATB
A timeout event for both Timer A and Timer B of GPTM 32/64-Bit Timer 1 is triggered
0x3
TIMER_SYNC_SYNCWT2
Synchronize GPTM 32/64-Bit Timer 2
16
18
TIMER_SYNC_SYNCWT2_NONE
GPTM 32/64-Bit Timer 2 is not affected
0x0
TIMER_SYNC_SYNCWT2_TA
A timeout event for Timer A of GPTM 32/64-Bit Timer 2 is triggered
0x1
TIMER_SYNC_SYNCWT2_TB
A timeout event for Timer B of GPTM 32/64-Bit Timer 2 is triggered
0x2
TIMER_SYNC_SYNCWT2_TATB
A timeout event for both Timer A and Timer B of GPTM 32/64-Bit Timer 2 is triggered
0x3
TIMER_SYNC_SYNCWT3
Synchronize GPTM 32/64-Bit Timer 3
18
20
TIMER_SYNC_SYNCWT3_NONE
GPTM 32/64-Bit Timer 3 is not affected
0x0
TIMER_SYNC_SYNCWT3_TA
A timeout event for Timer A of GPTM 32/64-Bit Timer 3 is triggered
0x1
TIMER_SYNC_SYNCWT3_TB
A timeout event for Timer B of GPTM 32/64-Bit Timer 3 is triggered
0x2
TIMER_SYNC_SYNCWT3_TATB
A timeout event for both Timer A and Timer B of GPTM 32/64-Bit Timer 3 is triggered
0x3
TIMER_SYNC_SYNCWT4
Synchronize GPTM 32/64-Bit Timer 4
20
22
TIMER_SYNC_SYNCWT4_NONE
GPTM 32/64-Bit Timer 4 is not affected
0x0
TIMER_SYNC_SYNCWT4_TA
A timeout event for Timer A of GPTM 32/64-Bit Timer 4 is triggered
0x1
TIMER_SYNC_SYNCWT4_TB
A timeout event for Timer B of GPTM 32/64-Bit Timer 4 is triggered
0x2
TIMER_SYNC_SYNCWT4_TATB
A timeout event for both Timer A and Timer B of GPTM 32/64-Bit Timer 4 is triggered
0x3
TIMER_SYNC_SYNCWT5
Synchronize GPTM 32/64-Bit Timer 5
22
24
TIMER_SYNC_SYNCWT5_NONE
GPTM 32/64-Bit Timer 5 is not affected
0x0
TIMER_SYNC_SYNCWT5_TA
A timeout event for Timer A of GPTM 32/64-Bit Timer 5 is triggered
0x1
TIMER_SYNC_SYNCWT5_TB
A timeout event for Timer B of GPTM 32/64-Bit Timer 5 is triggered
0x2
TIMER_SYNC_SYNCWT5_TATB
A timeout event for both Timer A and Timer B of GPTM 32/64-Bit Timer 5 is triggered
0x3
TIMER0TAILR
GPTM Timer A Interval Load
0x28
read-write
n
0x0
0x0
TIMER0TAMATCHR
GPTM Timer A Match
0x30
read-write
n
0x0
0x0
TIMER0TAMR
GPTM Timer A Mode
0x4
read-write
n
0x0
0x0
TIMER_TAMR_TAAMS
GPTM Timer A Alternate Mode Select
3
4
TIMER_TAMR_TACDIR
GPTM Timer A Count Direction
4
5
TIMER_TAMR_TACMR
GPTM Timer A Capture Mode
2
3
TIMER_TAMR_TAILD
GPTM Timer A Interval Load Write
8
9
TIMER_TAMR_TAMIE
GPTM Timer A Match Interrupt Enable
5
6
TIMER_TAMR_TAMR
GPTM Timer A Mode
0
2
TIMER_TAMR_TAMR_1_SHOT
One-Shot Timer mode
0x1
TIMER_TAMR_TAMR_PERIOD
Periodic Timer mode
0x2
TIMER_TAMR_TAMR_CAP
Capture mode
0x3
TIMER_TAMR_TAMRSU
GPTM Timer A Match Register Update
10
11
TIMER_TAMR_TAPLO
GPTM Timer A PWM Legacy Operation
11
12
TIMER_TAMR_TAPWMIE
GPTM Timer A PWM Interrupt Enable
9
10
TIMER_TAMR_TASNAPS
GPTM Timer A Snap-Shot Mode
7
8
TIMER_TAMR_TAWOT
GPTM Timer A Wait-on-Trigger
6
7
TIMER0TAPMR
GPTM TimerA Prescale Match
0x40
read-write
n
0x0
0x0
TIMER_TAPMR_TAPSMR
GPTM TimerA Prescale Match
0
8
TIMER_TAPMR_TAPSMRH
GPTM Timer A Prescale Match High Byte
8
16
TIMER0TAPR
GPTM Timer A Prescale
0x38
read-write
n
0x0
0x0
TIMER_TAPR_TAPSR
GPTM Timer A Prescale
0
8
TIMER_TAPR_TAPSRH
GPTM Timer A Prescale High Byte
8
16
TIMER0TAPS
GPTM Timer A Prescale Snapshot
0x5C
read-write
n
0x0
0x0
TIMER_TAPS_PSS
GPTM Timer A Prescaler Snapshot
0
16
TIMER0TAPV
GPTM Timer A Prescale Value
0x64
read-write
n
0x0
0x0
TIMER_TAPV_PSV
GPTM Timer A Prescaler Value
0
16
TIMER0TAR
GPTM Timer A
0x48
read-write
n
0x0
0x0
TIMER0TAV
GPTM Timer A Value
0x50
read-write
n
0x0
0x0
TIMER0TBILR
GPTM Timer B Interval Load
0x2C
read-write
n
0x0
0x0
TIMER0TBMATCHR
GPTM Timer B Match
0x34
read-write
n
0x0
0x0
TIMER0TBMR
GPTM Timer B Mode
0x8
read-write
n
0x0
0x0
TIMER_TBMR_TBAMS
GPTM Timer B Alternate Mode Select
3
4
TIMER_TBMR_TBCDIR
GPTM Timer B Count Direction
4
5
TIMER_TBMR_TBCMR
GPTM Timer B Capture Mode
2
3
TIMER_TBMR_TBILD
GPTM Timer B Interval Load Write
8
9
TIMER_TBMR_TBMIE
GPTM Timer B Match Interrupt Enable
5
6
TIMER_TBMR_TBMR
GPTM Timer B Mode
0
2
TIMER_TBMR_TBMR_1_SHOT
One-Shot Timer mode
0x1
TIMER_TBMR_TBMR_PERIOD
Periodic Timer mode
0x2
TIMER_TBMR_TBMR_CAP
Capture mode
0x3
TIMER_TBMR_TBMRSU
GPTM Timer B Match Register Update
10
11
TIMER_TBMR_TBPLO
GPTM Timer B PWM Legacy Operation
11
12
TIMER_TBMR_TBPWMIE
GPTM Timer B PWM Interrupt Enable
9
10
TIMER_TBMR_TBSNAPS
GPTM Timer B Snap-Shot Mode
7
8
TIMER_TBMR_TBWOT
GPTM Timer B Wait-on-Trigger
6
7
TIMER0TBPMR
GPTM TimerB Prescale Match
0x44
read-write
n
0x0
0x0
TIMER_TBPMR_TBPSMR
GPTM TimerB Prescale Match
0
8
TIMER_TBPMR_TBPSMRH
GPTM Timer B Prescale Match High Byte
8
16
TIMER0TBPR
GPTM Timer B Prescale
0x3C
read-write
n
0x0
0x0
TIMER_TBPR_TBPSR
GPTM Timer B Prescale
0
8
TIMER_TBPR_TBPSRH
GPTM Timer B Prescale High Byte
8
16
TIMER0TBPS
GPTM Timer B Prescale Snapshot
0x60
read-write
n
0x0
0x0
TIMER_TBPS_PSS
GPTM Timer A Prescaler Value
0
16
TIMER0TBPV
GPTM Timer B Prescale Value
0x68
read-write
n
0x0
0x0
TIMER_TBPV_PSV
GPTM Timer B Prescaler Value
0
16
TIMER0TBR
GPTM Timer B
0x4C
read-write
n
0x0
0x0
TIMER0TBV
GPTM Timer B Value
0x54
read-write
n
0x0
0x0
UART0
Register map for UART0 peripheral
UART
0x0
0x0
0x1000
registers
n
UART0
5
9BITADDR
UART 9-Bit Self Address
0xA4
read-write
n
0x0
0x0
UART_9BITADDR_9BITEN
Enable 9-Bit Mode
15
16
UART_9BITADDR_ADDR
Self Address for 9-Bit Mode
0
8
9BITAMASK
UART 9-Bit Self Address Mask
0xA8
read-write
n
0x0
0x0
UART_9BITAMASK_MASK
Self Address Mask for 9-Bit Mode
0
8
CC
UART Clock Configuration
0xFC8
-1
read-write
n
0x0
0x0
UART_CC_CS
UART Baud Clock Source
0
4
UART_CC_CS_SYSCLK
System clock (based on clock source and divisor factor)
0x0
UART_CC_CS_PIOSC
PIOSC
0x5
CTL
UART Control
0x30
-1
read-write
n
0x0
0x0
UART_CTL_CTSEN
Enable Clear To Send
15
16
UART_CTL_DTR
Data Terminal Ready
10
11
UART_CTL_EOT
End of Transmission
4
5
UART_CTL_HSE
High-Speed Enable
5
6
UART_CTL_LBE
UART Loop Back Enable
7
8
UART_CTL_RTS
Request to Send
11
12
UART_CTL_RTSEN
Enable Request to Send
14
15
UART_CTL_RXE
UART Receive Enable
9
10
UART_CTL_SIREN
UART SIR Enable
1
2
UART_CTL_SIRLP
UART SIR Low-Power Mode
2
3
UART_CTL_SMART
ISO 7816 Smart Card Support
3
4
UART_CTL_TXE
UART Transmit Enable
8
9
UART_CTL_UARTEN
UART Enable
0
1
DMACTL
UART DMA Control
0x48
-1
read-write
n
0x0
0x0
UART_DMACTL_DMAERR
DMA on Error
2
3
UART_DMACTL_RXDMAE
Receive DMA Enable
0
1
UART_DMACTL_TXDMAE
Transmit DMA Enable
1
2
DR
UART Data
0x0
-1
read-write
n
0x0
0x0
UART_DR_BE
UART Break Error
10
11
UART_DR_DATA
Data Transmitted or Received
0
8
UART_DR_FE
UART Framing Error
8
9
UART_DR_OE
UART Overrun Error
11
12
UART_DR_PE
UART Parity Error
9
10
ECR
UART Receive Status/Error Clear
0x4
-1
read-write
n
0x0
0x0
UART_ECR_DATA
Error Clear
0
8
FBRD
UART Fractional Baud-Rate Divisor
0x28
-1
read-write
n
0x0
0x0
UART_FBRD_DIVFRAC
Fractional Baud-Rate Divisor
0
6
FR
UART Flag
0x18
-1
read-write
n
0x0
0x0
UART_FR_BUSY
UART Busy
3
4
UART_FR_CTS
Clear To Send
0
1
UART_FR_DCD
Data Carrier Detect
2
3
UART_FR_DSR
Data Set Ready
1
2
UART_FR_RI
Ring Indicator
8
9
UART_FR_RXFE
UART Receive FIFO Empty
4
5
UART_FR_RXFF
UART Receive FIFO Full
6
7
UART_FR_TXFE
UART Transmit FIFO Empty
7
8
UART_FR_TXFF
UART Transmit FIFO Full
5
6
IBRD
UART Integer Baud-Rate Divisor
0x24
-1
read-write
n
0x0
0x0
UART_IBRD_DIVINT
Integer Baud-Rate Divisor
0
16
ICR
UART Interrupt Clear
0x44
-1
write-only
n
0x0
0x0
UART_ICR_9BITIC
9-Bit Mode Interrupt Clear
12
13
write-only
UART_ICR_BEIC
Break Error Interrupt Clear
9
10
write-only
UART_ICR_CTSMIC
UART Clear to Send Modem Interrupt Clear
1
2
write-only
UART_ICR_DCDMIC
UART Data Carrier Detect Modem Interrupt Clear
2
3
write-only
UART_ICR_DSRMIC
UART Data Set Ready Modem Interrupt Clear
3
4
write-only
UART_ICR_FEIC
Framing Error Interrupt Clear
7
8
write-only
UART_ICR_OEIC
Overrun Error Interrupt Clear
10
11
write-only
UART_ICR_PEIC
Parity Error Interrupt Clear
8
9
write-only
UART_ICR_RIMIC
UART Ring Indicator Modem Interrupt Clear
0
1
write-only
UART_ICR_RTIC
Receive Time-Out Interrupt Clear
6
7
write-only
UART_ICR_RXIC
Receive Interrupt Clear
4
5
write-only
UART_ICR_TXIC
Transmit Interrupt Clear
5
6
write-only
IFLS
UART Interrupt FIFO Level Select
0x34
-1
read-write
n
0x0
0x0
UART_IFLS_RX
UART Receive Interrupt FIFO Level Select
3
6
UART_IFLS_RX1_8
RX FIFO >= 1/8 full
0x0
UART_IFLS_RX2_8
RX FIFO >= 1/4 full
0x1
UART_IFLS_RX4_8
RX FIFO >= 1/2 full (default)
0x2
UART_IFLS_RX6_8
RX FIFO >= 3/4 full
0x3
UART_IFLS_RX7_8
RX FIFO >= 7/8 full
0x4
UART_IFLS_TX
UART Transmit Interrupt FIFO Level Select
0
3
UART_IFLS_TX1_8
TX FIFO and lt = 1/8 full
0x0
UART_IFLS_TX2_8
TX FIFO and lt = 1/4 full
0x1
UART_IFLS_TX4_8
TX FIFO and lt = 1/2 full (default)
0x2
UART_IFLS_TX6_8
TX FIFO and lt = 3/4 full
0x3
UART_IFLS_TX7_8
TX FIFO and lt = 7/8 full
0x4
ILPR
UART IrDA Low-Power Register
0x20
-1
read-write
n
0x0
0x0
UART_ILPR_ILPDVSR
IrDA Low-Power Divisor
0
8
IM
UART Interrupt Mask
0x38
-1
read-write
n
0x0
0x0
UART_IM_9BITIM
9-Bit Mode Interrupt Mask
12
13
UART_IM_BEIM
UART Break Error Interrupt Mask
9
10
UART_IM_CTSMIM
UART Clear to Send Modem Interrupt Mask
1
2
UART_IM_DCDMIM
UART Data Carrier Detect Modem Interrupt Mask
2
3
UART_IM_DSRMIM
UART Data Set Ready Modem Interrupt Mask
3
4
UART_IM_FEIM
UART Framing Error Interrupt Mask
7
8
UART_IM_OEIM
UART Overrun Error Interrupt Mask
10
11
UART_IM_PEIM
UART Parity Error Interrupt Mask
8
9
UART_IM_RIMIM
UART Ring Indicator Modem Interrupt Mask
0
1
UART_IM_RTIM
UART Receive Time-Out Interrupt Mask
6
7
UART_IM_RXIM
UART Receive Interrupt Mask
4
5
UART_IM_TXIM
UART Transmit Interrupt Mask
5
6
LCRH
UART Line Control
0x2C
-1
read-write
n
0x0
0x0
UART_LCRH_BRK
UART Send Break
0
1
UART_LCRH_EPS
UART Even Parity Select
2
3
UART_LCRH_FEN
UART Enable FIFOs
4
5
UART_LCRH_PEN
UART Parity Enable
1
2
UART_LCRH_SPS
UART Stick Parity Select
7
8
UART_LCRH_STP2
UART Two Stop Bits Select
3
4
UART_LCRH_WLEN
UART Word Length
5
7
UART_LCRH_WLEN_5
5 bits (default)
0x0
UART_LCRH_WLEN_6
6 bits
0x1
UART_LCRH_WLEN_7
7 bits
0x2
UART_LCRH_WLEN_8
8 bits
0x3
MIS
UART Masked Interrupt Status
0x40
-1
read-write
n
0x0
0x0
UART_MIS_9BITMIS
9-Bit Mode Masked Interrupt Status
12
13
UART_MIS_BEMIS
UART Break Error Masked Interrupt Status
9
10
UART_MIS_CTSMIS
UART Clear to Send Modem Masked Interrupt Status
1
2
UART_MIS_DCDMIS
UART Data Carrier Detect Modem Masked Interrupt Status
2
3
UART_MIS_DSRMIS
UART Data Set Ready Modem Masked Interrupt Status
3
4
UART_MIS_FEMIS
UART Framing Error Masked Interrupt Status
7
8
UART_MIS_OEMIS
UART Overrun Error Masked Interrupt Status
10
11
UART_MIS_PEMIS
UART Parity Error Masked Interrupt Status
8
9
UART_MIS_RIMIS
UART Ring Indicator Modem Masked Interrupt Status
0
1
UART_MIS_RTMIS
UART Receive Time-Out Masked Interrupt Status
6
7
UART_MIS_RXMIS
UART Receive Masked Interrupt Status
4
5
UART_MIS_TXMIS
UART Transmit Masked Interrupt Status
5
6
PP
UART Peripheral Properties
0xFC0
-1
read-write
n
0x0
0x0
UART_PP_NB
9-Bit Support
1
2
UART_PP_SC
Smart Card Support
0
1
RIS
UART Raw Interrupt Status
0x3C
-1
read-write
n
0x0
0x0
UART_RIS_9BITRIS
9-Bit Mode Raw Interrupt Status
12
13
UART_RIS_BERIS
UART Break Error Raw Interrupt Status
9
10
UART_RIS_CTSRIS
UART Clear to Send Modem Raw Interrupt Status
1
2
UART_RIS_DCDRIS
UART Data Carrier Detect Modem Raw Interrupt Status
2
3
UART_RIS_DSRRIS
UART Data Set Ready Modem Raw Interrupt Status
3
4
UART_RIS_FERIS
UART Framing Error Raw Interrupt Status
7
8
UART_RIS_OERIS
UART Overrun Error Raw Interrupt Status
10
11
UART_RIS_PERIS
UART Parity Error Raw Interrupt Status
8
9
UART_RIS_RIRIS
UART Ring Indicator Modem Raw Interrupt Status
0
1
UART_RIS_RTRIS
UART Receive Time-Out Raw Interrupt Status
6
7
UART_RIS_RXRIS
UART Receive Raw Interrupt Status
4
5
UART_RIS_TXRIS
UART Transmit Raw Interrupt Status
5
6
RSR
UART Receive Status/Error Clear
0x4
-1
read-write
n
0x0
0x0
UART_RSR_BE
UART Break Error
2
3
UART_RSR_FE
UART Framing Error
0
1
UART_RSR_OE
UART Overrun Error
3
4
UART_RSR_PE
UART Parity Error
1
2
UART0CC
UART Clock Configuration
0xFC8
read-write
n
0x0
0x0
UART_CC_CS
UART Baud Clock Source
0
4
UART_CC_CS_SYSCLK
System clock (based on clock source and divisor factor)
0x0
UART_CC_CS_PIOSC
PIOSC
0x5
UART0CTL
UART Control
0x30
read-write
n
0x0
0x0
UART_CTL_CTSEN
Enable Clear To Send
15
16
UART_CTL_DTR
Data Terminal Ready
10
11
UART_CTL_EOT
End of Transmission
4
5
UART_CTL_HSE
High-Speed Enable
5
6
UART_CTL_LBE
UART Loop Back Enable
7
8
UART_CTL_RTS
Request to Send
11
12
UART_CTL_RTSEN
Enable Request to Send
14
15
UART_CTL_RXE
UART Receive Enable
9
10
UART_CTL_SIREN
UART SIR Enable
1
2
UART_CTL_SIRLP
UART SIR Low-Power Mode
2
3
UART_CTL_SMART
ISO 7816 Smart Card Support
3
4
UART_CTL_TXE
UART Transmit Enable
8
9
UART_CTL_UARTEN
UART Enable
0
1
UART0DMACTL
UART DMA Control
0x48
read-write
n
0x0
0x0
UART_DMACTL_DMAERR
DMA on Error
2
3
UART_DMACTL_RXDMAE
Receive DMA Enable
0
1
UART_DMACTL_TXDMAE
Transmit DMA Enable
1
2
UART0DR
UART Data
0x0
read-write
n
0x0
0x0
UART_DR_BE
UART Break Error
10
11
UART_DR_DATA
Data Transmitted or Received
0
8
UART_DR_FE
UART Framing Error
8
9
UART_DR_OE
UART Overrun Error
11
12
UART_DR_PE
UART Parity Error
9
10
UART0ECR
UART Receive Status/Error Clear
UART_ALT
0x4
read-write
n
0x0
0x0
UART_ECR_DATA
Error Clear
0
8
UART0FBRD
UART Fractional Baud-Rate Divisor
0x28
read-write
n
0x0
0x0
UART_FBRD_DIVFRAC
Fractional Baud-Rate Divisor
0
6
UART0FR
UART Flag
0x18
read-write
n
0x0
0x0
UART_FR_BUSY
UART Busy
3
4
UART_FR_CTS
Clear To Send
0
1
UART_FR_DCD
Data Carrier Detect
2
3
UART_FR_DSR
Data Set Ready
1
2
UART_FR_RI
Ring Indicator
8
9
UART_FR_RXFE
UART Receive FIFO Empty
4
5
UART_FR_RXFF
UART Receive FIFO Full
6
7
UART_FR_TXFE
UART Transmit FIFO Empty
7
8
UART_FR_TXFF
UART Transmit FIFO Full
5
6
UART0IBRD
UART Integer Baud-Rate Divisor
0x24
read-write
n
0x0
0x0
UART_IBRD_DIVINT
Integer Baud-Rate Divisor
0
16
UART0ICR
UART Interrupt Clear
0x44
write-only
n
0x0
0x0
UART_ICR_9BITIC
9-Bit Mode Interrupt Clear
12
13
write-only
UART_ICR_BEIC
Break Error Interrupt Clear
9
10
write-only
UART_ICR_CTSMIC
UART Clear to Send Modem Interrupt Clear
1
2
write-only
UART_ICR_DCDMIC
UART Data Carrier Detect Modem Interrupt Clear
2
3
write-only
UART_ICR_DSRMIC
UART Data Set Ready Modem Interrupt Clear
3
4
write-only
UART_ICR_FEIC
Framing Error Interrupt Clear
7
8
write-only
UART_ICR_OEIC
Overrun Error Interrupt Clear
10
11
write-only
UART_ICR_PEIC
Parity Error Interrupt Clear
8
9
write-only
UART_ICR_RIMIC
UART Ring Indicator Modem Interrupt Clear
0
1
write-only
UART_ICR_RTIC
Receive Time-Out Interrupt Clear
6
7
write-only
UART_ICR_RXIC
Receive Interrupt Clear
4
5
write-only
UART_ICR_TXIC
Transmit Interrupt Clear
5
6
write-only
UART0IFLS
UART Interrupt FIFO Level Select
0x34
read-write
n
0x0
0x0
UART_IFLS_RX
UART Receive Interrupt FIFO Level Select
3
6
UART_IFLS_RX1_8
RX FIFO >= 1/8 full
0x0
UART_IFLS_RX2_8
RX FIFO >= 1/4 full
0x1
UART_IFLS_RX4_8
RX FIFO >= 1/2 full (default)
0x2
UART_IFLS_RX6_8
RX FIFO >= 3/4 full
0x3
UART_IFLS_RX7_8
RX FIFO >= 7/8 full
0x4
UART_IFLS_TX
UART Transmit Interrupt FIFO Level Select
0
3
UART_IFLS_TX1_8
TX FIFO <= 1/8 full
0x0
UART_IFLS_TX2_8
TX FIFO <= 1/4 full
0x1
UART_IFLS_TX4_8
TX FIFO <= 1/2 full (default)
0x2
UART_IFLS_TX6_8
TX FIFO <= 3/4 full
0x3
UART_IFLS_TX7_8
TX FIFO <= 7/8 full
0x4
UART0ILPR
UART IrDA Low-Power Register
0x20
read-write
n
0x0
0x0
UART_ILPR_ILPDVSR
IrDA Low-Power Divisor
0
8
UART0IM
UART Interrupt Mask
0x38
read-write
n
0x0
0x0
UART_IM_9BITIM
9-Bit Mode Interrupt Mask
12
13
UART_IM_BEIM
UART Break Error Interrupt Mask
9
10
UART_IM_CTSMIM
UART Clear to Send Modem Interrupt Mask
1
2
UART_IM_DCDMIM
UART Data Carrier Detect Modem Interrupt Mask
2
3
UART_IM_DSRMIM
UART Data Set Ready Modem Interrupt Mask
3
4
UART_IM_FEIM
UART Framing Error Interrupt Mask
7
8
UART_IM_OEIM
UART Overrun Error Interrupt Mask
10
11
UART_IM_PEIM
UART Parity Error Interrupt Mask
8
9
UART_IM_RIMIM
UART Ring Indicator Modem Interrupt Mask
0
1
UART_IM_RTIM
UART Receive Time-Out Interrupt Mask
6
7
UART_IM_RXIM
UART Receive Interrupt Mask
4
5
UART_IM_TXIM
UART Transmit Interrupt Mask
5
6
UART0LCRH
UART Line Control
0x2C
read-write
n
0x0
0x0
UART_LCRH_BRK
UART Send Break
0
1
UART_LCRH_EPS
UART Even Parity Select
2
3
UART_LCRH_FEN
UART Enable FIFOs
4
5
UART_LCRH_PEN
UART Parity Enable
1
2
UART_LCRH_SPS
UART Stick Parity Select
7
8
UART_LCRH_STP2
UART Two Stop Bits Select
3
4
UART_LCRH_WLEN
UART Word Length
5
7
UART_LCRH_WLEN_5
5 bits (default)
0x0
UART_LCRH_WLEN_6
6 bits
0x1
UART_LCRH_WLEN_7
7 bits
0x2
UART_LCRH_WLEN_8
8 bits
0x3
UART0MIS
UART Masked Interrupt Status
0x40
read-write
n
0x0
0x0
UART_MIS_9BITMIS
9-Bit Mode Masked Interrupt Status
12
13
UART_MIS_BEMIS
UART Break Error Masked Interrupt Status
9
10
UART_MIS_CTSMIS
UART Clear to Send Modem Masked Interrupt Status
1
2
UART_MIS_DCDMIS
UART Data Carrier Detect Modem Masked Interrupt Status
2
3
UART_MIS_DSRMIS
UART Data Set Ready Modem Masked Interrupt Status
3
4
UART_MIS_FEMIS
UART Framing Error Masked Interrupt Status
7
8
UART_MIS_OEMIS
UART Overrun Error Masked Interrupt Status
10
11
UART_MIS_PEMIS
UART Parity Error Masked Interrupt Status
8
9
UART_MIS_RIMIS
UART Ring Indicator Modem Masked Interrupt Status
0
1
UART_MIS_RTMIS
UART Receive Time-Out Masked Interrupt Status
6
7
UART_MIS_RXMIS
UART Receive Masked Interrupt Status
4
5
UART_MIS_TXMIS
UART Transmit Masked Interrupt Status
5
6
UART0PP
UART Peripheral Properties
0xFC0
read-write
n
0x0
0x0
UART_PP_NB
9-Bit Support
1
2
UART_PP_SC
Smart Card Support
0
1
UART0RIS
UART Raw Interrupt Status
0x3C
read-write
n
0x0
0x0
UART_RIS_9BITRIS
9-Bit Mode Raw Interrupt Status
12
13
UART_RIS_BERIS
UART Break Error Raw Interrupt Status
9
10
UART_RIS_CTSRIS
UART Clear to Send Modem Raw Interrupt Status
1
2
UART_RIS_DCDRIS
UART Data Carrier Detect Modem Raw Interrupt Status
2
3
UART_RIS_DSRRIS
UART Data Set Ready Modem Raw Interrupt Status
3
4
UART_RIS_FERIS
UART Framing Error Raw Interrupt Status
7
8
UART_RIS_OERIS
UART Overrun Error Raw Interrupt Status
10
11
UART_RIS_PERIS
UART Parity Error Raw Interrupt Status
8
9
UART_RIS_RIRIS
UART Ring Indicator Modem Raw Interrupt Status
0
1
UART_RIS_RTRIS
UART Receive Time-Out Raw Interrupt Status
6
7
UART_RIS_RXRIS
UART Receive Raw Interrupt Status
4
5
UART_RIS_TXRIS
UART Transmit Raw Interrupt Status
5
6
UART0RSR
UART Receive Status/Error Clear
0x4
read-write
n
0x0
0x0
UART_RSR_BE
UART Break Error
2
3
UART_RSR_FE
UART Framing Error
0
1
UART_RSR_OE
UART Overrun Error
3
4
UART_RSR_PE
UART Parity Error
1
2
_9BITADDR
UART 9-Bit Self Address
0xA4
-1
read-write
n
0x0
0x0
UART_9BITADDR_9BITEN
Enable 9-Bit Mode
15
16
UART_9BITADDR_ADDR
Self Address for 9-Bit Mode
0
8
_9BITAMASK
UART 9-Bit Self Address Mask
0xA8
-1
read-write
n
0x0
0x0
UART_9BITAMASK_MASK
Self Address Mask for 9-Bit Mode
0
8
UART1
Register map for UART0 peripheral
UART
0x0
0x0
0x1000
registers
n
UART1
6
9BITADDR
UART 9-Bit Self Address
0xA4
read-write
n
0x0
0x0
UART_9BITADDR_9BITEN
Enable 9-Bit Mode
15
16
UART_9BITADDR_ADDR
Self Address for 9-Bit Mode
0
8
9BITAMASK
UART 9-Bit Self Address Mask
0xA8
read-write
n
0x0
0x0
UART_9BITAMASK_MASK
Self Address Mask for 9-Bit Mode
0
8
CC
UART Clock Configuration
0xFC8
-1
read-write
n
0x0
0x0
UART_CC_CS
UART Baud Clock Source
0
4
UART_CC_CS_SYSCLK
System clock (based on clock source and divisor factor)
0x0
UART_CC_CS_PIOSC
PIOSC
0x5
CTL
UART Control
0x30
-1
read-write
n
0x0
0x0
UART_CTL_CTSEN
Enable Clear To Send
15
16
UART_CTL_DTR
Data Terminal Ready
10
11
UART_CTL_EOT
End of Transmission
4
5
UART_CTL_HSE
High-Speed Enable
5
6
UART_CTL_LBE
UART Loop Back Enable
7
8
UART_CTL_RTS
Request to Send
11
12
UART_CTL_RTSEN
Enable Request to Send
14
15
UART_CTL_RXE
UART Receive Enable
9
10
UART_CTL_SIREN
UART SIR Enable
1
2
UART_CTL_SIRLP
UART SIR Low-Power Mode
2
3
UART_CTL_SMART
ISO 7816 Smart Card Support
3
4
UART_CTL_TXE
UART Transmit Enable
8
9
UART_CTL_UARTEN
UART Enable
0
1
DMACTL
UART DMA Control
0x48
-1
read-write
n
0x0
0x0
UART_DMACTL_DMAERR
DMA on Error
2
3
UART_DMACTL_RXDMAE
Receive DMA Enable
0
1
UART_DMACTL_TXDMAE
Transmit DMA Enable
1
2
DR
UART Data
0x0
-1
read-write
n
0x0
0x0
UART_DR_BE
UART Break Error
10
11
UART_DR_DATA
Data Transmitted or Received
0
8
UART_DR_FE
UART Framing Error
8
9
UART_DR_OE
UART Overrun Error
11
12
UART_DR_PE
UART Parity Error
9
10
ECR
UART Receive Status/Error Clear
0x4
-1
read-write
n
0x0
0x0
UART_ECR_DATA
Error Clear
0
8
FBRD
UART Fractional Baud-Rate Divisor
0x28
-1
read-write
n
0x0
0x0
UART_FBRD_DIVFRAC
Fractional Baud-Rate Divisor
0
6
FR
UART Flag
0x18
-1
read-write
n
0x0
0x0
UART_FR_BUSY
UART Busy
3
4
UART_FR_CTS
Clear To Send
0
1
UART_FR_DCD
Data Carrier Detect
2
3
UART_FR_DSR
Data Set Ready
1
2
UART_FR_RI
Ring Indicator
8
9
UART_FR_RXFE
UART Receive FIFO Empty
4
5
UART_FR_RXFF
UART Receive FIFO Full
6
7
UART_FR_TXFE
UART Transmit FIFO Empty
7
8
UART_FR_TXFF
UART Transmit FIFO Full
5
6
IBRD
UART Integer Baud-Rate Divisor
0x24
-1
read-write
n
0x0
0x0
UART_IBRD_DIVINT
Integer Baud-Rate Divisor
0
16
ICR
UART Interrupt Clear
0x44
-1
write-only
n
0x0
0x0
UART_ICR_9BITIC
9-Bit Mode Interrupt Clear
12
13
write-only
UART_ICR_BEIC
Break Error Interrupt Clear
9
10
write-only
UART_ICR_CTSMIC
UART Clear to Send Modem Interrupt Clear
1
2
write-only
UART_ICR_DCDMIC
UART Data Carrier Detect Modem Interrupt Clear
2
3
write-only
UART_ICR_DSRMIC
UART Data Set Ready Modem Interrupt Clear
3
4
write-only
UART_ICR_FEIC
Framing Error Interrupt Clear
7
8
write-only
UART_ICR_OEIC
Overrun Error Interrupt Clear
10
11
write-only
UART_ICR_PEIC
Parity Error Interrupt Clear
8
9
write-only
UART_ICR_RIMIC
UART Ring Indicator Modem Interrupt Clear
0
1
write-only
UART_ICR_RTIC
Receive Time-Out Interrupt Clear
6
7
write-only
UART_ICR_RXIC
Receive Interrupt Clear
4
5
write-only
UART_ICR_TXIC
Transmit Interrupt Clear
5
6
write-only
IFLS
UART Interrupt FIFO Level Select
0x34
-1
read-write
n
0x0
0x0
UART_IFLS_RX
UART Receive Interrupt FIFO Level Select
3
6
UART_IFLS_RX1_8
RX FIFO >= 1/8 full
0x0
UART_IFLS_RX2_8
RX FIFO >= 1/4 full
0x1
UART_IFLS_RX4_8
RX FIFO >= 1/2 full (default)
0x2
UART_IFLS_RX6_8
RX FIFO >= 3/4 full
0x3
UART_IFLS_RX7_8
RX FIFO >= 7/8 full
0x4
UART_IFLS_TX
UART Transmit Interrupt FIFO Level Select
0
3
UART_IFLS_TX1_8
TX FIFO and lt = 1/8 full
0x0
UART_IFLS_TX2_8
TX FIFO and lt = 1/4 full
0x1
UART_IFLS_TX4_8
TX FIFO and lt = 1/2 full (default)
0x2
UART_IFLS_TX6_8
TX FIFO and lt = 3/4 full
0x3
UART_IFLS_TX7_8
TX FIFO and lt = 7/8 full
0x4
ILPR
UART IrDA Low-Power Register
0x20
-1
read-write
n
0x0
0x0
UART_ILPR_ILPDVSR
IrDA Low-Power Divisor
0
8
IM
UART Interrupt Mask
0x38
-1
read-write
n
0x0
0x0
UART_IM_9BITIM
9-Bit Mode Interrupt Mask
12
13
UART_IM_BEIM
UART Break Error Interrupt Mask
9
10
UART_IM_CTSMIM
UART Clear to Send Modem Interrupt Mask
1
2
UART_IM_DCDMIM
UART Data Carrier Detect Modem Interrupt Mask
2
3
UART_IM_DSRMIM
UART Data Set Ready Modem Interrupt Mask
3
4
UART_IM_FEIM
UART Framing Error Interrupt Mask
7
8
UART_IM_OEIM
UART Overrun Error Interrupt Mask
10
11
UART_IM_PEIM
UART Parity Error Interrupt Mask
8
9
UART_IM_RIMIM
UART Ring Indicator Modem Interrupt Mask
0
1
UART_IM_RTIM
UART Receive Time-Out Interrupt Mask
6
7
UART_IM_RXIM
UART Receive Interrupt Mask
4
5
UART_IM_TXIM
UART Transmit Interrupt Mask
5
6
LCRH
UART Line Control
0x2C
-1
read-write
n
0x0
0x0
UART_LCRH_BRK
UART Send Break
0
1
UART_LCRH_EPS
UART Even Parity Select
2
3
UART_LCRH_FEN
UART Enable FIFOs
4
5
UART_LCRH_PEN
UART Parity Enable
1
2
UART_LCRH_SPS
UART Stick Parity Select
7
8
UART_LCRH_STP2
UART Two Stop Bits Select
3
4
UART_LCRH_WLEN
UART Word Length
5
7
UART_LCRH_WLEN_5
5 bits (default)
0x0
UART_LCRH_WLEN_6
6 bits
0x1
UART_LCRH_WLEN_7
7 bits
0x2
UART_LCRH_WLEN_8
8 bits
0x3
MIS
UART Masked Interrupt Status
0x40
-1
read-write
n
0x0
0x0
UART_MIS_9BITMIS
9-Bit Mode Masked Interrupt Status
12
13
UART_MIS_BEMIS
UART Break Error Masked Interrupt Status
9
10
UART_MIS_CTSMIS
UART Clear to Send Modem Masked Interrupt Status
1
2
UART_MIS_DCDMIS
UART Data Carrier Detect Modem Masked Interrupt Status
2
3
UART_MIS_DSRMIS
UART Data Set Ready Modem Masked Interrupt Status
3
4
UART_MIS_FEMIS
UART Framing Error Masked Interrupt Status
7
8
UART_MIS_OEMIS
UART Overrun Error Masked Interrupt Status
10
11
UART_MIS_PEMIS
UART Parity Error Masked Interrupt Status
8
9
UART_MIS_RIMIS
UART Ring Indicator Modem Masked Interrupt Status
0
1
UART_MIS_RTMIS
UART Receive Time-Out Masked Interrupt Status
6
7
UART_MIS_RXMIS
UART Receive Masked Interrupt Status
4
5
UART_MIS_TXMIS
UART Transmit Masked Interrupt Status
5
6
PP
UART Peripheral Properties
0xFC0
-1
read-write
n
0x0
0x0
UART_PP_NB
9-Bit Support
1
2
UART_PP_SC
Smart Card Support
0
1
RIS
UART Raw Interrupt Status
0x3C
-1
read-write
n
0x0
0x0
UART_RIS_9BITRIS
9-Bit Mode Raw Interrupt Status
12
13
UART_RIS_BERIS
UART Break Error Raw Interrupt Status
9
10
UART_RIS_CTSRIS
UART Clear to Send Modem Raw Interrupt Status
1
2
UART_RIS_DCDRIS
UART Data Carrier Detect Modem Raw Interrupt Status
2
3
UART_RIS_DSRRIS
UART Data Set Ready Modem Raw Interrupt Status
3
4
UART_RIS_FERIS
UART Framing Error Raw Interrupt Status
7
8
UART_RIS_OERIS
UART Overrun Error Raw Interrupt Status
10
11
UART_RIS_PERIS
UART Parity Error Raw Interrupt Status
8
9
UART_RIS_RIRIS
UART Ring Indicator Modem Raw Interrupt Status
0
1
UART_RIS_RTRIS
UART Receive Time-Out Raw Interrupt Status
6
7
UART_RIS_RXRIS
UART Receive Raw Interrupt Status
4
5
UART_RIS_TXRIS
UART Transmit Raw Interrupt Status
5
6
RSR
UART Receive Status/Error Clear
0x4
-1
read-write
n
0x0
0x0
UART_RSR_BE
UART Break Error
2
3
UART_RSR_FE
UART Framing Error
0
1
UART_RSR_OE
UART Overrun Error
3
4
UART_RSR_PE
UART Parity Error
1
2
UART0CC
UART Clock Configuration
0xFC8
read-write
n
0x0
0x0
UART_CC_CS
UART Baud Clock Source
0
4
UART_CC_CS_SYSCLK
System clock (based on clock source and divisor factor)
0x0
UART_CC_CS_PIOSC
PIOSC
0x5
UART0CTL
UART Control
0x30
read-write
n
0x0
0x0
UART_CTL_CTSEN
Enable Clear To Send
15
16
UART_CTL_DTR
Data Terminal Ready
10
11
UART_CTL_EOT
End of Transmission
4
5
UART_CTL_HSE
High-Speed Enable
5
6
UART_CTL_LBE
UART Loop Back Enable
7
8
UART_CTL_RTS
Request to Send
11
12
UART_CTL_RTSEN
Enable Request to Send
14
15
UART_CTL_RXE
UART Receive Enable
9
10
UART_CTL_SIREN
UART SIR Enable
1
2
UART_CTL_SIRLP
UART SIR Low-Power Mode
2
3
UART_CTL_SMART
ISO 7816 Smart Card Support
3
4
UART_CTL_TXE
UART Transmit Enable
8
9
UART_CTL_UARTEN
UART Enable
0
1
UART0DMACTL
UART DMA Control
0x48
read-write
n
0x0
0x0
UART_DMACTL_DMAERR
DMA on Error
2
3
UART_DMACTL_RXDMAE
Receive DMA Enable
0
1
UART_DMACTL_TXDMAE
Transmit DMA Enable
1
2
UART0DR
UART Data
0x0
read-write
n
0x0
0x0
UART_DR_BE
UART Break Error
10
11
UART_DR_DATA
Data Transmitted or Received
0
8
UART_DR_FE
UART Framing Error
8
9
UART_DR_OE
UART Overrun Error
11
12
UART_DR_PE
UART Parity Error
9
10
UART0ECR
UART Receive Status/Error Clear
UART_ALT
0x4
read-write
n
0x0
0x0
UART_ECR_DATA
Error Clear
0
8
UART0FBRD
UART Fractional Baud-Rate Divisor
0x28
read-write
n
0x0
0x0
UART_FBRD_DIVFRAC
Fractional Baud-Rate Divisor
0
6
UART0FR
UART Flag
0x18
read-write
n
0x0
0x0
UART_FR_BUSY
UART Busy
3
4
UART_FR_CTS
Clear To Send
0
1
UART_FR_DCD
Data Carrier Detect
2
3
UART_FR_DSR
Data Set Ready
1
2
UART_FR_RI
Ring Indicator
8
9
UART_FR_RXFE
UART Receive FIFO Empty
4
5
UART_FR_RXFF
UART Receive FIFO Full
6
7
UART_FR_TXFE
UART Transmit FIFO Empty
7
8
UART_FR_TXFF
UART Transmit FIFO Full
5
6
UART0IBRD
UART Integer Baud-Rate Divisor
0x24
read-write
n
0x0
0x0
UART_IBRD_DIVINT
Integer Baud-Rate Divisor
0
16
UART0ICR
UART Interrupt Clear
0x44
write-only
n
0x0
0x0
UART_ICR_9BITIC
9-Bit Mode Interrupt Clear
12
13
write-only
UART_ICR_BEIC
Break Error Interrupt Clear
9
10
write-only
UART_ICR_CTSMIC
UART Clear to Send Modem Interrupt Clear
1
2
write-only
UART_ICR_DCDMIC
UART Data Carrier Detect Modem Interrupt Clear
2
3
write-only
UART_ICR_DSRMIC
UART Data Set Ready Modem Interrupt Clear
3
4
write-only
UART_ICR_FEIC
Framing Error Interrupt Clear
7
8
write-only
UART_ICR_OEIC
Overrun Error Interrupt Clear
10
11
write-only
UART_ICR_PEIC
Parity Error Interrupt Clear
8
9
write-only
UART_ICR_RIMIC
UART Ring Indicator Modem Interrupt Clear
0
1
write-only
UART_ICR_RTIC
Receive Time-Out Interrupt Clear
6
7
write-only
UART_ICR_RXIC
Receive Interrupt Clear
4
5
write-only
UART_ICR_TXIC
Transmit Interrupt Clear
5
6
write-only
UART0IFLS
UART Interrupt FIFO Level Select
0x34
read-write
n
0x0
0x0
UART_IFLS_RX
UART Receive Interrupt FIFO Level Select
3
6
UART_IFLS_RX1_8
RX FIFO >= 1/8 full
0x0
UART_IFLS_RX2_8
RX FIFO >= 1/4 full
0x1
UART_IFLS_RX4_8
RX FIFO >= 1/2 full (default)
0x2
UART_IFLS_RX6_8
RX FIFO >= 3/4 full
0x3
UART_IFLS_RX7_8
RX FIFO >= 7/8 full
0x4
UART_IFLS_TX
UART Transmit Interrupt FIFO Level Select
0
3
UART_IFLS_TX1_8
TX FIFO <= 1/8 full
0x0
UART_IFLS_TX2_8
TX FIFO <= 1/4 full
0x1
UART_IFLS_TX4_8
TX FIFO <= 1/2 full (default)
0x2
UART_IFLS_TX6_8
TX FIFO <= 3/4 full
0x3
UART_IFLS_TX7_8
TX FIFO <= 7/8 full
0x4
UART0ILPR
UART IrDA Low-Power Register
0x20
read-write
n
0x0
0x0
UART_ILPR_ILPDVSR
IrDA Low-Power Divisor
0
8
UART0IM
UART Interrupt Mask
0x38
read-write
n
0x0
0x0
UART_IM_9BITIM
9-Bit Mode Interrupt Mask
12
13
UART_IM_BEIM
UART Break Error Interrupt Mask
9
10
UART_IM_CTSMIM
UART Clear to Send Modem Interrupt Mask
1
2
UART_IM_DCDMIM
UART Data Carrier Detect Modem Interrupt Mask
2
3
UART_IM_DSRMIM
UART Data Set Ready Modem Interrupt Mask
3
4
UART_IM_FEIM
UART Framing Error Interrupt Mask
7
8
UART_IM_OEIM
UART Overrun Error Interrupt Mask
10
11
UART_IM_PEIM
UART Parity Error Interrupt Mask
8
9
UART_IM_RIMIM
UART Ring Indicator Modem Interrupt Mask
0
1
UART_IM_RTIM
UART Receive Time-Out Interrupt Mask
6
7
UART_IM_RXIM
UART Receive Interrupt Mask
4
5
UART_IM_TXIM
UART Transmit Interrupt Mask
5
6
UART0LCRH
UART Line Control
0x2C
read-write
n
0x0
0x0
UART_LCRH_BRK
UART Send Break
0
1
UART_LCRH_EPS
UART Even Parity Select
2
3
UART_LCRH_FEN
UART Enable FIFOs
4
5
UART_LCRH_PEN
UART Parity Enable
1
2
UART_LCRH_SPS
UART Stick Parity Select
7
8
UART_LCRH_STP2
UART Two Stop Bits Select
3
4
UART_LCRH_WLEN
UART Word Length
5
7
UART_LCRH_WLEN_5
5 bits (default)
0x0
UART_LCRH_WLEN_6
6 bits
0x1
UART_LCRH_WLEN_7
7 bits
0x2
UART_LCRH_WLEN_8
8 bits
0x3
UART0MIS
UART Masked Interrupt Status
0x40
read-write
n
0x0
0x0
UART_MIS_9BITMIS
9-Bit Mode Masked Interrupt Status
12
13
UART_MIS_BEMIS
UART Break Error Masked Interrupt Status
9
10
UART_MIS_CTSMIS
UART Clear to Send Modem Masked Interrupt Status
1
2
UART_MIS_DCDMIS
UART Data Carrier Detect Modem Masked Interrupt Status
2
3
UART_MIS_DSRMIS
UART Data Set Ready Modem Masked Interrupt Status
3
4
UART_MIS_FEMIS
UART Framing Error Masked Interrupt Status
7
8
UART_MIS_OEMIS
UART Overrun Error Masked Interrupt Status
10
11
UART_MIS_PEMIS
UART Parity Error Masked Interrupt Status
8
9
UART_MIS_RIMIS
UART Ring Indicator Modem Masked Interrupt Status
0
1
UART_MIS_RTMIS
UART Receive Time-Out Masked Interrupt Status
6
7
UART_MIS_RXMIS
UART Receive Masked Interrupt Status
4
5
UART_MIS_TXMIS
UART Transmit Masked Interrupt Status
5
6
UART0PP
UART Peripheral Properties
0xFC0
read-write
n
0x0
0x0
UART_PP_NB
9-Bit Support
1
2
UART_PP_SC
Smart Card Support
0
1
UART0RIS
UART Raw Interrupt Status
0x3C
read-write
n
0x0
0x0
UART_RIS_9BITRIS
9-Bit Mode Raw Interrupt Status
12
13
UART_RIS_BERIS
UART Break Error Raw Interrupt Status
9
10
UART_RIS_CTSRIS
UART Clear to Send Modem Raw Interrupt Status
1
2
UART_RIS_DCDRIS
UART Data Carrier Detect Modem Raw Interrupt Status
2
3
UART_RIS_DSRRIS
UART Data Set Ready Modem Raw Interrupt Status
3
4
UART_RIS_FERIS
UART Framing Error Raw Interrupt Status
7
8
UART_RIS_OERIS
UART Overrun Error Raw Interrupt Status
10
11
UART_RIS_PERIS
UART Parity Error Raw Interrupt Status
8
9
UART_RIS_RIRIS
UART Ring Indicator Modem Raw Interrupt Status
0
1
UART_RIS_RTRIS
UART Receive Time-Out Raw Interrupt Status
6
7
UART_RIS_RXRIS
UART Receive Raw Interrupt Status
4
5
UART_RIS_TXRIS
UART Transmit Raw Interrupt Status
5
6
UART0RSR
UART Receive Status/Error Clear
0x4
read-write
n
0x0
0x0
UART_RSR_BE
UART Break Error
2
3
UART_RSR_FE
UART Framing Error
0
1
UART_RSR_OE
UART Overrun Error
3
4
UART_RSR_PE
UART Parity Error
1
2
_9BITADDR
UART 9-Bit Self Address
0xA4
-1
read-write
n
0x0
0x0
UART_9BITADDR_9BITEN
Enable 9-Bit Mode
15
16
UART_9BITADDR_ADDR
Self Address for 9-Bit Mode
0
8
_9BITAMASK
UART 9-Bit Self Address Mask
0xA8
-1
read-write
n
0x0
0x0
UART_9BITAMASK_MASK
Self Address Mask for 9-Bit Mode
0
8
UART2
Register map for UART0 peripheral
UART
0x0
0x0
0x1000
registers
n
UART2
33
9BITADDR
UART 9-Bit Self Address
0xA4
read-write
n
0x0
0x0
UART_9BITADDR_9BITEN
Enable 9-Bit Mode
15
16
UART_9BITADDR_ADDR
Self Address for 9-Bit Mode
0
8
9BITAMASK
UART 9-Bit Self Address Mask
0xA8
read-write
n
0x0
0x0
UART_9BITAMASK_MASK
Self Address Mask for 9-Bit Mode
0
8
CC
UART Clock Configuration
0xFC8
-1
read-write
n
0x0
0x0
UART_CC_CS
UART Baud Clock Source
0
4
UART_CC_CS_SYSCLK
System clock (based on clock source and divisor factor)
0x0
UART_CC_CS_PIOSC
PIOSC
0x5
CTL
UART Control
0x30
-1
read-write
n
0x0
0x0
UART_CTL_CTSEN
Enable Clear To Send
15
16
UART_CTL_DTR
Data Terminal Ready
10
11
UART_CTL_EOT
End of Transmission
4
5
UART_CTL_HSE
High-Speed Enable
5
6
UART_CTL_LBE
UART Loop Back Enable
7
8
UART_CTL_RTS
Request to Send
11
12
UART_CTL_RTSEN
Enable Request to Send
14
15
UART_CTL_RXE
UART Receive Enable
9
10
UART_CTL_SIREN
UART SIR Enable
1
2
UART_CTL_SIRLP
UART SIR Low-Power Mode
2
3
UART_CTL_SMART
ISO 7816 Smart Card Support
3
4
UART_CTL_TXE
UART Transmit Enable
8
9
UART_CTL_UARTEN
UART Enable
0
1
DMACTL
UART DMA Control
0x48
-1
read-write
n
0x0
0x0
UART_DMACTL_DMAERR
DMA on Error
2
3
UART_DMACTL_RXDMAE
Receive DMA Enable
0
1
UART_DMACTL_TXDMAE
Transmit DMA Enable
1
2
DR
UART Data
0x0
-1
read-write
n
0x0
0x0
UART_DR_BE
UART Break Error
10
11
UART_DR_DATA
Data Transmitted or Received
0
8
UART_DR_FE
UART Framing Error
8
9
UART_DR_OE
UART Overrun Error
11
12
UART_DR_PE
UART Parity Error
9
10
ECR
UART Receive Status/Error Clear
0x4
-1
read-write
n
0x0
0x0
UART_ECR_DATA
Error Clear
0
8
FBRD
UART Fractional Baud-Rate Divisor
0x28
-1
read-write
n
0x0
0x0
UART_FBRD_DIVFRAC
Fractional Baud-Rate Divisor
0
6
FR
UART Flag
0x18
-1
read-write
n
0x0
0x0
UART_FR_BUSY
UART Busy
3
4
UART_FR_CTS
Clear To Send
0
1
UART_FR_DCD
Data Carrier Detect
2
3
UART_FR_DSR
Data Set Ready
1
2
UART_FR_RI
Ring Indicator
8
9
UART_FR_RXFE
UART Receive FIFO Empty
4
5
UART_FR_RXFF
UART Receive FIFO Full
6
7
UART_FR_TXFE
UART Transmit FIFO Empty
7
8
UART_FR_TXFF
UART Transmit FIFO Full
5
6
IBRD
UART Integer Baud-Rate Divisor
0x24
-1
read-write
n
0x0
0x0
UART_IBRD_DIVINT
Integer Baud-Rate Divisor
0
16
ICR
UART Interrupt Clear
0x44
-1
write-only
n
0x0
0x0
UART_ICR_9BITIC
9-Bit Mode Interrupt Clear
12
13
write-only
UART_ICR_BEIC
Break Error Interrupt Clear
9
10
write-only
UART_ICR_CTSMIC
UART Clear to Send Modem Interrupt Clear
1
2
write-only
UART_ICR_DCDMIC
UART Data Carrier Detect Modem Interrupt Clear
2
3
write-only
UART_ICR_DSRMIC
UART Data Set Ready Modem Interrupt Clear
3
4
write-only
UART_ICR_FEIC
Framing Error Interrupt Clear
7
8
write-only
UART_ICR_OEIC
Overrun Error Interrupt Clear
10
11
write-only
UART_ICR_PEIC
Parity Error Interrupt Clear
8
9
write-only
UART_ICR_RIMIC
UART Ring Indicator Modem Interrupt Clear
0
1
write-only
UART_ICR_RTIC
Receive Time-Out Interrupt Clear
6
7
write-only
UART_ICR_RXIC
Receive Interrupt Clear
4
5
write-only
UART_ICR_TXIC
Transmit Interrupt Clear
5
6
write-only
IFLS
UART Interrupt FIFO Level Select
0x34
-1
read-write
n
0x0
0x0
UART_IFLS_RX
UART Receive Interrupt FIFO Level Select
3
6
UART_IFLS_RX1_8
RX FIFO >= 1/8 full
0x0
UART_IFLS_RX2_8
RX FIFO >= 1/4 full
0x1
UART_IFLS_RX4_8
RX FIFO >= 1/2 full (default)
0x2
UART_IFLS_RX6_8
RX FIFO >= 3/4 full
0x3
UART_IFLS_RX7_8
RX FIFO >= 7/8 full
0x4
UART_IFLS_TX
UART Transmit Interrupt FIFO Level Select
0
3
UART_IFLS_TX1_8
TX FIFO and lt = 1/8 full
0x0
UART_IFLS_TX2_8
TX FIFO and lt = 1/4 full
0x1
UART_IFLS_TX4_8
TX FIFO and lt = 1/2 full (default)
0x2
UART_IFLS_TX6_8
TX FIFO and lt = 3/4 full
0x3
UART_IFLS_TX7_8
TX FIFO and lt = 7/8 full
0x4
ILPR
UART IrDA Low-Power Register
0x20
-1
read-write
n
0x0
0x0
UART_ILPR_ILPDVSR
IrDA Low-Power Divisor
0
8
IM
UART Interrupt Mask
0x38
-1
read-write
n
0x0
0x0
UART_IM_9BITIM
9-Bit Mode Interrupt Mask
12
13
UART_IM_BEIM
UART Break Error Interrupt Mask
9
10
UART_IM_CTSMIM
UART Clear to Send Modem Interrupt Mask
1
2
UART_IM_DCDMIM
UART Data Carrier Detect Modem Interrupt Mask
2
3
UART_IM_DSRMIM
UART Data Set Ready Modem Interrupt Mask
3
4
UART_IM_FEIM
UART Framing Error Interrupt Mask
7
8
UART_IM_OEIM
UART Overrun Error Interrupt Mask
10
11
UART_IM_PEIM
UART Parity Error Interrupt Mask
8
9
UART_IM_RIMIM
UART Ring Indicator Modem Interrupt Mask
0
1
UART_IM_RTIM
UART Receive Time-Out Interrupt Mask
6
7
UART_IM_RXIM
UART Receive Interrupt Mask
4
5
UART_IM_TXIM
UART Transmit Interrupt Mask
5
6
LCRH
UART Line Control
0x2C
-1
read-write
n
0x0
0x0
UART_LCRH_BRK
UART Send Break
0
1
UART_LCRH_EPS
UART Even Parity Select
2
3
UART_LCRH_FEN
UART Enable FIFOs
4
5
UART_LCRH_PEN
UART Parity Enable
1
2
UART_LCRH_SPS
UART Stick Parity Select
7
8
UART_LCRH_STP2
UART Two Stop Bits Select
3
4
UART_LCRH_WLEN
UART Word Length
5
7
UART_LCRH_WLEN_5
5 bits (default)
0x0
UART_LCRH_WLEN_6
6 bits
0x1
UART_LCRH_WLEN_7
7 bits
0x2
UART_LCRH_WLEN_8
8 bits
0x3
MIS
UART Masked Interrupt Status
0x40
-1
read-write
n
0x0
0x0
UART_MIS_9BITMIS
9-Bit Mode Masked Interrupt Status
12
13
UART_MIS_BEMIS
UART Break Error Masked Interrupt Status
9
10
UART_MIS_CTSMIS
UART Clear to Send Modem Masked Interrupt Status
1
2
UART_MIS_DCDMIS
UART Data Carrier Detect Modem Masked Interrupt Status
2
3
UART_MIS_DSRMIS
UART Data Set Ready Modem Masked Interrupt Status
3
4
UART_MIS_FEMIS
UART Framing Error Masked Interrupt Status
7
8
UART_MIS_OEMIS
UART Overrun Error Masked Interrupt Status
10
11
UART_MIS_PEMIS
UART Parity Error Masked Interrupt Status
8
9
UART_MIS_RIMIS
UART Ring Indicator Modem Masked Interrupt Status
0
1
UART_MIS_RTMIS
UART Receive Time-Out Masked Interrupt Status
6
7
UART_MIS_RXMIS
UART Receive Masked Interrupt Status
4
5
UART_MIS_TXMIS
UART Transmit Masked Interrupt Status
5
6
PP
UART Peripheral Properties
0xFC0
-1
read-write
n
0x0
0x0
UART_PP_NB
9-Bit Support
1
2
UART_PP_SC
Smart Card Support
0
1
RIS
UART Raw Interrupt Status
0x3C
-1
read-write
n
0x0
0x0
UART_RIS_9BITRIS
9-Bit Mode Raw Interrupt Status
12
13
UART_RIS_BERIS
UART Break Error Raw Interrupt Status
9
10
UART_RIS_CTSRIS
UART Clear to Send Modem Raw Interrupt Status
1
2
UART_RIS_DCDRIS
UART Data Carrier Detect Modem Raw Interrupt Status
2
3
UART_RIS_DSRRIS
UART Data Set Ready Modem Raw Interrupt Status
3
4
UART_RIS_FERIS
UART Framing Error Raw Interrupt Status
7
8
UART_RIS_OERIS
UART Overrun Error Raw Interrupt Status
10
11
UART_RIS_PERIS
UART Parity Error Raw Interrupt Status
8
9
UART_RIS_RIRIS
UART Ring Indicator Modem Raw Interrupt Status
0
1
UART_RIS_RTRIS
UART Receive Time-Out Raw Interrupt Status
6
7
UART_RIS_RXRIS
UART Receive Raw Interrupt Status
4
5
UART_RIS_TXRIS
UART Transmit Raw Interrupt Status
5
6
RSR
UART Receive Status/Error Clear
0x4
-1
read-write
n
0x0
0x0
UART_RSR_BE
UART Break Error
2
3
UART_RSR_FE
UART Framing Error
0
1
UART_RSR_OE
UART Overrun Error
3
4
UART_RSR_PE
UART Parity Error
1
2
UART0CC
UART Clock Configuration
0xFC8
read-write
n
0x0
0x0
UART_CC_CS
UART Baud Clock Source
0
4
UART_CC_CS_SYSCLK
System clock (based on clock source and divisor factor)
0x0
UART_CC_CS_PIOSC
PIOSC
0x5
UART0CTL
UART Control
0x30
read-write
n
0x0
0x0
UART_CTL_CTSEN
Enable Clear To Send
15
16
UART_CTL_DTR
Data Terminal Ready
10
11
UART_CTL_EOT
End of Transmission
4
5
UART_CTL_HSE
High-Speed Enable
5
6
UART_CTL_LBE
UART Loop Back Enable
7
8
UART_CTL_RTS
Request to Send
11
12
UART_CTL_RTSEN
Enable Request to Send
14
15
UART_CTL_RXE
UART Receive Enable
9
10
UART_CTL_SIREN
UART SIR Enable
1
2
UART_CTL_SIRLP
UART SIR Low-Power Mode
2
3
UART_CTL_SMART
ISO 7816 Smart Card Support
3
4
UART_CTL_TXE
UART Transmit Enable
8
9
UART_CTL_UARTEN
UART Enable
0
1
UART0DMACTL
UART DMA Control
0x48
read-write
n
0x0
0x0
UART_DMACTL_DMAERR
DMA on Error
2
3
UART_DMACTL_RXDMAE
Receive DMA Enable
0
1
UART_DMACTL_TXDMAE
Transmit DMA Enable
1
2
UART0DR
UART Data
0x0
read-write
n
0x0
0x0
UART_DR_BE
UART Break Error
10
11
UART_DR_DATA
Data Transmitted or Received
0
8
UART_DR_FE
UART Framing Error
8
9
UART_DR_OE
UART Overrun Error
11
12
UART_DR_PE
UART Parity Error
9
10
UART0ECR
UART Receive Status/Error Clear
UART_ALT
0x4
read-write
n
0x0
0x0
UART_ECR_DATA
Error Clear
0
8
UART0FBRD
UART Fractional Baud-Rate Divisor
0x28
read-write
n
0x0
0x0
UART_FBRD_DIVFRAC
Fractional Baud-Rate Divisor
0
6
UART0FR
UART Flag
0x18
read-write
n
0x0
0x0
UART_FR_BUSY
UART Busy
3
4
UART_FR_CTS
Clear To Send
0
1
UART_FR_DCD
Data Carrier Detect
2
3
UART_FR_DSR
Data Set Ready
1
2
UART_FR_RI
Ring Indicator
8
9
UART_FR_RXFE
UART Receive FIFO Empty
4
5
UART_FR_RXFF
UART Receive FIFO Full
6
7
UART_FR_TXFE
UART Transmit FIFO Empty
7
8
UART_FR_TXFF
UART Transmit FIFO Full
5
6
UART0IBRD
UART Integer Baud-Rate Divisor
0x24
read-write
n
0x0
0x0
UART_IBRD_DIVINT
Integer Baud-Rate Divisor
0
16
UART0ICR
UART Interrupt Clear
0x44
write-only
n
0x0
0x0
UART_ICR_9BITIC
9-Bit Mode Interrupt Clear
12
13
write-only
UART_ICR_BEIC
Break Error Interrupt Clear
9
10
write-only
UART_ICR_CTSMIC
UART Clear to Send Modem Interrupt Clear
1
2
write-only
UART_ICR_DCDMIC
UART Data Carrier Detect Modem Interrupt Clear
2
3
write-only
UART_ICR_DSRMIC
UART Data Set Ready Modem Interrupt Clear
3
4
write-only
UART_ICR_FEIC
Framing Error Interrupt Clear
7
8
write-only
UART_ICR_OEIC
Overrun Error Interrupt Clear
10
11
write-only
UART_ICR_PEIC
Parity Error Interrupt Clear
8
9
write-only
UART_ICR_RIMIC
UART Ring Indicator Modem Interrupt Clear
0
1
write-only
UART_ICR_RTIC
Receive Time-Out Interrupt Clear
6
7
write-only
UART_ICR_RXIC
Receive Interrupt Clear
4
5
write-only
UART_ICR_TXIC
Transmit Interrupt Clear
5
6
write-only
UART0IFLS
UART Interrupt FIFO Level Select
0x34
read-write
n
0x0
0x0
UART_IFLS_RX
UART Receive Interrupt FIFO Level Select
3
6
UART_IFLS_RX1_8
RX FIFO >= 1/8 full
0x0
UART_IFLS_RX2_8
RX FIFO >= 1/4 full
0x1
UART_IFLS_RX4_8
RX FIFO >= 1/2 full (default)
0x2
UART_IFLS_RX6_8
RX FIFO >= 3/4 full
0x3
UART_IFLS_RX7_8
RX FIFO >= 7/8 full
0x4
UART_IFLS_TX
UART Transmit Interrupt FIFO Level Select
0
3
UART_IFLS_TX1_8
TX FIFO <= 1/8 full
0x0
UART_IFLS_TX2_8
TX FIFO <= 1/4 full
0x1
UART_IFLS_TX4_8
TX FIFO <= 1/2 full (default)
0x2
UART_IFLS_TX6_8
TX FIFO <= 3/4 full
0x3
UART_IFLS_TX7_8
TX FIFO <= 7/8 full
0x4
UART0ILPR
UART IrDA Low-Power Register
0x20
read-write
n
0x0
0x0
UART_ILPR_ILPDVSR
IrDA Low-Power Divisor
0
8
UART0IM
UART Interrupt Mask
0x38
read-write
n
0x0
0x0
UART_IM_9BITIM
9-Bit Mode Interrupt Mask
12
13
UART_IM_BEIM
UART Break Error Interrupt Mask
9
10
UART_IM_CTSMIM
UART Clear to Send Modem Interrupt Mask
1
2
UART_IM_DCDMIM
UART Data Carrier Detect Modem Interrupt Mask
2
3
UART_IM_DSRMIM
UART Data Set Ready Modem Interrupt Mask
3
4
UART_IM_FEIM
UART Framing Error Interrupt Mask
7
8
UART_IM_OEIM
UART Overrun Error Interrupt Mask
10
11
UART_IM_PEIM
UART Parity Error Interrupt Mask
8
9
UART_IM_RIMIM
UART Ring Indicator Modem Interrupt Mask
0
1
UART_IM_RTIM
UART Receive Time-Out Interrupt Mask
6
7
UART_IM_RXIM
UART Receive Interrupt Mask
4
5
UART_IM_TXIM
UART Transmit Interrupt Mask
5
6
UART0LCRH
UART Line Control
0x2C
read-write
n
0x0
0x0
UART_LCRH_BRK
UART Send Break
0
1
UART_LCRH_EPS
UART Even Parity Select
2
3
UART_LCRH_FEN
UART Enable FIFOs
4
5
UART_LCRH_PEN
UART Parity Enable
1
2
UART_LCRH_SPS
UART Stick Parity Select
7
8
UART_LCRH_STP2
UART Two Stop Bits Select
3
4
UART_LCRH_WLEN
UART Word Length
5
7
UART_LCRH_WLEN_5
5 bits (default)
0x0
UART_LCRH_WLEN_6
6 bits
0x1
UART_LCRH_WLEN_7
7 bits
0x2
UART_LCRH_WLEN_8
8 bits
0x3
UART0MIS
UART Masked Interrupt Status
0x40
read-write
n
0x0
0x0
UART_MIS_9BITMIS
9-Bit Mode Masked Interrupt Status
12
13
UART_MIS_BEMIS
UART Break Error Masked Interrupt Status
9
10
UART_MIS_CTSMIS
UART Clear to Send Modem Masked Interrupt Status
1
2
UART_MIS_DCDMIS
UART Data Carrier Detect Modem Masked Interrupt Status
2
3
UART_MIS_DSRMIS
UART Data Set Ready Modem Masked Interrupt Status
3
4
UART_MIS_FEMIS
UART Framing Error Masked Interrupt Status
7
8
UART_MIS_OEMIS
UART Overrun Error Masked Interrupt Status
10
11
UART_MIS_PEMIS
UART Parity Error Masked Interrupt Status
8
9
UART_MIS_RIMIS
UART Ring Indicator Modem Masked Interrupt Status
0
1
UART_MIS_RTMIS
UART Receive Time-Out Masked Interrupt Status
6
7
UART_MIS_RXMIS
UART Receive Masked Interrupt Status
4
5
UART_MIS_TXMIS
UART Transmit Masked Interrupt Status
5
6
UART0PP
UART Peripheral Properties
0xFC0
read-write
n
0x0
0x0
UART_PP_NB
9-Bit Support
1
2
UART_PP_SC
Smart Card Support
0
1
UART0RIS
UART Raw Interrupt Status
0x3C
read-write
n
0x0
0x0
UART_RIS_9BITRIS
9-Bit Mode Raw Interrupt Status
12
13
UART_RIS_BERIS
UART Break Error Raw Interrupt Status
9
10
UART_RIS_CTSRIS
UART Clear to Send Modem Raw Interrupt Status
1
2
UART_RIS_DCDRIS
UART Data Carrier Detect Modem Raw Interrupt Status
2
3
UART_RIS_DSRRIS
UART Data Set Ready Modem Raw Interrupt Status
3
4
UART_RIS_FERIS
UART Framing Error Raw Interrupt Status
7
8
UART_RIS_OERIS
UART Overrun Error Raw Interrupt Status
10
11
UART_RIS_PERIS
UART Parity Error Raw Interrupt Status
8
9
UART_RIS_RIRIS
UART Ring Indicator Modem Raw Interrupt Status
0
1
UART_RIS_RTRIS
UART Receive Time-Out Raw Interrupt Status
6
7
UART_RIS_RXRIS
UART Receive Raw Interrupt Status
4
5
UART_RIS_TXRIS
UART Transmit Raw Interrupt Status
5
6
UART0RSR
UART Receive Status/Error Clear
0x4
read-write
n
0x0
0x0
UART_RSR_BE
UART Break Error
2
3
UART_RSR_FE
UART Framing Error
0
1
UART_RSR_OE
UART Overrun Error
3
4
UART_RSR_PE
UART Parity Error
1
2
_9BITADDR
UART 9-Bit Self Address
0xA4
-1
read-write
n
0x0
0x0
UART_9BITADDR_9BITEN
Enable 9-Bit Mode
15
16
UART_9BITADDR_ADDR
Self Address for 9-Bit Mode
0
8
_9BITAMASK
UART 9-Bit Self Address Mask
0xA8
-1
read-write
n
0x0
0x0
UART_9BITAMASK_MASK
Self Address Mask for 9-Bit Mode
0
8
UART3
Register map for UART0 peripheral
UART
0x0
0x0
0x1000
registers
n
UART3
59
9BITADDR
UART 9-Bit Self Address
0xA4
read-write
n
0x0
0x0
UART_9BITADDR_9BITEN
Enable 9-Bit Mode
15
16
UART_9BITADDR_ADDR
Self Address for 9-Bit Mode
0
8
9BITAMASK
UART 9-Bit Self Address Mask
0xA8
read-write
n
0x0
0x0
UART_9BITAMASK_MASK
Self Address Mask for 9-Bit Mode
0
8
CC
UART Clock Configuration
0xFC8
-1
read-write
n
0x0
0x0
UART_CC_CS
UART Baud Clock Source
0
4
UART_CC_CS_SYSCLK
System clock (based on clock source and divisor factor)
0x0
UART_CC_CS_PIOSC
PIOSC
0x5
CTL
UART Control
0x30
-1
read-write
n
0x0
0x0
UART_CTL_CTSEN
Enable Clear To Send
15
16
UART_CTL_DTR
Data Terminal Ready
10
11
UART_CTL_EOT
End of Transmission
4
5
UART_CTL_HSE
High-Speed Enable
5
6
UART_CTL_LBE
UART Loop Back Enable
7
8
UART_CTL_RTS
Request to Send
11
12
UART_CTL_RTSEN
Enable Request to Send
14
15
UART_CTL_RXE
UART Receive Enable
9
10
UART_CTL_SIREN
UART SIR Enable
1
2
UART_CTL_SIRLP
UART SIR Low-Power Mode
2
3
UART_CTL_SMART
ISO 7816 Smart Card Support
3
4
UART_CTL_TXE
UART Transmit Enable
8
9
UART_CTL_UARTEN
UART Enable
0
1
DMACTL
UART DMA Control
0x48
-1
read-write
n
0x0
0x0
UART_DMACTL_DMAERR
DMA on Error
2
3
UART_DMACTL_RXDMAE
Receive DMA Enable
0
1
UART_DMACTL_TXDMAE
Transmit DMA Enable
1
2
DR
UART Data
0x0
-1
read-write
n
0x0
0x0
UART_DR_BE
UART Break Error
10
11
UART_DR_DATA
Data Transmitted or Received
0
8
UART_DR_FE
UART Framing Error
8
9
UART_DR_OE
UART Overrun Error
11
12
UART_DR_PE
UART Parity Error
9
10
ECR
UART Receive Status/Error Clear
0x4
-1
read-write
n
0x0
0x0
UART_ECR_DATA
Error Clear
0
8
FBRD
UART Fractional Baud-Rate Divisor
0x28
-1
read-write
n
0x0
0x0
UART_FBRD_DIVFRAC
Fractional Baud-Rate Divisor
0
6
FR
UART Flag
0x18
-1
read-write
n
0x0
0x0
UART_FR_BUSY
UART Busy
3
4
UART_FR_CTS
Clear To Send
0
1
UART_FR_DCD
Data Carrier Detect
2
3
UART_FR_DSR
Data Set Ready
1
2
UART_FR_RI
Ring Indicator
8
9
UART_FR_RXFE
UART Receive FIFO Empty
4
5
UART_FR_RXFF
UART Receive FIFO Full
6
7
UART_FR_TXFE
UART Transmit FIFO Empty
7
8
UART_FR_TXFF
UART Transmit FIFO Full
5
6
IBRD
UART Integer Baud-Rate Divisor
0x24
-1
read-write
n
0x0
0x0
UART_IBRD_DIVINT
Integer Baud-Rate Divisor
0
16
ICR
UART Interrupt Clear
0x44
-1
write-only
n
0x0
0x0
UART_ICR_9BITIC
9-Bit Mode Interrupt Clear
12
13
write-only
UART_ICR_BEIC
Break Error Interrupt Clear
9
10
write-only
UART_ICR_CTSMIC
UART Clear to Send Modem Interrupt Clear
1
2
write-only
UART_ICR_DCDMIC
UART Data Carrier Detect Modem Interrupt Clear
2
3
write-only
UART_ICR_DSRMIC
UART Data Set Ready Modem Interrupt Clear
3
4
write-only
UART_ICR_FEIC
Framing Error Interrupt Clear
7
8
write-only
UART_ICR_OEIC
Overrun Error Interrupt Clear
10
11
write-only
UART_ICR_PEIC
Parity Error Interrupt Clear
8
9
write-only
UART_ICR_RIMIC
UART Ring Indicator Modem Interrupt Clear
0
1
write-only
UART_ICR_RTIC
Receive Time-Out Interrupt Clear
6
7
write-only
UART_ICR_RXIC
Receive Interrupt Clear
4
5
write-only
UART_ICR_TXIC
Transmit Interrupt Clear
5
6
write-only
IFLS
UART Interrupt FIFO Level Select
0x34
-1
read-write
n
0x0
0x0
UART_IFLS_RX
UART Receive Interrupt FIFO Level Select
3
6
UART_IFLS_RX1_8
RX FIFO >= 1/8 full
0x0
UART_IFLS_RX2_8
RX FIFO >= 1/4 full
0x1
UART_IFLS_RX4_8
RX FIFO >= 1/2 full (default)
0x2
UART_IFLS_RX6_8
RX FIFO >= 3/4 full
0x3
UART_IFLS_RX7_8
RX FIFO >= 7/8 full
0x4
UART_IFLS_TX
UART Transmit Interrupt FIFO Level Select
0
3
UART_IFLS_TX1_8
TX FIFO and lt = 1/8 full
0x0
UART_IFLS_TX2_8
TX FIFO and lt = 1/4 full
0x1
UART_IFLS_TX4_8
TX FIFO and lt = 1/2 full (default)
0x2
UART_IFLS_TX6_8
TX FIFO and lt = 3/4 full
0x3
UART_IFLS_TX7_8
TX FIFO and lt = 7/8 full
0x4
ILPR
UART IrDA Low-Power Register
0x20
-1
read-write
n
0x0
0x0
UART_ILPR_ILPDVSR
IrDA Low-Power Divisor
0
8
IM
UART Interrupt Mask
0x38
-1
read-write
n
0x0
0x0
UART_IM_9BITIM
9-Bit Mode Interrupt Mask
12
13
UART_IM_BEIM
UART Break Error Interrupt Mask
9
10
UART_IM_CTSMIM
UART Clear to Send Modem Interrupt Mask
1
2
UART_IM_DCDMIM
UART Data Carrier Detect Modem Interrupt Mask
2
3
UART_IM_DSRMIM
UART Data Set Ready Modem Interrupt Mask
3
4
UART_IM_FEIM
UART Framing Error Interrupt Mask
7
8
UART_IM_OEIM
UART Overrun Error Interrupt Mask
10
11
UART_IM_PEIM
UART Parity Error Interrupt Mask
8
9
UART_IM_RIMIM
UART Ring Indicator Modem Interrupt Mask
0
1
UART_IM_RTIM
UART Receive Time-Out Interrupt Mask
6
7
UART_IM_RXIM
UART Receive Interrupt Mask
4
5
UART_IM_TXIM
UART Transmit Interrupt Mask
5
6
LCRH
UART Line Control
0x2C
-1
read-write
n
0x0
0x0
UART_LCRH_BRK
UART Send Break
0
1
UART_LCRH_EPS
UART Even Parity Select
2
3
UART_LCRH_FEN
UART Enable FIFOs
4
5
UART_LCRH_PEN
UART Parity Enable
1
2
UART_LCRH_SPS
UART Stick Parity Select
7
8
UART_LCRH_STP2
UART Two Stop Bits Select
3
4
UART_LCRH_WLEN
UART Word Length
5
7
UART_LCRH_WLEN_5
5 bits (default)
0x0
UART_LCRH_WLEN_6
6 bits
0x1
UART_LCRH_WLEN_7
7 bits
0x2
UART_LCRH_WLEN_8
8 bits
0x3
MIS
UART Masked Interrupt Status
0x40
-1
read-write
n
0x0
0x0
UART_MIS_9BITMIS
9-Bit Mode Masked Interrupt Status
12
13
UART_MIS_BEMIS
UART Break Error Masked Interrupt Status
9
10
UART_MIS_CTSMIS
UART Clear to Send Modem Masked Interrupt Status
1
2
UART_MIS_DCDMIS
UART Data Carrier Detect Modem Masked Interrupt Status
2
3
UART_MIS_DSRMIS
UART Data Set Ready Modem Masked Interrupt Status
3
4
UART_MIS_FEMIS
UART Framing Error Masked Interrupt Status
7
8
UART_MIS_OEMIS
UART Overrun Error Masked Interrupt Status
10
11
UART_MIS_PEMIS
UART Parity Error Masked Interrupt Status
8
9
UART_MIS_RIMIS
UART Ring Indicator Modem Masked Interrupt Status
0
1
UART_MIS_RTMIS
UART Receive Time-Out Masked Interrupt Status
6
7
UART_MIS_RXMIS
UART Receive Masked Interrupt Status
4
5
UART_MIS_TXMIS
UART Transmit Masked Interrupt Status
5
6
PP
UART Peripheral Properties
0xFC0
-1
read-write
n
0x0
0x0
UART_PP_NB
9-Bit Support
1
2
UART_PP_SC
Smart Card Support
0
1
RIS
UART Raw Interrupt Status
0x3C
-1
read-write
n
0x0
0x0
UART_RIS_9BITRIS
9-Bit Mode Raw Interrupt Status
12
13
UART_RIS_BERIS
UART Break Error Raw Interrupt Status
9
10
UART_RIS_CTSRIS
UART Clear to Send Modem Raw Interrupt Status
1
2
UART_RIS_DCDRIS
UART Data Carrier Detect Modem Raw Interrupt Status
2
3
UART_RIS_DSRRIS
UART Data Set Ready Modem Raw Interrupt Status
3
4
UART_RIS_FERIS
UART Framing Error Raw Interrupt Status
7
8
UART_RIS_OERIS
UART Overrun Error Raw Interrupt Status
10
11
UART_RIS_PERIS
UART Parity Error Raw Interrupt Status
8
9
UART_RIS_RIRIS
UART Ring Indicator Modem Raw Interrupt Status
0
1
UART_RIS_RTRIS
UART Receive Time-Out Raw Interrupt Status
6
7
UART_RIS_RXRIS
UART Receive Raw Interrupt Status
4
5
UART_RIS_TXRIS
UART Transmit Raw Interrupt Status
5
6
RSR
UART Receive Status/Error Clear
0x4
-1
read-write
n
0x0
0x0
UART_RSR_BE
UART Break Error
2
3
UART_RSR_FE
UART Framing Error
0
1
UART_RSR_OE
UART Overrun Error
3
4
UART_RSR_PE
UART Parity Error
1
2
UART0CC
UART Clock Configuration
0xFC8
read-write
n
0x0
0x0
UART_CC_CS
UART Baud Clock Source
0
4
UART_CC_CS_SYSCLK
System clock (based on clock source and divisor factor)
0x0
UART_CC_CS_PIOSC
PIOSC
0x5
UART0CTL
UART Control
0x30
read-write
n
0x0
0x0
UART_CTL_CTSEN
Enable Clear To Send
15
16
UART_CTL_DTR
Data Terminal Ready
10
11
UART_CTL_EOT
End of Transmission
4
5
UART_CTL_HSE
High-Speed Enable
5
6
UART_CTL_LBE
UART Loop Back Enable
7
8
UART_CTL_RTS
Request to Send
11
12
UART_CTL_RTSEN
Enable Request to Send
14
15
UART_CTL_RXE
UART Receive Enable
9
10
UART_CTL_SIREN
UART SIR Enable
1
2
UART_CTL_SIRLP
UART SIR Low-Power Mode
2
3
UART_CTL_SMART
ISO 7816 Smart Card Support
3
4
UART_CTL_TXE
UART Transmit Enable
8
9
UART_CTL_UARTEN
UART Enable
0
1
UART0DMACTL
UART DMA Control
0x48
read-write
n
0x0
0x0
UART_DMACTL_DMAERR
DMA on Error
2
3
UART_DMACTL_RXDMAE
Receive DMA Enable
0
1
UART_DMACTL_TXDMAE
Transmit DMA Enable
1
2
UART0DR
UART Data
0x0
read-write
n
0x0
0x0
UART_DR_BE
UART Break Error
10
11
UART_DR_DATA
Data Transmitted or Received
0
8
UART_DR_FE
UART Framing Error
8
9
UART_DR_OE
UART Overrun Error
11
12
UART_DR_PE
UART Parity Error
9
10
UART0ECR
UART Receive Status/Error Clear
UART_ALT
0x4
read-write
n
0x0
0x0
UART_ECR_DATA
Error Clear
0
8
UART0FBRD
UART Fractional Baud-Rate Divisor
0x28
read-write
n
0x0
0x0
UART_FBRD_DIVFRAC
Fractional Baud-Rate Divisor
0
6
UART0FR
UART Flag
0x18
read-write
n
0x0
0x0
UART_FR_BUSY
UART Busy
3
4
UART_FR_CTS
Clear To Send
0
1
UART_FR_DCD
Data Carrier Detect
2
3
UART_FR_DSR
Data Set Ready
1
2
UART_FR_RI
Ring Indicator
8
9
UART_FR_RXFE
UART Receive FIFO Empty
4
5
UART_FR_RXFF
UART Receive FIFO Full
6
7
UART_FR_TXFE
UART Transmit FIFO Empty
7
8
UART_FR_TXFF
UART Transmit FIFO Full
5
6
UART0IBRD
UART Integer Baud-Rate Divisor
0x24
read-write
n
0x0
0x0
UART_IBRD_DIVINT
Integer Baud-Rate Divisor
0
16
UART0ICR
UART Interrupt Clear
0x44
write-only
n
0x0
0x0
UART_ICR_9BITIC
9-Bit Mode Interrupt Clear
12
13
write-only
UART_ICR_BEIC
Break Error Interrupt Clear
9
10
write-only
UART_ICR_CTSMIC
UART Clear to Send Modem Interrupt Clear
1
2
write-only
UART_ICR_DCDMIC
UART Data Carrier Detect Modem Interrupt Clear
2
3
write-only
UART_ICR_DSRMIC
UART Data Set Ready Modem Interrupt Clear
3
4
write-only
UART_ICR_FEIC
Framing Error Interrupt Clear
7
8
write-only
UART_ICR_OEIC
Overrun Error Interrupt Clear
10
11
write-only
UART_ICR_PEIC
Parity Error Interrupt Clear
8
9
write-only
UART_ICR_RIMIC
UART Ring Indicator Modem Interrupt Clear
0
1
write-only
UART_ICR_RTIC
Receive Time-Out Interrupt Clear
6
7
write-only
UART_ICR_RXIC
Receive Interrupt Clear
4
5
write-only
UART_ICR_TXIC
Transmit Interrupt Clear
5
6
write-only
UART0IFLS
UART Interrupt FIFO Level Select
0x34
read-write
n
0x0
0x0
UART_IFLS_RX
UART Receive Interrupt FIFO Level Select
3
6
UART_IFLS_RX1_8
RX FIFO >= 1/8 full
0x0
UART_IFLS_RX2_8
RX FIFO >= 1/4 full
0x1
UART_IFLS_RX4_8
RX FIFO >= 1/2 full (default)
0x2
UART_IFLS_RX6_8
RX FIFO >= 3/4 full
0x3
UART_IFLS_RX7_8
RX FIFO >= 7/8 full
0x4
UART_IFLS_TX
UART Transmit Interrupt FIFO Level Select
0
3
UART_IFLS_TX1_8
TX FIFO <= 1/8 full
0x0
UART_IFLS_TX2_8
TX FIFO <= 1/4 full
0x1
UART_IFLS_TX4_8
TX FIFO <= 1/2 full (default)
0x2
UART_IFLS_TX6_8
TX FIFO <= 3/4 full
0x3
UART_IFLS_TX7_8
TX FIFO <= 7/8 full
0x4
UART0ILPR
UART IrDA Low-Power Register
0x20
read-write
n
0x0
0x0
UART_ILPR_ILPDVSR
IrDA Low-Power Divisor
0
8
UART0IM
UART Interrupt Mask
0x38
read-write
n
0x0
0x0
UART_IM_9BITIM
9-Bit Mode Interrupt Mask
12
13
UART_IM_BEIM
UART Break Error Interrupt Mask
9
10
UART_IM_CTSMIM
UART Clear to Send Modem Interrupt Mask
1
2
UART_IM_DCDMIM
UART Data Carrier Detect Modem Interrupt Mask
2
3
UART_IM_DSRMIM
UART Data Set Ready Modem Interrupt Mask
3
4
UART_IM_FEIM
UART Framing Error Interrupt Mask
7
8
UART_IM_OEIM
UART Overrun Error Interrupt Mask
10
11
UART_IM_PEIM
UART Parity Error Interrupt Mask
8
9
UART_IM_RIMIM
UART Ring Indicator Modem Interrupt Mask
0
1
UART_IM_RTIM
UART Receive Time-Out Interrupt Mask
6
7
UART_IM_RXIM
UART Receive Interrupt Mask
4
5
UART_IM_TXIM
UART Transmit Interrupt Mask
5
6
UART0LCRH
UART Line Control
0x2C
read-write
n
0x0
0x0
UART_LCRH_BRK
UART Send Break
0
1
UART_LCRH_EPS
UART Even Parity Select
2
3
UART_LCRH_FEN
UART Enable FIFOs
4
5
UART_LCRH_PEN
UART Parity Enable
1
2
UART_LCRH_SPS
UART Stick Parity Select
7
8
UART_LCRH_STP2
UART Two Stop Bits Select
3
4
UART_LCRH_WLEN
UART Word Length
5
7
UART_LCRH_WLEN_5
5 bits (default)
0x0
UART_LCRH_WLEN_6
6 bits
0x1
UART_LCRH_WLEN_7
7 bits
0x2
UART_LCRH_WLEN_8
8 bits
0x3
UART0MIS
UART Masked Interrupt Status
0x40
read-write
n
0x0
0x0
UART_MIS_9BITMIS
9-Bit Mode Masked Interrupt Status
12
13
UART_MIS_BEMIS
UART Break Error Masked Interrupt Status
9
10
UART_MIS_CTSMIS
UART Clear to Send Modem Masked Interrupt Status
1
2
UART_MIS_DCDMIS
UART Data Carrier Detect Modem Masked Interrupt Status
2
3
UART_MIS_DSRMIS
UART Data Set Ready Modem Masked Interrupt Status
3
4
UART_MIS_FEMIS
UART Framing Error Masked Interrupt Status
7
8
UART_MIS_OEMIS
UART Overrun Error Masked Interrupt Status
10
11
UART_MIS_PEMIS
UART Parity Error Masked Interrupt Status
8
9
UART_MIS_RIMIS
UART Ring Indicator Modem Masked Interrupt Status
0
1
UART_MIS_RTMIS
UART Receive Time-Out Masked Interrupt Status
6
7
UART_MIS_RXMIS
UART Receive Masked Interrupt Status
4
5
UART_MIS_TXMIS
UART Transmit Masked Interrupt Status
5
6
UART0PP
UART Peripheral Properties
0xFC0
read-write
n
0x0
0x0
UART_PP_NB
9-Bit Support
1
2
UART_PP_SC
Smart Card Support
0
1
UART0RIS
UART Raw Interrupt Status
0x3C
read-write
n
0x0
0x0
UART_RIS_9BITRIS
9-Bit Mode Raw Interrupt Status
12
13
UART_RIS_BERIS
UART Break Error Raw Interrupt Status
9
10
UART_RIS_CTSRIS
UART Clear to Send Modem Raw Interrupt Status
1
2
UART_RIS_DCDRIS
UART Data Carrier Detect Modem Raw Interrupt Status
2
3
UART_RIS_DSRRIS
UART Data Set Ready Modem Raw Interrupt Status
3
4
UART_RIS_FERIS
UART Framing Error Raw Interrupt Status
7
8
UART_RIS_OERIS
UART Overrun Error Raw Interrupt Status
10
11
UART_RIS_PERIS
UART Parity Error Raw Interrupt Status
8
9
UART_RIS_RIRIS
UART Ring Indicator Modem Raw Interrupt Status
0
1
UART_RIS_RTRIS
UART Receive Time-Out Raw Interrupt Status
6
7
UART_RIS_RXRIS
UART Receive Raw Interrupt Status
4
5
UART_RIS_TXRIS
UART Transmit Raw Interrupt Status
5
6
UART0RSR
UART Receive Status/Error Clear
0x4
read-write
n
0x0
0x0
UART_RSR_BE
UART Break Error
2
3
UART_RSR_FE
UART Framing Error
0
1
UART_RSR_OE
UART Overrun Error
3
4
UART_RSR_PE
UART Parity Error
1
2
_9BITADDR
UART 9-Bit Self Address
0xA4
-1
read-write
n
0x0
0x0
UART_9BITADDR_9BITEN
Enable 9-Bit Mode
15
16
UART_9BITADDR_ADDR
Self Address for 9-Bit Mode
0
8
_9BITAMASK
UART 9-Bit Self Address Mask
0xA8
-1
read-write
n
0x0
0x0
UART_9BITAMASK_MASK
Self Address Mask for 9-Bit Mode
0
8
UART4
Register map for UART0 peripheral
UART
0x0
0x0
0x1000
registers
n
UART4
60
9BITADDR
UART 9-Bit Self Address
0xA4
read-write
n
0x0
0x0
UART_9BITADDR_9BITEN
Enable 9-Bit Mode
15
16
UART_9BITADDR_ADDR
Self Address for 9-Bit Mode
0
8
9BITAMASK
UART 9-Bit Self Address Mask
0xA8
read-write
n
0x0
0x0
UART_9BITAMASK_MASK
Self Address Mask for 9-Bit Mode
0
8
CC
UART Clock Configuration
0xFC8
-1
read-write
n
0x0
0x0
UART_CC_CS
UART Baud Clock Source
0
4
UART_CC_CS_SYSCLK
System clock (based on clock source and divisor factor)
0x0
UART_CC_CS_PIOSC
PIOSC
0x5
CTL
UART Control
0x30
-1
read-write
n
0x0
0x0
UART_CTL_CTSEN
Enable Clear To Send
15
16
UART_CTL_DTR
Data Terminal Ready
10
11
UART_CTL_EOT
End of Transmission
4
5
UART_CTL_HSE
High-Speed Enable
5
6
UART_CTL_LBE
UART Loop Back Enable
7
8
UART_CTL_RTS
Request to Send
11
12
UART_CTL_RTSEN
Enable Request to Send
14
15
UART_CTL_RXE
UART Receive Enable
9
10
UART_CTL_SIREN
UART SIR Enable
1
2
UART_CTL_SIRLP
UART SIR Low-Power Mode
2
3
UART_CTL_SMART
ISO 7816 Smart Card Support
3
4
UART_CTL_TXE
UART Transmit Enable
8
9
UART_CTL_UARTEN
UART Enable
0
1
DMACTL
UART DMA Control
0x48
-1
read-write
n
0x0
0x0
UART_DMACTL_DMAERR
DMA on Error
2
3
UART_DMACTL_RXDMAE
Receive DMA Enable
0
1
UART_DMACTL_TXDMAE
Transmit DMA Enable
1
2
DR
UART Data
0x0
-1
read-write
n
0x0
0x0
UART_DR_BE
UART Break Error
10
11
UART_DR_DATA
Data Transmitted or Received
0
8
UART_DR_FE
UART Framing Error
8
9
UART_DR_OE
UART Overrun Error
11
12
UART_DR_PE
UART Parity Error
9
10
ECR
UART Receive Status/Error Clear
0x4
-1
read-write
n
0x0
0x0
UART_ECR_DATA
Error Clear
0
8
FBRD
UART Fractional Baud-Rate Divisor
0x28
-1
read-write
n
0x0
0x0
UART_FBRD_DIVFRAC
Fractional Baud-Rate Divisor
0
6
FR
UART Flag
0x18
-1
read-write
n
0x0
0x0
UART_FR_BUSY
UART Busy
3
4
UART_FR_CTS
Clear To Send
0
1
UART_FR_DCD
Data Carrier Detect
2
3
UART_FR_DSR
Data Set Ready
1
2
UART_FR_RI
Ring Indicator
8
9
UART_FR_RXFE
UART Receive FIFO Empty
4
5
UART_FR_RXFF
UART Receive FIFO Full
6
7
UART_FR_TXFE
UART Transmit FIFO Empty
7
8
UART_FR_TXFF
UART Transmit FIFO Full
5
6
IBRD
UART Integer Baud-Rate Divisor
0x24
-1
read-write
n
0x0
0x0
UART_IBRD_DIVINT
Integer Baud-Rate Divisor
0
16
ICR
UART Interrupt Clear
0x44
-1
write-only
n
0x0
0x0
UART_ICR_9BITIC
9-Bit Mode Interrupt Clear
12
13
write-only
UART_ICR_BEIC
Break Error Interrupt Clear
9
10
write-only
UART_ICR_CTSMIC
UART Clear to Send Modem Interrupt Clear
1
2
write-only
UART_ICR_DCDMIC
UART Data Carrier Detect Modem Interrupt Clear
2
3
write-only
UART_ICR_DSRMIC
UART Data Set Ready Modem Interrupt Clear
3
4
write-only
UART_ICR_FEIC
Framing Error Interrupt Clear
7
8
write-only
UART_ICR_OEIC
Overrun Error Interrupt Clear
10
11
write-only
UART_ICR_PEIC
Parity Error Interrupt Clear
8
9
write-only
UART_ICR_RIMIC
UART Ring Indicator Modem Interrupt Clear
0
1
write-only
UART_ICR_RTIC
Receive Time-Out Interrupt Clear
6
7
write-only
UART_ICR_RXIC
Receive Interrupt Clear
4
5
write-only
UART_ICR_TXIC
Transmit Interrupt Clear
5
6
write-only
IFLS
UART Interrupt FIFO Level Select
0x34
-1
read-write
n
0x0
0x0
UART_IFLS_RX
UART Receive Interrupt FIFO Level Select
3
6
UART_IFLS_RX1_8
RX FIFO >= 1/8 full
0x0
UART_IFLS_RX2_8
RX FIFO >= 1/4 full
0x1
UART_IFLS_RX4_8
RX FIFO >= 1/2 full (default)
0x2
UART_IFLS_RX6_8
RX FIFO >= 3/4 full
0x3
UART_IFLS_RX7_8
RX FIFO >= 7/8 full
0x4
UART_IFLS_TX
UART Transmit Interrupt FIFO Level Select
0
3
UART_IFLS_TX1_8
TX FIFO and lt = 1/8 full
0x0
UART_IFLS_TX2_8
TX FIFO and lt = 1/4 full
0x1
UART_IFLS_TX4_8
TX FIFO and lt = 1/2 full (default)
0x2
UART_IFLS_TX6_8
TX FIFO and lt = 3/4 full
0x3
UART_IFLS_TX7_8
TX FIFO and lt = 7/8 full
0x4
ILPR
UART IrDA Low-Power Register
0x20
-1
read-write
n
0x0
0x0
UART_ILPR_ILPDVSR
IrDA Low-Power Divisor
0
8
IM
UART Interrupt Mask
0x38
-1
read-write
n
0x0
0x0
UART_IM_9BITIM
9-Bit Mode Interrupt Mask
12
13
UART_IM_BEIM
UART Break Error Interrupt Mask
9
10
UART_IM_CTSMIM
UART Clear to Send Modem Interrupt Mask
1
2
UART_IM_DCDMIM
UART Data Carrier Detect Modem Interrupt Mask
2
3
UART_IM_DSRMIM
UART Data Set Ready Modem Interrupt Mask
3
4
UART_IM_FEIM
UART Framing Error Interrupt Mask
7
8
UART_IM_OEIM
UART Overrun Error Interrupt Mask
10
11
UART_IM_PEIM
UART Parity Error Interrupt Mask
8
9
UART_IM_RIMIM
UART Ring Indicator Modem Interrupt Mask
0
1
UART_IM_RTIM
UART Receive Time-Out Interrupt Mask
6
7
UART_IM_RXIM
UART Receive Interrupt Mask
4
5
UART_IM_TXIM
UART Transmit Interrupt Mask
5
6
LCRH
UART Line Control
0x2C
-1
read-write
n
0x0
0x0
UART_LCRH_BRK
UART Send Break
0
1
UART_LCRH_EPS
UART Even Parity Select
2
3
UART_LCRH_FEN
UART Enable FIFOs
4
5
UART_LCRH_PEN
UART Parity Enable
1
2
UART_LCRH_SPS
UART Stick Parity Select
7
8
UART_LCRH_STP2
UART Two Stop Bits Select
3
4
UART_LCRH_WLEN
UART Word Length
5
7
UART_LCRH_WLEN_5
5 bits (default)
0x0
UART_LCRH_WLEN_6
6 bits
0x1
UART_LCRH_WLEN_7
7 bits
0x2
UART_LCRH_WLEN_8
8 bits
0x3
MIS
UART Masked Interrupt Status
0x40
-1
read-write
n
0x0
0x0
UART_MIS_9BITMIS
9-Bit Mode Masked Interrupt Status
12
13
UART_MIS_BEMIS
UART Break Error Masked Interrupt Status
9
10
UART_MIS_CTSMIS
UART Clear to Send Modem Masked Interrupt Status
1
2
UART_MIS_DCDMIS
UART Data Carrier Detect Modem Masked Interrupt Status
2
3
UART_MIS_DSRMIS
UART Data Set Ready Modem Masked Interrupt Status
3
4
UART_MIS_FEMIS
UART Framing Error Masked Interrupt Status
7
8
UART_MIS_OEMIS
UART Overrun Error Masked Interrupt Status
10
11
UART_MIS_PEMIS
UART Parity Error Masked Interrupt Status
8
9
UART_MIS_RIMIS
UART Ring Indicator Modem Masked Interrupt Status
0
1
UART_MIS_RTMIS
UART Receive Time-Out Masked Interrupt Status
6
7
UART_MIS_RXMIS
UART Receive Masked Interrupt Status
4
5
UART_MIS_TXMIS
UART Transmit Masked Interrupt Status
5
6
PP
UART Peripheral Properties
0xFC0
-1
read-write
n
0x0
0x0
UART_PP_NB
9-Bit Support
1
2
UART_PP_SC
Smart Card Support
0
1
RIS
UART Raw Interrupt Status
0x3C
-1
read-write
n
0x0
0x0
UART_RIS_9BITRIS
9-Bit Mode Raw Interrupt Status
12
13
UART_RIS_BERIS
UART Break Error Raw Interrupt Status
9
10
UART_RIS_CTSRIS
UART Clear to Send Modem Raw Interrupt Status
1
2
UART_RIS_DCDRIS
UART Data Carrier Detect Modem Raw Interrupt Status
2
3
UART_RIS_DSRRIS
UART Data Set Ready Modem Raw Interrupt Status
3
4
UART_RIS_FERIS
UART Framing Error Raw Interrupt Status
7
8
UART_RIS_OERIS
UART Overrun Error Raw Interrupt Status
10
11
UART_RIS_PERIS
UART Parity Error Raw Interrupt Status
8
9
UART_RIS_RIRIS
UART Ring Indicator Modem Raw Interrupt Status
0
1
UART_RIS_RTRIS
UART Receive Time-Out Raw Interrupt Status
6
7
UART_RIS_RXRIS
UART Receive Raw Interrupt Status
4
5
UART_RIS_TXRIS
UART Transmit Raw Interrupt Status
5
6
RSR
UART Receive Status/Error Clear
0x4
-1
read-write
n
0x0
0x0
UART_RSR_BE
UART Break Error
2
3
UART_RSR_FE
UART Framing Error
0
1
UART_RSR_OE
UART Overrun Error
3
4
UART_RSR_PE
UART Parity Error
1
2
UART0CC
UART Clock Configuration
0xFC8
read-write
n
0x0
0x0
UART_CC_CS
UART Baud Clock Source
0
4
UART_CC_CS_SYSCLK
System clock (based on clock source and divisor factor)
0x0
UART_CC_CS_PIOSC
PIOSC
0x5
UART0CTL
UART Control
0x30
read-write
n
0x0
0x0
UART_CTL_CTSEN
Enable Clear To Send
15
16
UART_CTL_DTR
Data Terminal Ready
10
11
UART_CTL_EOT
End of Transmission
4
5
UART_CTL_HSE
High-Speed Enable
5
6
UART_CTL_LBE
UART Loop Back Enable
7
8
UART_CTL_RTS
Request to Send
11
12
UART_CTL_RTSEN
Enable Request to Send
14
15
UART_CTL_RXE
UART Receive Enable
9
10
UART_CTL_SIREN
UART SIR Enable
1
2
UART_CTL_SIRLP
UART SIR Low-Power Mode
2
3
UART_CTL_SMART
ISO 7816 Smart Card Support
3
4
UART_CTL_TXE
UART Transmit Enable
8
9
UART_CTL_UARTEN
UART Enable
0
1
UART0DMACTL
UART DMA Control
0x48
read-write
n
0x0
0x0
UART_DMACTL_DMAERR
DMA on Error
2
3
UART_DMACTL_RXDMAE
Receive DMA Enable
0
1
UART_DMACTL_TXDMAE
Transmit DMA Enable
1
2
UART0DR
UART Data
0x0
read-write
n
0x0
0x0
UART_DR_BE
UART Break Error
10
11
UART_DR_DATA
Data Transmitted or Received
0
8
UART_DR_FE
UART Framing Error
8
9
UART_DR_OE
UART Overrun Error
11
12
UART_DR_PE
UART Parity Error
9
10
UART0ECR
UART Receive Status/Error Clear
UART_ALT
0x4
read-write
n
0x0
0x0
UART_ECR_DATA
Error Clear
0
8
UART0FBRD
UART Fractional Baud-Rate Divisor
0x28
read-write
n
0x0
0x0
UART_FBRD_DIVFRAC
Fractional Baud-Rate Divisor
0
6
UART0FR
UART Flag
0x18
read-write
n
0x0
0x0
UART_FR_BUSY
UART Busy
3
4
UART_FR_CTS
Clear To Send
0
1
UART_FR_DCD
Data Carrier Detect
2
3
UART_FR_DSR
Data Set Ready
1
2
UART_FR_RI
Ring Indicator
8
9
UART_FR_RXFE
UART Receive FIFO Empty
4
5
UART_FR_RXFF
UART Receive FIFO Full
6
7
UART_FR_TXFE
UART Transmit FIFO Empty
7
8
UART_FR_TXFF
UART Transmit FIFO Full
5
6
UART0IBRD
UART Integer Baud-Rate Divisor
0x24
read-write
n
0x0
0x0
UART_IBRD_DIVINT
Integer Baud-Rate Divisor
0
16
UART0ICR
UART Interrupt Clear
0x44
write-only
n
0x0
0x0
UART_ICR_9BITIC
9-Bit Mode Interrupt Clear
12
13
write-only
UART_ICR_BEIC
Break Error Interrupt Clear
9
10
write-only
UART_ICR_CTSMIC
UART Clear to Send Modem Interrupt Clear
1
2
write-only
UART_ICR_DCDMIC
UART Data Carrier Detect Modem Interrupt Clear
2
3
write-only
UART_ICR_DSRMIC
UART Data Set Ready Modem Interrupt Clear
3
4
write-only
UART_ICR_FEIC
Framing Error Interrupt Clear
7
8
write-only
UART_ICR_OEIC
Overrun Error Interrupt Clear
10
11
write-only
UART_ICR_PEIC
Parity Error Interrupt Clear
8
9
write-only
UART_ICR_RIMIC
UART Ring Indicator Modem Interrupt Clear
0
1
write-only
UART_ICR_RTIC
Receive Time-Out Interrupt Clear
6
7
write-only
UART_ICR_RXIC
Receive Interrupt Clear
4
5
write-only
UART_ICR_TXIC
Transmit Interrupt Clear
5
6
write-only
UART0IFLS
UART Interrupt FIFO Level Select
0x34
read-write
n
0x0
0x0
UART_IFLS_RX
UART Receive Interrupt FIFO Level Select
3
6
UART_IFLS_RX1_8
RX FIFO >= 1/8 full
0x0
UART_IFLS_RX2_8
RX FIFO >= 1/4 full
0x1
UART_IFLS_RX4_8
RX FIFO >= 1/2 full (default)
0x2
UART_IFLS_RX6_8
RX FIFO >= 3/4 full
0x3
UART_IFLS_RX7_8
RX FIFO >= 7/8 full
0x4
UART_IFLS_TX
UART Transmit Interrupt FIFO Level Select
0
3
UART_IFLS_TX1_8
TX FIFO <= 1/8 full
0x0
UART_IFLS_TX2_8
TX FIFO <= 1/4 full
0x1
UART_IFLS_TX4_8
TX FIFO <= 1/2 full (default)
0x2
UART_IFLS_TX6_8
TX FIFO <= 3/4 full
0x3
UART_IFLS_TX7_8
TX FIFO <= 7/8 full
0x4
UART0ILPR
UART IrDA Low-Power Register
0x20
read-write
n
0x0
0x0
UART_ILPR_ILPDVSR
IrDA Low-Power Divisor
0
8
UART0IM
UART Interrupt Mask
0x38
read-write
n
0x0
0x0
UART_IM_9BITIM
9-Bit Mode Interrupt Mask
12
13
UART_IM_BEIM
UART Break Error Interrupt Mask
9
10
UART_IM_CTSMIM
UART Clear to Send Modem Interrupt Mask
1
2
UART_IM_DCDMIM
UART Data Carrier Detect Modem Interrupt Mask
2
3
UART_IM_DSRMIM
UART Data Set Ready Modem Interrupt Mask
3
4
UART_IM_FEIM
UART Framing Error Interrupt Mask
7
8
UART_IM_OEIM
UART Overrun Error Interrupt Mask
10
11
UART_IM_PEIM
UART Parity Error Interrupt Mask
8
9
UART_IM_RIMIM
UART Ring Indicator Modem Interrupt Mask
0
1
UART_IM_RTIM
UART Receive Time-Out Interrupt Mask
6
7
UART_IM_RXIM
UART Receive Interrupt Mask
4
5
UART_IM_TXIM
UART Transmit Interrupt Mask
5
6
UART0LCRH
UART Line Control
0x2C
read-write
n
0x0
0x0
UART_LCRH_BRK
UART Send Break
0
1
UART_LCRH_EPS
UART Even Parity Select
2
3
UART_LCRH_FEN
UART Enable FIFOs
4
5
UART_LCRH_PEN
UART Parity Enable
1
2
UART_LCRH_SPS
UART Stick Parity Select
7
8
UART_LCRH_STP2
UART Two Stop Bits Select
3
4
UART_LCRH_WLEN
UART Word Length
5
7
UART_LCRH_WLEN_5
5 bits (default)
0x0
UART_LCRH_WLEN_6
6 bits
0x1
UART_LCRH_WLEN_7
7 bits
0x2
UART_LCRH_WLEN_8
8 bits
0x3
UART0MIS
UART Masked Interrupt Status
0x40
read-write
n
0x0
0x0
UART_MIS_9BITMIS
9-Bit Mode Masked Interrupt Status
12
13
UART_MIS_BEMIS
UART Break Error Masked Interrupt Status
9
10
UART_MIS_CTSMIS
UART Clear to Send Modem Masked Interrupt Status
1
2
UART_MIS_DCDMIS
UART Data Carrier Detect Modem Masked Interrupt Status
2
3
UART_MIS_DSRMIS
UART Data Set Ready Modem Masked Interrupt Status
3
4
UART_MIS_FEMIS
UART Framing Error Masked Interrupt Status
7
8
UART_MIS_OEMIS
UART Overrun Error Masked Interrupt Status
10
11
UART_MIS_PEMIS
UART Parity Error Masked Interrupt Status
8
9
UART_MIS_RIMIS
UART Ring Indicator Modem Masked Interrupt Status
0
1
UART_MIS_RTMIS
UART Receive Time-Out Masked Interrupt Status
6
7
UART_MIS_RXMIS
UART Receive Masked Interrupt Status
4
5
UART_MIS_TXMIS
UART Transmit Masked Interrupt Status
5
6
UART0PP
UART Peripheral Properties
0xFC0
read-write
n
0x0
0x0
UART_PP_NB
9-Bit Support
1
2
UART_PP_SC
Smart Card Support
0
1
UART0RIS
UART Raw Interrupt Status
0x3C
read-write
n
0x0
0x0
UART_RIS_9BITRIS
9-Bit Mode Raw Interrupt Status
12
13
UART_RIS_BERIS
UART Break Error Raw Interrupt Status
9
10
UART_RIS_CTSRIS
UART Clear to Send Modem Raw Interrupt Status
1
2
UART_RIS_DCDRIS
UART Data Carrier Detect Modem Raw Interrupt Status
2
3
UART_RIS_DSRRIS
UART Data Set Ready Modem Raw Interrupt Status
3
4
UART_RIS_FERIS
UART Framing Error Raw Interrupt Status
7
8
UART_RIS_OERIS
UART Overrun Error Raw Interrupt Status
10
11
UART_RIS_PERIS
UART Parity Error Raw Interrupt Status
8
9
UART_RIS_RIRIS
UART Ring Indicator Modem Raw Interrupt Status
0
1
UART_RIS_RTRIS
UART Receive Time-Out Raw Interrupt Status
6
7
UART_RIS_RXRIS
UART Receive Raw Interrupt Status
4
5
UART_RIS_TXRIS
UART Transmit Raw Interrupt Status
5
6
UART0RSR
UART Receive Status/Error Clear
0x4
read-write
n
0x0
0x0
UART_RSR_BE
UART Break Error
2
3
UART_RSR_FE
UART Framing Error
0
1
UART_RSR_OE
UART Overrun Error
3
4
UART_RSR_PE
UART Parity Error
1
2
_9BITADDR
UART 9-Bit Self Address
0xA4
-1
read-write
n
0x0
0x0
UART_9BITADDR_9BITEN
Enable 9-Bit Mode
15
16
UART_9BITADDR_ADDR
Self Address for 9-Bit Mode
0
8
_9BITAMASK
UART 9-Bit Self Address Mask
0xA8
-1
read-write
n
0x0
0x0
UART_9BITAMASK_MASK
Self Address Mask for 9-Bit Mode
0
8
UART5
Register map for UART0 peripheral
UART
0x0
0x0
0x1000
registers
n
UART5
61
9BITADDR
UART 9-Bit Self Address
0xA4
read-write
n
0x0
0x0
UART_9BITADDR_9BITEN
Enable 9-Bit Mode
15
16
UART_9BITADDR_ADDR
Self Address for 9-Bit Mode
0
8
9BITAMASK
UART 9-Bit Self Address Mask
0xA8
read-write
n
0x0
0x0
UART_9BITAMASK_MASK
Self Address Mask for 9-Bit Mode
0
8
CC
UART Clock Configuration
0xFC8
-1
read-write
n
0x0
0x0
UART_CC_CS
UART Baud Clock Source
0
4
UART_CC_CS_SYSCLK
System clock (based on clock source and divisor factor)
0x0
UART_CC_CS_PIOSC
PIOSC
0x5
CTL
UART Control
0x30
-1
read-write
n
0x0
0x0
UART_CTL_CTSEN
Enable Clear To Send
15
16
UART_CTL_DTR
Data Terminal Ready
10
11
UART_CTL_EOT
End of Transmission
4
5
UART_CTL_HSE
High-Speed Enable
5
6
UART_CTL_LBE
UART Loop Back Enable
7
8
UART_CTL_RTS
Request to Send
11
12
UART_CTL_RTSEN
Enable Request to Send
14
15
UART_CTL_RXE
UART Receive Enable
9
10
UART_CTL_SIREN
UART SIR Enable
1
2
UART_CTL_SIRLP
UART SIR Low-Power Mode
2
3
UART_CTL_SMART
ISO 7816 Smart Card Support
3
4
UART_CTL_TXE
UART Transmit Enable
8
9
UART_CTL_UARTEN
UART Enable
0
1
DMACTL
UART DMA Control
0x48
-1
read-write
n
0x0
0x0
UART_DMACTL_DMAERR
DMA on Error
2
3
UART_DMACTL_RXDMAE
Receive DMA Enable
0
1
UART_DMACTL_TXDMAE
Transmit DMA Enable
1
2
DR
UART Data
0x0
-1
read-write
n
0x0
0x0
UART_DR_BE
UART Break Error
10
11
UART_DR_DATA
Data Transmitted or Received
0
8
UART_DR_FE
UART Framing Error
8
9
UART_DR_OE
UART Overrun Error
11
12
UART_DR_PE
UART Parity Error
9
10
ECR
UART Receive Status/Error Clear
0x4
-1
read-write
n
0x0
0x0
UART_ECR_DATA
Error Clear
0
8
FBRD
UART Fractional Baud-Rate Divisor
0x28
-1
read-write
n
0x0
0x0
UART_FBRD_DIVFRAC
Fractional Baud-Rate Divisor
0
6
FR
UART Flag
0x18
-1
read-write
n
0x0
0x0
UART_FR_BUSY
UART Busy
3
4
UART_FR_CTS
Clear To Send
0
1
UART_FR_DCD
Data Carrier Detect
2
3
UART_FR_DSR
Data Set Ready
1
2
UART_FR_RI
Ring Indicator
8
9
UART_FR_RXFE
UART Receive FIFO Empty
4
5
UART_FR_RXFF
UART Receive FIFO Full
6
7
UART_FR_TXFE
UART Transmit FIFO Empty
7
8
UART_FR_TXFF
UART Transmit FIFO Full
5
6
IBRD
UART Integer Baud-Rate Divisor
0x24
-1
read-write
n
0x0
0x0
UART_IBRD_DIVINT
Integer Baud-Rate Divisor
0
16
ICR
UART Interrupt Clear
0x44
-1
write-only
n
0x0
0x0
UART_ICR_9BITIC
9-Bit Mode Interrupt Clear
12
13
write-only
UART_ICR_BEIC
Break Error Interrupt Clear
9
10
write-only
UART_ICR_CTSMIC
UART Clear to Send Modem Interrupt Clear
1
2
write-only
UART_ICR_DCDMIC
UART Data Carrier Detect Modem Interrupt Clear
2
3
write-only
UART_ICR_DSRMIC
UART Data Set Ready Modem Interrupt Clear
3
4
write-only
UART_ICR_FEIC
Framing Error Interrupt Clear
7
8
write-only
UART_ICR_OEIC
Overrun Error Interrupt Clear
10
11
write-only
UART_ICR_PEIC
Parity Error Interrupt Clear
8
9
write-only
UART_ICR_RIMIC
UART Ring Indicator Modem Interrupt Clear
0
1
write-only
UART_ICR_RTIC
Receive Time-Out Interrupt Clear
6
7
write-only
UART_ICR_RXIC
Receive Interrupt Clear
4
5
write-only
UART_ICR_TXIC
Transmit Interrupt Clear
5
6
write-only
IFLS
UART Interrupt FIFO Level Select
0x34
-1
read-write
n
0x0
0x0
UART_IFLS_RX
UART Receive Interrupt FIFO Level Select
3
6
UART_IFLS_RX1_8
RX FIFO >= 1/8 full
0x0
UART_IFLS_RX2_8
RX FIFO >= 1/4 full
0x1
UART_IFLS_RX4_8
RX FIFO >= 1/2 full (default)
0x2
UART_IFLS_RX6_8
RX FIFO >= 3/4 full
0x3
UART_IFLS_RX7_8
RX FIFO >= 7/8 full
0x4
UART_IFLS_TX
UART Transmit Interrupt FIFO Level Select
0
3
UART_IFLS_TX1_8
TX FIFO and lt = 1/8 full
0x0
UART_IFLS_TX2_8
TX FIFO and lt = 1/4 full
0x1
UART_IFLS_TX4_8
TX FIFO and lt = 1/2 full (default)
0x2
UART_IFLS_TX6_8
TX FIFO and lt = 3/4 full
0x3
UART_IFLS_TX7_8
TX FIFO and lt = 7/8 full
0x4
ILPR
UART IrDA Low-Power Register
0x20
-1
read-write
n
0x0
0x0
UART_ILPR_ILPDVSR
IrDA Low-Power Divisor
0
8
IM
UART Interrupt Mask
0x38
-1
read-write
n
0x0
0x0
UART_IM_9BITIM
9-Bit Mode Interrupt Mask
12
13
UART_IM_BEIM
UART Break Error Interrupt Mask
9
10
UART_IM_CTSMIM
UART Clear to Send Modem Interrupt Mask
1
2
UART_IM_DCDMIM
UART Data Carrier Detect Modem Interrupt Mask
2
3
UART_IM_DSRMIM
UART Data Set Ready Modem Interrupt Mask
3
4
UART_IM_FEIM
UART Framing Error Interrupt Mask
7
8
UART_IM_OEIM
UART Overrun Error Interrupt Mask
10
11
UART_IM_PEIM
UART Parity Error Interrupt Mask
8
9
UART_IM_RIMIM
UART Ring Indicator Modem Interrupt Mask
0
1
UART_IM_RTIM
UART Receive Time-Out Interrupt Mask
6
7
UART_IM_RXIM
UART Receive Interrupt Mask
4
5
UART_IM_TXIM
UART Transmit Interrupt Mask
5
6
LCRH
UART Line Control
0x2C
-1
read-write
n
0x0
0x0
UART_LCRH_BRK
UART Send Break
0
1
UART_LCRH_EPS
UART Even Parity Select
2
3
UART_LCRH_FEN
UART Enable FIFOs
4
5
UART_LCRH_PEN
UART Parity Enable
1
2
UART_LCRH_SPS
UART Stick Parity Select
7
8
UART_LCRH_STP2
UART Two Stop Bits Select
3
4
UART_LCRH_WLEN
UART Word Length
5
7
UART_LCRH_WLEN_5
5 bits (default)
0x0
UART_LCRH_WLEN_6
6 bits
0x1
UART_LCRH_WLEN_7
7 bits
0x2
UART_LCRH_WLEN_8
8 bits
0x3
MIS
UART Masked Interrupt Status
0x40
-1
read-write
n
0x0
0x0
UART_MIS_9BITMIS
9-Bit Mode Masked Interrupt Status
12
13
UART_MIS_BEMIS
UART Break Error Masked Interrupt Status
9
10
UART_MIS_CTSMIS
UART Clear to Send Modem Masked Interrupt Status
1
2
UART_MIS_DCDMIS
UART Data Carrier Detect Modem Masked Interrupt Status
2
3
UART_MIS_DSRMIS
UART Data Set Ready Modem Masked Interrupt Status
3
4
UART_MIS_FEMIS
UART Framing Error Masked Interrupt Status
7
8
UART_MIS_OEMIS
UART Overrun Error Masked Interrupt Status
10
11
UART_MIS_PEMIS
UART Parity Error Masked Interrupt Status
8
9
UART_MIS_RIMIS
UART Ring Indicator Modem Masked Interrupt Status
0
1
UART_MIS_RTMIS
UART Receive Time-Out Masked Interrupt Status
6
7
UART_MIS_RXMIS
UART Receive Masked Interrupt Status
4
5
UART_MIS_TXMIS
UART Transmit Masked Interrupt Status
5
6
PP
UART Peripheral Properties
0xFC0
-1
read-write
n
0x0
0x0
UART_PP_NB
9-Bit Support
1
2
UART_PP_SC
Smart Card Support
0
1
RIS
UART Raw Interrupt Status
0x3C
-1
read-write
n
0x0
0x0
UART_RIS_9BITRIS
9-Bit Mode Raw Interrupt Status
12
13
UART_RIS_BERIS
UART Break Error Raw Interrupt Status
9
10
UART_RIS_CTSRIS
UART Clear to Send Modem Raw Interrupt Status
1
2
UART_RIS_DCDRIS
UART Data Carrier Detect Modem Raw Interrupt Status
2
3
UART_RIS_DSRRIS
UART Data Set Ready Modem Raw Interrupt Status
3
4
UART_RIS_FERIS
UART Framing Error Raw Interrupt Status
7
8
UART_RIS_OERIS
UART Overrun Error Raw Interrupt Status
10
11
UART_RIS_PERIS
UART Parity Error Raw Interrupt Status
8
9
UART_RIS_RIRIS
UART Ring Indicator Modem Raw Interrupt Status
0
1
UART_RIS_RTRIS
UART Receive Time-Out Raw Interrupt Status
6
7
UART_RIS_RXRIS
UART Receive Raw Interrupt Status
4
5
UART_RIS_TXRIS
UART Transmit Raw Interrupt Status
5
6
RSR
UART Receive Status/Error Clear
0x4
-1
read-write
n
0x0
0x0
UART_RSR_BE
UART Break Error
2
3
UART_RSR_FE
UART Framing Error
0
1
UART_RSR_OE
UART Overrun Error
3
4
UART_RSR_PE
UART Parity Error
1
2
UART0CC
UART Clock Configuration
0xFC8
read-write
n
0x0
0x0
UART_CC_CS
UART Baud Clock Source
0
4
UART_CC_CS_SYSCLK
System clock (based on clock source and divisor factor)
0x0
UART_CC_CS_PIOSC
PIOSC
0x5
UART0CTL
UART Control
0x30
read-write
n
0x0
0x0
UART_CTL_CTSEN
Enable Clear To Send
15
16
UART_CTL_DTR
Data Terminal Ready
10
11
UART_CTL_EOT
End of Transmission
4
5
UART_CTL_HSE
High-Speed Enable
5
6
UART_CTL_LBE
UART Loop Back Enable
7
8
UART_CTL_RTS
Request to Send
11
12
UART_CTL_RTSEN
Enable Request to Send
14
15
UART_CTL_RXE
UART Receive Enable
9
10
UART_CTL_SIREN
UART SIR Enable
1
2
UART_CTL_SIRLP
UART SIR Low-Power Mode
2
3
UART_CTL_SMART
ISO 7816 Smart Card Support
3
4
UART_CTL_TXE
UART Transmit Enable
8
9
UART_CTL_UARTEN
UART Enable
0
1
UART0DMACTL
UART DMA Control
0x48
read-write
n
0x0
0x0
UART_DMACTL_DMAERR
DMA on Error
2
3
UART_DMACTL_RXDMAE
Receive DMA Enable
0
1
UART_DMACTL_TXDMAE
Transmit DMA Enable
1
2
UART0DR
UART Data
0x0
read-write
n
0x0
0x0
UART_DR_BE
UART Break Error
10
11
UART_DR_DATA
Data Transmitted or Received
0
8
UART_DR_FE
UART Framing Error
8
9
UART_DR_OE
UART Overrun Error
11
12
UART_DR_PE
UART Parity Error
9
10
UART0ECR
UART Receive Status/Error Clear
UART_ALT
0x4
read-write
n
0x0
0x0
UART_ECR_DATA
Error Clear
0
8
UART0FBRD
UART Fractional Baud-Rate Divisor
0x28
read-write
n
0x0
0x0
UART_FBRD_DIVFRAC
Fractional Baud-Rate Divisor
0
6
UART0FR
UART Flag
0x18
read-write
n
0x0
0x0
UART_FR_BUSY
UART Busy
3
4
UART_FR_CTS
Clear To Send
0
1
UART_FR_DCD
Data Carrier Detect
2
3
UART_FR_DSR
Data Set Ready
1
2
UART_FR_RI
Ring Indicator
8
9
UART_FR_RXFE
UART Receive FIFO Empty
4
5
UART_FR_RXFF
UART Receive FIFO Full
6
7
UART_FR_TXFE
UART Transmit FIFO Empty
7
8
UART_FR_TXFF
UART Transmit FIFO Full
5
6
UART0IBRD
UART Integer Baud-Rate Divisor
0x24
read-write
n
0x0
0x0
UART_IBRD_DIVINT
Integer Baud-Rate Divisor
0
16
UART0ICR
UART Interrupt Clear
0x44
write-only
n
0x0
0x0
UART_ICR_9BITIC
9-Bit Mode Interrupt Clear
12
13
write-only
UART_ICR_BEIC
Break Error Interrupt Clear
9
10
write-only
UART_ICR_CTSMIC
UART Clear to Send Modem Interrupt Clear
1
2
write-only
UART_ICR_DCDMIC
UART Data Carrier Detect Modem Interrupt Clear
2
3
write-only
UART_ICR_DSRMIC
UART Data Set Ready Modem Interrupt Clear
3
4
write-only
UART_ICR_FEIC
Framing Error Interrupt Clear
7
8
write-only
UART_ICR_OEIC
Overrun Error Interrupt Clear
10
11
write-only
UART_ICR_PEIC
Parity Error Interrupt Clear
8
9
write-only
UART_ICR_RIMIC
UART Ring Indicator Modem Interrupt Clear
0
1
write-only
UART_ICR_RTIC
Receive Time-Out Interrupt Clear
6
7
write-only
UART_ICR_RXIC
Receive Interrupt Clear
4
5
write-only
UART_ICR_TXIC
Transmit Interrupt Clear
5
6
write-only
UART0IFLS
UART Interrupt FIFO Level Select
0x34
read-write
n
0x0
0x0
UART_IFLS_RX
UART Receive Interrupt FIFO Level Select
3
6
UART_IFLS_RX1_8
RX FIFO >= 1/8 full
0x0
UART_IFLS_RX2_8
RX FIFO >= 1/4 full
0x1
UART_IFLS_RX4_8
RX FIFO >= 1/2 full (default)
0x2
UART_IFLS_RX6_8
RX FIFO >= 3/4 full
0x3
UART_IFLS_RX7_8
RX FIFO >= 7/8 full
0x4
UART_IFLS_TX
UART Transmit Interrupt FIFO Level Select
0
3
UART_IFLS_TX1_8
TX FIFO <= 1/8 full
0x0
UART_IFLS_TX2_8
TX FIFO <= 1/4 full
0x1
UART_IFLS_TX4_8
TX FIFO <= 1/2 full (default)
0x2
UART_IFLS_TX6_8
TX FIFO <= 3/4 full
0x3
UART_IFLS_TX7_8
TX FIFO <= 7/8 full
0x4
UART0ILPR
UART IrDA Low-Power Register
0x20
read-write
n
0x0
0x0
UART_ILPR_ILPDVSR
IrDA Low-Power Divisor
0
8
UART0IM
UART Interrupt Mask
0x38
read-write
n
0x0
0x0
UART_IM_9BITIM
9-Bit Mode Interrupt Mask
12
13
UART_IM_BEIM
UART Break Error Interrupt Mask
9
10
UART_IM_CTSMIM
UART Clear to Send Modem Interrupt Mask
1
2
UART_IM_DCDMIM
UART Data Carrier Detect Modem Interrupt Mask
2
3
UART_IM_DSRMIM
UART Data Set Ready Modem Interrupt Mask
3
4
UART_IM_FEIM
UART Framing Error Interrupt Mask
7
8
UART_IM_OEIM
UART Overrun Error Interrupt Mask
10
11
UART_IM_PEIM
UART Parity Error Interrupt Mask
8
9
UART_IM_RIMIM
UART Ring Indicator Modem Interrupt Mask
0
1
UART_IM_RTIM
UART Receive Time-Out Interrupt Mask
6
7
UART_IM_RXIM
UART Receive Interrupt Mask
4
5
UART_IM_TXIM
UART Transmit Interrupt Mask
5
6
UART0LCRH
UART Line Control
0x2C
read-write
n
0x0
0x0
UART_LCRH_BRK
UART Send Break
0
1
UART_LCRH_EPS
UART Even Parity Select
2
3
UART_LCRH_FEN
UART Enable FIFOs
4
5
UART_LCRH_PEN
UART Parity Enable
1
2
UART_LCRH_SPS
UART Stick Parity Select
7
8
UART_LCRH_STP2
UART Two Stop Bits Select
3
4
UART_LCRH_WLEN
UART Word Length
5
7
UART_LCRH_WLEN_5
5 bits (default)
0x0
UART_LCRH_WLEN_6
6 bits
0x1
UART_LCRH_WLEN_7
7 bits
0x2
UART_LCRH_WLEN_8
8 bits
0x3
UART0MIS
UART Masked Interrupt Status
0x40
read-write
n
0x0
0x0
UART_MIS_9BITMIS
9-Bit Mode Masked Interrupt Status
12
13
UART_MIS_BEMIS
UART Break Error Masked Interrupt Status
9
10
UART_MIS_CTSMIS
UART Clear to Send Modem Masked Interrupt Status
1
2
UART_MIS_DCDMIS
UART Data Carrier Detect Modem Masked Interrupt Status
2
3
UART_MIS_DSRMIS
UART Data Set Ready Modem Masked Interrupt Status
3
4
UART_MIS_FEMIS
UART Framing Error Masked Interrupt Status
7
8
UART_MIS_OEMIS
UART Overrun Error Masked Interrupt Status
10
11
UART_MIS_PEMIS
UART Parity Error Masked Interrupt Status
8
9
UART_MIS_RIMIS
UART Ring Indicator Modem Masked Interrupt Status
0
1
UART_MIS_RTMIS
UART Receive Time-Out Masked Interrupt Status
6
7
UART_MIS_RXMIS
UART Receive Masked Interrupt Status
4
5
UART_MIS_TXMIS
UART Transmit Masked Interrupt Status
5
6
UART0PP
UART Peripheral Properties
0xFC0
read-write
n
0x0
0x0
UART_PP_NB
9-Bit Support
1
2
UART_PP_SC
Smart Card Support
0
1
UART0RIS
UART Raw Interrupt Status
0x3C
read-write
n
0x0
0x0
UART_RIS_9BITRIS
9-Bit Mode Raw Interrupt Status
12
13
UART_RIS_BERIS
UART Break Error Raw Interrupt Status
9
10
UART_RIS_CTSRIS
UART Clear to Send Modem Raw Interrupt Status
1
2
UART_RIS_DCDRIS
UART Data Carrier Detect Modem Raw Interrupt Status
2
3
UART_RIS_DSRRIS
UART Data Set Ready Modem Raw Interrupt Status
3
4
UART_RIS_FERIS
UART Framing Error Raw Interrupt Status
7
8
UART_RIS_OERIS
UART Overrun Error Raw Interrupt Status
10
11
UART_RIS_PERIS
UART Parity Error Raw Interrupt Status
8
9
UART_RIS_RIRIS
UART Ring Indicator Modem Raw Interrupt Status
0
1
UART_RIS_RTRIS
UART Receive Time-Out Raw Interrupt Status
6
7
UART_RIS_RXRIS
UART Receive Raw Interrupt Status
4
5
UART_RIS_TXRIS
UART Transmit Raw Interrupt Status
5
6
UART0RSR
UART Receive Status/Error Clear
0x4
read-write
n
0x0
0x0
UART_RSR_BE
UART Break Error
2
3
UART_RSR_FE
UART Framing Error
0
1
UART_RSR_OE
UART Overrun Error
3
4
UART_RSR_PE
UART Parity Error
1
2
_9BITADDR
UART 9-Bit Self Address
0xA4
-1
read-write
n
0x0
0x0
UART_9BITADDR_9BITEN
Enable 9-Bit Mode
15
16
UART_9BITADDR_ADDR
Self Address for 9-Bit Mode
0
8
_9BITAMASK
UART 9-Bit Self Address Mask
0xA8
-1
read-write
n
0x0
0x0
UART_9BITAMASK_MASK
Self Address Mask for 9-Bit Mode
0
8
UART6
Register map for UART0 peripheral
UART
0x0
0x0
0x1000
registers
n
UART6
62
9BITADDR
UART 9-Bit Self Address
0xA4
read-write
n
0x0
0x0
UART_9BITADDR_9BITEN
Enable 9-Bit Mode
15
16
UART_9BITADDR_ADDR
Self Address for 9-Bit Mode
0
8
9BITAMASK
UART 9-Bit Self Address Mask
0xA8
read-write
n
0x0
0x0
UART_9BITAMASK_MASK
Self Address Mask for 9-Bit Mode
0
8
CC
UART Clock Configuration
0xFC8
-1
read-write
n
0x0
0x0
UART_CC_CS
UART Baud Clock Source
0
4
UART_CC_CS_SYSCLK
System clock (based on clock source and divisor factor)
0x0
UART_CC_CS_PIOSC
PIOSC
0x5
CTL
UART Control
0x30
-1
read-write
n
0x0
0x0
UART_CTL_CTSEN
Enable Clear To Send
15
16
UART_CTL_DTR
Data Terminal Ready
10
11
UART_CTL_EOT
End of Transmission
4
5
UART_CTL_HSE
High-Speed Enable
5
6
UART_CTL_LBE
UART Loop Back Enable
7
8
UART_CTL_RTS
Request to Send
11
12
UART_CTL_RTSEN
Enable Request to Send
14
15
UART_CTL_RXE
UART Receive Enable
9
10
UART_CTL_SIREN
UART SIR Enable
1
2
UART_CTL_SIRLP
UART SIR Low-Power Mode
2
3
UART_CTL_SMART
ISO 7816 Smart Card Support
3
4
UART_CTL_TXE
UART Transmit Enable
8
9
UART_CTL_UARTEN
UART Enable
0
1
DMACTL
UART DMA Control
0x48
-1
read-write
n
0x0
0x0
UART_DMACTL_DMAERR
DMA on Error
2
3
UART_DMACTL_RXDMAE
Receive DMA Enable
0
1
UART_DMACTL_TXDMAE
Transmit DMA Enable
1
2
DR
UART Data
0x0
-1
read-write
n
0x0
0x0
UART_DR_BE
UART Break Error
10
11
UART_DR_DATA
Data Transmitted or Received
0
8
UART_DR_FE
UART Framing Error
8
9
UART_DR_OE
UART Overrun Error
11
12
UART_DR_PE
UART Parity Error
9
10
ECR
UART Receive Status/Error Clear
0x4
-1
read-write
n
0x0
0x0
UART_ECR_DATA
Error Clear
0
8
FBRD
UART Fractional Baud-Rate Divisor
0x28
-1
read-write
n
0x0
0x0
UART_FBRD_DIVFRAC
Fractional Baud-Rate Divisor
0
6
FR
UART Flag
0x18
-1
read-write
n
0x0
0x0
UART_FR_BUSY
UART Busy
3
4
UART_FR_CTS
Clear To Send
0
1
UART_FR_DCD
Data Carrier Detect
2
3
UART_FR_DSR
Data Set Ready
1
2
UART_FR_RI
Ring Indicator
8
9
UART_FR_RXFE
UART Receive FIFO Empty
4
5
UART_FR_RXFF
UART Receive FIFO Full
6
7
UART_FR_TXFE
UART Transmit FIFO Empty
7
8
UART_FR_TXFF
UART Transmit FIFO Full
5
6
IBRD
UART Integer Baud-Rate Divisor
0x24
-1
read-write
n
0x0
0x0
UART_IBRD_DIVINT
Integer Baud-Rate Divisor
0
16
ICR
UART Interrupt Clear
0x44
-1
write-only
n
0x0
0x0
UART_ICR_9BITIC
9-Bit Mode Interrupt Clear
12
13
write-only
UART_ICR_BEIC
Break Error Interrupt Clear
9
10
write-only
UART_ICR_CTSMIC
UART Clear to Send Modem Interrupt Clear
1
2
write-only
UART_ICR_DCDMIC
UART Data Carrier Detect Modem Interrupt Clear
2
3
write-only
UART_ICR_DSRMIC
UART Data Set Ready Modem Interrupt Clear
3
4
write-only
UART_ICR_FEIC
Framing Error Interrupt Clear
7
8
write-only
UART_ICR_OEIC
Overrun Error Interrupt Clear
10
11
write-only
UART_ICR_PEIC
Parity Error Interrupt Clear
8
9
write-only
UART_ICR_RIMIC
UART Ring Indicator Modem Interrupt Clear
0
1
write-only
UART_ICR_RTIC
Receive Time-Out Interrupt Clear
6
7
write-only
UART_ICR_RXIC
Receive Interrupt Clear
4
5
write-only
UART_ICR_TXIC
Transmit Interrupt Clear
5
6
write-only
IFLS
UART Interrupt FIFO Level Select
0x34
-1
read-write
n
0x0
0x0
UART_IFLS_RX
UART Receive Interrupt FIFO Level Select
3
6
UART_IFLS_RX1_8
RX FIFO >= 1/8 full
0x0
UART_IFLS_RX2_8
RX FIFO >= 1/4 full
0x1
UART_IFLS_RX4_8
RX FIFO >= 1/2 full (default)
0x2
UART_IFLS_RX6_8
RX FIFO >= 3/4 full
0x3
UART_IFLS_RX7_8
RX FIFO >= 7/8 full
0x4
UART_IFLS_TX
UART Transmit Interrupt FIFO Level Select
0
3
UART_IFLS_TX1_8
TX FIFO and lt = 1/8 full
0x0
UART_IFLS_TX2_8
TX FIFO and lt = 1/4 full
0x1
UART_IFLS_TX4_8
TX FIFO and lt = 1/2 full (default)
0x2
UART_IFLS_TX6_8
TX FIFO and lt = 3/4 full
0x3
UART_IFLS_TX7_8
TX FIFO and lt = 7/8 full
0x4
ILPR
UART IrDA Low-Power Register
0x20
-1
read-write
n
0x0
0x0
UART_ILPR_ILPDVSR
IrDA Low-Power Divisor
0
8
IM
UART Interrupt Mask
0x38
-1
read-write
n
0x0
0x0
UART_IM_9BITIM
9-Bit Mode Interrupt Mask
12
13
UART_IM_BEIM
UART Break Error Interrupt Mask
9
10
UART_IM_CTSMIM
UART Clear to Send Modem Interrupt Mask
1
2
UART_IM_DCDMIM
UART Data Carrier Detect Modem Interrupt Mask
2
3
UART_IM_DSRMIM
UART Data Set Ready Modem Interrupt Mask
3
4
UART_IM_FEIM
UART Framing Error Interrupt Mask
7
8
UART_IM_OEIM
UART Overrun Error Interrupt Mask
10
11
UART_IM_PEIM
UART Parity Error Interrupt Mask
8
9
UART_IM_RIMIM
UART Ring Indicator Modem Interrupt Mask
0
1
UART_IM_RTIM
UART Receive Time-Out Interrupt Mask
6
7
UART_IM_RXIM
UART Receive Interrupt Mask
4
5
UART_IM_TXIM
UART Transmit Interrupt Mask
5
6
LCRH
UART Line Control
0x2C
-1
read-write
n
0x0
0x0
UART_LCRH_BRK
UART Send Break
0
1
UART_LCRH_EPS
UART Even Parity Select
2
3
UART_LCRH_FEN
UART Enable FIFOs
4
5
UART_LCRH_PEN
UART Parity Enable
1
2
UART_LCRH_SPS
UART Stick Parity Select
7
8
UART_LCRH_STP2
UART Two Stop Bits Select
3
4
UART_LCRH_WLEN
UART Word Length
5
7
UART_LCRH_WLEN_5
5 bits (default)
0x0
UART_LCRH_WLEN_6
6 bits
0x1
UART_LCRH_WLEN_7
7 bits
0x2
UART_LCRH_WLEN_8
8 bits
0x3
MIS
UART Masked Interrupt Status
0x40
-1
read-write
n
0x0
0x0
UART_MIS_9BITMIS
9-Bit Mode Masked Interrupt Status
12
13
UART_MIS_BEMIS
UART Break Error Masked Interrupt Status
9
10
UART_MIS_CTSMIS
UART Clear to Send Modem Masked Interrupt Status
1
2
UART_MIS_DCDMIS
UART Data Carrier Detect Modem Masked Interrupt Status
2
3
UART_MIS_DSRMIS
UART Data Set Ready Modem Masked Interrupt Status
3
4
UART_MIS_FEMIS
UART Framing Error Masked Interrupt Status
7
8
UART_MIS_OEMIS
UART Overrun Error Masked Interrupt Status
10
11
UART_MIS_PEMIS
UART Parity Error Masked Interrupt Status
8
9
UART_MIS_RIMIS
UART Ring Indicator Modem Masked Interrupt Status
0
1
UART_MIS_RTMIS
UART Receive Time-Out Masked Interrupt Status
6
7
UART_MIS_RXMIS
UART Receive Masked Interrupt Status
4
5
UART_MIS_TXMIS
UART Transmit Masked Interrupt Status
5
6
PP
UART Peripheral Properties
0xFC0
-1
read-write
n
0x0
0x0
UART_PP_NB
9-Bit Support
1
2
UART_PP_SC
Smart Card Support
0
1
RIS
UART Raw Interrupt Status
0x3C
-1
read-write
n
0x0
0x0
UART_RIS_9BITRIS
9-Bit Mode Raw Interrupt Status
12
13
UART_RIS_BERIS
UART Break Error Raw Interrupt Status
9
10
UART_RIS_CTSRIS
UART Clear to Send Modem Raw Interrupt Status
1
2
UART_RIS_DCDRIS
UART Data Carrier Detect Modem Raw Interrupt Status
2
3
UART_RIS_DSRRIS
UART Data Set Ready Modem Raw Interrupt Status
3
4
UART_RIS_FERIS
UART Framing Error Raw Interrupt Status
7
8
UART_RIS_OERIS
UART Overrun Error Raw Interrupt Status
10
11
UART_RIS_PERIS
UART Parity Error Raw Interrupt Status
8
9
UART_RIS_RIRIS
UART Ring Indicator Modem Raw Interrupt Status
0
1
UART_RIS_RTRIS
UART Receive Time-Out Raw Interrupt Status
6
7
UART_RIS_RXRIS
UART Receive Raw Interrupt Status
4
5
UART_RIS_TXRIS
UART Transmit Raw Interrupt Status
5
6
RSR
UART Receive Status/Error Clear
0x4
-1
read-write
n
0x0
0x0
UART_RSR_BE
UART Break Error
2
3
UART_RSR_FE
UART Framing Error
0
1
UART_RSR_OE
UART Overrun Error
3
4
UART_RSR_PE
UART Parity Error
1
2
UART0CC
UART Clock Configuration
0xFC8
read-write
n
0x0
0x0
UART_CC_CS
UART Baud Clock Source
0
4
UART_CC_CS_SYSCLK
System clock (based on clock source and divisor factor)
0x0
UART_CC_CS_PIOSC
PIOSC
0x5
UART0CTL
UART Control
0x30
read-write
n
0x0
0x0
UART_CTL_CTSEN
Enable Clear To Send
15
16
UART_CTL_DTR
Data Terminal Ready
10
11
UART_CTL_EOT
End of Transmission
4
5
UART_CTL_HSE
High-Speed Enable
5
6
UART_CTL_LBE
UART Loop Back Enable
7
8
UART_CTL_RTS
Request to Send
11
12
UART_CTL_RTSEN
Enable Request to Send
14
15
UART_CTL_RXE
UART Receive Enable
9
10
UART_CTL_SIREN
UART SIR Enable
1
2
UART_CTL_SIRLP
UART SIR Low-Power Mode
2
3
UART_CTL_SMART
ISO 7816 Smart Card Support
3
4
UART_CTL_TXE
UART Transmit Enable
8
9
UART_CTL_UARTEN
UART Enable
0
1
UART0DMACTL
UART DMA Control
0x48
read-write
n
0x0
0x0
UART_DMACTL_DMAERR
DMA on Error
2
3
UART_DMACTL_RXDMAE
Receive DMA Enable
0
1
UART_DMACTL_TXDMAE
Transmit DMA Enable
1
2
UART0DR
UART Data
0x0
read-write
n
0x0
0x0
UART_DR_BE
UART Break Error
10
11
UART_DR_DATA
Data Transmitted or Received
0
8
UART_DR_FE
UART Framing Error
8
9
UART_DR_OE
UART Overrun Error
11
12
UART_DR_PE
UART Parity Error
9
10
UART0ECR
UART Receive Status/Error Clear
UART_ALT
0x4
read-write
n
0x0
0x0
UART_ECR_DATA
Error Clear
0
8
UART0FBRD
UART Fractional Baud-Rate Divisor
0x28
read-write
n
0x0
0x0
UART_FBRD_DIVFRAC
Fractional Baud-Rate Divisor
0
6
UART0FR
UART Flag
0x18
read-write
n
0x0
0x0
UART_FR_BUSY
UART Busy
3
4
UART_FR_CTS
Clear To Send
0
1
UART_FR_DCD
Data Carrier Detect
2
3
UART_FR_DSR
Data Set Ready
1
2
UART_FR_RI
Ring Indicator
8
9
UART_FR_RXFE
UART Receive FIFO Empty
4
5
UART_FR_RXFF
UART Receive FIFO Full
6
7
UART_FR_TXFE
UART Transmit FIFO Empty
7
8
UART_FR_TXFF
UART Transmit FIFO Full
5
6
UART0IBRD
UART Integer Baud-Rate Divisor
0x24
read-write
n
0x0
0x0
UART_IBRD_DIVINT
Integer Baud-Rate Divisor
0
16
UART0ICR
UART Interrupt Clear
0x44
write-only
n
0x0
0x0
UART_ICR_9BITIC
9-Bit Mode Interrupt Clear
12
13
write-only
UART_ICR_BEIC
Break Error Interrupt Clear
9
10
write-only
UART_ICR_CTSMIC
UART Clear to Send Modem Interrupt Clear
1
2
write-only
UART_ICR_DCDMIC
UART Data Carrier Detect Modem Interrupt Clear
2
3
write-only
UART_ICR_DSRMIC
UART Data Set Ready Modem Interrupt Clear
3
4
write-only
UART_ICR_FEIC
Framing Error Interrupt Clear
7
8
write-only
UART_ICR_OEIC
Overrun Error Interrupt Clear
10
11
write-only
UART_ICR_PEIC
Parity Error Interrupt Clear
8
9
write-only
UART_ICR_RIMIC
UART Ring Indicator Modem Interrupt Clear
0
1
write-only
UART_ICR_RTIC
Receive Time-Out Interrupt Clear
6
7
write-only
UART_ICR_RXIC
Receive Interrupt Clear
4
5
write-only
UART_ICR_TXIC
Transmit Interrupt Clear
5
6
write-only
UART0IFLS
UART Interrupt FIFO Level Select
0x34
read-write
n
0x0
0x0
UART_IFLS_RX
UART Receive Interrupt FIFO Level Select
3
6
UART_IFLS_RX1_8
RX FIFO >= 1/8 full
0x0
UART_IFLS_RX2_8
RX FIFO >= 1/4 full
0x1
UART_IFLS_RX4_8
RX FIFO >= 1/2 full (default)
0x2
UART_IFLS_RX6_8
RX FIFO >= 3/4 full
0x3
UART_IFLS_RX7_8
RX FIFO >= 7/8 full
0x4
UART_IFLS_TX
UART Transmit Interrupt FIFO Level Select
0
3
UART_IFLS_TX1_8
TX FIFO <= 1/8 full
0x0
UART_IFLS_TX2_8
TX FIFO <= 1/4 full
0x1
UART_IFLS_TX4_8
TX FIFO <= 1/2 full (default)
0x2
UART_IFLS_TX6_8
TX FIFO <= 3/4 full
0x3
UART_IFLS_TX7_8
TX FIFO <= 7/8 full
0x4
UART0ILPR
UART IrDA Low-Power Register
0x20
read-write
n
0x0
0x0
UART_ILPR_ILPDVSR
IrDA Low-Power Divisor
0
8
UART0IM
UART Interrupt Mask
0x38
read-write
n
0x0
0x0
UART_IM_9BITIM
9-Bit Mode Interrupt Mask
12
13
UART_IM_BEIM
UART Break Error Interrupt Mask
9
10
UART_IM_CTSMIM
UART Clear to Send Modem Interrupt Mask
1
2
UART_IM_DCDMIM
UART Data Carrier Detect Modem Interrupt Mask
2
3
UART_IM_DSRMIM
UART Data Set Ready Modem Interrupt Mask
3
4
UART_IM_FEIM
UART Framing Error Interrupt Mask
7
8
UART_IM_OEIM
UART Overrun Error Interrupt Mask
10
11
UART_IM_PEIM
UART Parity Error Interrupt Mask
8
9
UART_IM_RIMIM
UART Ring Indicator Modem Interrupt Mask
0
1
UART_IM_RTIM
UART Receive Time-Out Interrupt Mask
6
7
UART_IM_RXIM
UART Receive Interrupt Mask
4
5
UART_IM_TXIM
UART Transmit Interrupt Mask
5
6
UART0LCRH
UART Line Control
0x2C
read-write
n
0x0
0x0
UART_LCRH_BRK
UART Send Break
0
1
UART_LCRH_EPS
UART Even Parity Select
2
3
UART_LCRH_FEN
UART Enable FIFOs
4
5
UART_LCRH_PEN
UART Parity Enable
1
2
UART_LCRH_SPS
UART Stick Parity Select
7
8
UART_LCRH_STP2
UART Two Stop Bits Select
3
4
UART_LCRH_WLEN
UART Word Length
5
7
UART_LCRH_WLEN_5
5 bits (default)
0x0
UART_LCRH_WLEN_6
6 bits
0x1
UART_LCRH_WLEN_7
7 bits
0x2
UART_LCRH_WLEN_8
8 bits
0x3
UART0MIS
UART Masked Interrupt Status
0x40
read-write
n
0x0
0x0
UART_MIS_9BITMIS
9-Bit Mode Masked Interrupt Status
12
13
UART_MIS_BEMIS
UART Break Error Masked Interrupt Status
9
10
UART_MIS_CTSMIS
UART Clear to Send Modem Masked Interrupt Status
1
2
UART_MIS_DCDMIS
UART Data Carrier Detect Modem Masked Interrupt Status
2
3
UART_MIS_DSRMIS
UART Data Set Ready Modem Masked Interrupt Status
3
4
UART_MIS_FEMIS
UART Framing Error Masked Interrupt Status
7
8
UART_MIS_OEMIS
UART Overrun Error Masked Interrupt Status
10
11
UART_MIS_PEMIS
UART Parity Error Masked Interrupt Status
8
9
UART_MIS_RIMIS
UART Ring Indicator Modem Masked Interrupt Status
0
1
UART_MIS_RTMIS
UART Receive Time-Out Masked Interrupt Status
6
7
UART_MIS_RXMIS
UART Receive Masked Interrupt Status
4
5
UART_MIS_TXMIS
UART Transmit Masked Interrupt Status
5
6
UART0PP
UART Peripheral Properties
0xFC0
read-write
n
0x0
0x0
UART_PP_NB
9-Bit Support
1
2
UART_PP_SC
Smart Card Support
0
1
UART0RIS
UART Raw Interrupt Status
0x3C
read-write
n
0x0
0x0
UART_RIS_9BITRIS
9-Bit Mode Raw Interrupt Status
12
13
UART_RIS_BERIS
UART Break Error Raw Interrupt Status
9
10
UART_RIS_CTSRIS
UART Clear to Send Modem Raw Interrupt Status
1
2
UART_RIS_DCDRIS
UART Data Carrier Detect Modem Raw Interrupt Status
2
3
UART_RIS_DSRRIS
UART Data Set Ready Modem Raw Interrupt Status
3
4
UART_RIS_FERIS
UART Framing Error Raw Interrupt Status
7
8
UART_RIS_OERIS
UART Overrun Error Raw Interrupt Status
10
11
UART_RIS_PERIS
UART Parity Error Raw Interrupt Status
8
9
UART_RIS_RIRIS
UART Ring Indicator Modem Raw Interrupt Status
0
1
UART_RIS_RTRIS
UART Receive Time-Out Raw Interrupt Status
6
7
UART_RIS_RXRIS
UART Receive Raw Interrupt Status
4
5
UART_RIS_TXRIS
UART Transmit Raw Interrupt Status
5
6
UART0RSR
UART Receive Status/Error Clear
0x4
read-write
n
0x0
0x0
UART_RSR_BE
UART Break Error
2
3
UART_RSR_FE
UART Framing Error
0
1
UART_RSR_OE
UART Overrun Error
3
4
UART_RSR_PE
UART Parity Error
1
2
_9BITADDR
UART 9-Bit Self Address
0xA4
-1
read-write
n
0x0
0x0
UART_9BITADDR_9BITEN
Enable 9-Bit Mode
15
16
UART_9BITADDR_ADDR
Self Address for 9-Bit Mode
0
8
_9BITAMASK
UART 9-Bit Self Address Mask
0xA8
-1
read-write
n
0x0
0x0
UART_9BITAMASK_MASK
Self Address Mask for 9-Bit Mode
0
8
UART7
Register map for UART0 peripheral
UART
0x0
0x0
0x1000
registers
n
UART7
63
9BITADDR
UART 9-Bit Self Address
0xA4
read-write
n
0x0
0x0
UART_9BITADDR_9BITEN
Enable 9-Bit Mode
15
16
UART_9BITADDR_ADDR
Self Address for 9-Bit Mode
0
8
9BITAMASK
UART 9-Bit Self Address Mask
0xA8
read-write
n
0x0
0x0
UART_9BITAMASK_MASK
Self Address Mask for 9-Bit Mode
0
8
CC
UART Clock Configuration
0xFC8
-1
read-write
n
0x0
0x0
UART_CC_CS
UART Baud Clock Source
0
4
UART_CC_CS_SYSCLK
System clock (based on clock source and divisor factor)
0x0
UART_CC_CS_PIOSC
PIOSC
0x5
CTL
UART Control
0x30
-1
read-write
n
0x0
0x0
UART_CTL_CTSEN
Enable Clear To Send
15
16
UART_CTL_DTR
Data Terminal Ready
10
11
UART_CTL_EOT
End of Transmission
4
5
UART_CTL_HSE
High-Speed Enable
5
6
UART_CTL_LBE
UART Loop Back Enable
7
8
UART_CTL_RTS
Request to Send
11
12
UART_CTL_RTSEN
Enable Request to Send
14
15
UART_CTL_RXE
UART Receive Enable
9
10
UART_CTL_SIREN
UART SIR Enable
1
2
UART_CTL_SIRLP
UART SIR Low-Power Mode
2
3
UART_CTL_SMART
ISO 7816 Smart Card Support
3
4
UART_CTL_TXE
UART Transmit Enable
8
9
UART_CTL_UARTEN
UART Enable
0
1
DMACTL
UART DMA Control
0x48
-1
read-write
n
0x0
0x0
UART_DMACTL_DMAERR
DMA on Error
2
3
UART_DMACTL_RXDMAE
Receive DMA Enable
0
1
UART_DMACTL_TXDMAE
Transmit DMA Enable
1
2
DR
UART Data
0x0
-1
read-write
n
0x0
0x0
UART_DR_BE
UART Break Error
10
11
UART_DR_DATA
Data Transmitted or Received
0
8
UART_DR_FE
UART Framing Error
8
9
UART_DR_OE
UART Overrun Error
11
12
UART_DR_PE
UART Parity Error
9
10
ECR
UART Receive Status/Error Clear
0x4
-1
read-write
n
0x0
0x0
UART_ECR_DATA
Error Clear
0
8
FBRD
UART Fractional Baud-Rate Divisor
0x28
-1
read-write
n
0x0
0x0
UART_FBRD_DIVFRAC
Fractional Baud-Rate Divisor
0
6
FR
UART Flag
0x18
-1
read-write
n
0x0
0x0
UART_FR_BUSY
UART Busy
3
4
UART_FR_CTS
Clear To Send
0
1
UART_FR_DCD
Data Carrier Detect
2
3
UART_FR_DSR
Data Set Ready
1
2
UART_FR_RI
Ring Indicator
8
9
UART_FR_RXFE
UART Receive FIFO Empty
4
5
UART_FR_RXFF
UART Receive FIFO Full
6
7
UART_FR_TXFE
UART Transmit FIFO Empty
7
8
UART_FR_TXFF
UART Transmit FIFO Full
5
6
IBRD
UART Integer Baud-Rate Divisor
0x24
-1
read-write
n
0x0
0x0
UART_IBRD_DIVINT
Integer Baud-Rate Divisor
0
16
ICR
UART Interrupt Clear
0x44
-1
write-only
n
0x0
0x0
UART_ICR_9BITIC
9-Bit Mode Interrupt Clear
12
13
write-only
UART_ICR_BEIC
Break Error Interrupt Clear
9
10
write-only
UART_ICR_CTSMIC
UART Clear to Send Modem Interrupt Clear
1
2
write-only
UART_ICR_DCDMIC
UART Data Carrier Detect Modem Interrupt Clear
2
3
write-only
UART_ICR_DSRMIC
UART Data Set Ready Modem Interrupt Clear
3
4
write-only
UART_ICR_FEIC
Framing Error Interrupt Clear
7
8
write-only
UART_ICR_OEIC
Overrun Error Interrupt Clear
10
11
write-only
UART_ICR_PEIC
Parity Error Interrupt Clear
8
9
write-only
UART_ICR_RIMIC
UART Ring Indicator Modem Interrupt Clear
0
1
write-only
UART_ICR_RTIC
Receive Time-Out Interrupt Clear
6
7
write-only
UART_ICR_RXIC
Receive Interrupt Clear
4
5
write-only
UART_ICR_TXIC
Transmit Interrupt Clear
5
6
write-only
IFLS
UART Interrupt FIFO Level Select
0x34
-1
read-write
n
0x0
0x0
UART_IFLS_RX
UART Receive Interrupt FIFO Level Select
3
6
UART_IFLS_RX1_8
RX FIFO >= 1/8 full
0x0
UART_IFLS_RX2_8
RX FIFO >= 1/4 full
0x1
UART_IFLS_RX4_8
RX FIFO >= 1/2 full (default)
0x2
UART_IFLS_RX6_8
RX FIFO >= 3/4 full
0x3
UART_IFLS_RX7_8
RX FIFO >= 7/8 full
0x4
UART_IFLS_TX
UART Transmit Interrupt FIFO Level Select
0
3
UART_IFLS_TX1_8
TX FIFO and lt = 1/8 full
0x0
UART_IFLS_TX2_8
TX FIFO and lt = 1/4 full
0x1
UART_IFLS_TX4_8
TX FIFO and lt = 1/2 full (default)
0x2
UART_IFLS_TX6_8
TX FIFO and lt = 3/4 full
0x3
UART_IFLS_TX7_8
TX FIFO and lt = 7/8 full
0x4
ILPR
UART IrDA Low-Power Register
0x20
-1
read-write
n
0x0
0x0
UART_ILPR_ILPDVSR
IrDA Low-Power Divisor
0
8
IM
UART Interrupt Mask
0x38
-1
read-write
n
0x0
0x0
UART_IM_9BITIM
9-Bit Mode Interrupt Mask
12
13
UART_IM_BEIM
UART Break Error Interrupt Mask
9
10
UART_IM_CTSMIM
UART Clear to Send Modem Interrupt Mask
1
2
UART_IM_DCDMIM
UART Data Carrier Detect Modem Interrupt Mask
2
3
UART_IM_DSRMIM
UART Data Set Ready Modem Interrupt Mask
3
4
UART_IM_FEIM
UART Framing Error Interrupt Mask
7
8
UART_IM_OEIM
UART Overrun Error Interrupt Mask
10
11
UART_IM_PEIM
UART Parity Error Interrupt Mask
8
9
UART_IM_RIMIM
UART Ring Indicator Modem Interrupt Mask
0
1
UART_IM_RTIM
UART Receive Time-Out Interrupt Mask
6
7
UART_IM_RXIM
UART Receive Interrupt Mask
4
5
UART_IM_TXIM
UART Transmit Interrupt Mask
5
6
LCRH
UART Line Control
0x2C
-1
read-write
n
0x0
0x0
UART_LCRH_BRK
UART Send Break
0
1
UART_LCRH_EPS
UART Even Parity Select
2
3
UART_LCRH_FEN
UART Enable FIFOs
4
5
UART_LCRH_PEN
UART Parity Enable
1
2
UART_LCRH_SPS
UART Stick Parity Select
7
8
UART_LCRH_STP2
UART Two Stop Bits Select
3
4
UART_LCRH_WLEN
UART Word Length
5
7
UART_LCRH_WLEN_5
5 bits (default)
0x0
UART_LCRH_WLEN_6
6 bits
0x1
UART_LCRH_WLEN_7
7 bits
0x2
UART_LCRH_WLEN_8
8 bits
0x3
MIS
UART Masked Interrupt Status
0x40
-1
read-write
n
0x0
0x0
UART_MIS_9BITMIS
9-Bit Mode Masked Interrupt Status
12
13
UART_MIS_BEMIS
UART Break Error Masked Interrupt Status
9
10
UART_MIS_CTSMIS
UART Clear to Send Modem Masked Interrupt Status
1
2
UART_MIS_DCDMIS
UART Data Carrier Detect Modem Masked Interrupt Status
2
3
UART_MIS_DSRMIS
UART Data Set Ready Modem Masked Interrupt Status
3
4
UART_MIS_FEMIS
UART Framing Error Masked Interrupt Status
7
8
UART_MIS_OEMIS
UART Overrun Error Masked Interrupt Status
10
11
UART_MIS_PEMIS
UART Parity Error Masked Interrupt Status
8
9
UART_MIS_RIMIS
UART Ring Indicator Modem Masked Interrupt Status
0
1
UART_MIS_RTMIS
UART Receive Time-Out Masked Interrupt Status
6
7
UART_MIS_RXMIS
UART Receive Masked Interrupt Status
4
5
UART_MIS_TXMIS
UART Transmit Masked Interrupt Status
5
6
PP
UART Peripheral Properties
0xFC0
-1
read-write
n
0x0
0x0
UART_PP_NB
9-Bit Support
1
2
UART_PP_SC
Smart Card Support
0
1
RIS
UART Raw Interrupt Status
0x3C
-1
read-write
n
0x0
0x0
UART_RIS_9BITRIS
9-Bit Mode Raw Interrupt Status
12
13
UART_RIS_BERIS
UART Break Error Raw Interrupt Status
9
10
UART_RIS_CTSRIS
UART Clear to Send Modem Raw Interrupt Status
1
2
UART_RIS_DCDRIS
UART Data Carrier Detect Modem Raw Interrupt Status
2
3
UART_RIS_DSRRIS
UART Data Set Ready Modem Raw Interrupt Status
3
4
UART_RIS_FERIS
UART Framing Error Raw Interrupt Status
7
8
UART_RIS_OERIS
UART Overrun Error Raw Interrupt Status
10
11
UART_RIS_PERIS
UART Parity Error Raw Interrupt Status
8
9
UART_RIS_RIRIS
UART Ring Indicator Modem Raw Interrupt Status
0
1
UART_RIS_RTRIS
UART Receive Time-Out Raw Interrupt Status
6
7
UART_RIS_RXRIS
UART Receive Raw Interrupt Status
4
5
UART_RIS_TXRIS
UART Transmit Raw Interrupt Status
5
6
RSR
UART Receive Status/Error Clear
0x4
-1
read-write
n
0x0
0x0
UART_RSR_BE
UART Break Error
2
3
UART_RSR_FE
UART Framing Error
0
1
UART_RSR_OE
UART Overrun Error
3
4
UART_RSR_PE
UART Parity Error
1
2
UART0CC
UART Clock Configuration
0xFC8
read-write
n
0x0
0x0
UART_CC_CS
UART Baud Clock Source
0
4
UART_CC_CS_SYSCLK
System clock (based on clock source and divisor factor)
0x0
UART_CC_CS_PIOSC
PIOSC
0x5
UART0CTL
UART Control
0x30
read-write
n
0x0
0x0
UART_CTL_CTSEN
Enable Clear To Send
15
16
UART_CTL_DTR
Data Terminal Ready
10
11
UART_CTL_EOT
End of Transmission
4
5
UART_CTL_HSE
High-Speed Enable
5
6
UART_CTL_LBE
UART Loop Back Enable
7
8
UART_CTL_RTS
Request to Send
11
12
UART_CTL_RTSEN
Enable Request to Send
14
15
UART_CTL_RXE
UART Receive Enable
9
10
UART_CTL_SIREN
UART SIR Enable
1
2
UART_CTL_SIRLP
UART SIR Low-Power Mode
2
3
UART_CTL_SMART
ISO 7816 Smart Card Support
3
4
UART_CTL_TXE
UART Transmit Enable
8
9
UART_CTL_UARTEN
UART Enable
0
1
UART0DMACTL
UART DMA Control
0x48
read-write
n
0x0
0x0
UART_DMACTL_DMAERR
DMA on Error
2
3
UART_DMACTL_RXDMAE
Receive DMA Enable
0
1
UART_DMACTL_TXDMAE
Transmit DMA Enable
1
2
UART0DR
UART Data
0x0
read-write
n
0x0
0x0
UART_DR_BE
UART Break Error
10
11
UART_DR_DATA
Data Transmitted or Received
0
8
UART_DR_FE
UART Framing Error
8
9
UART_DR_OE
UART Overrun Error
11
12
UART_DR_PE
UART Parity Error
9
10
UART0ECR
UART Receive Status/Error Clear
UART_ALT
0x4
read-write
n
0x0
0x0
UART_ECR_DATA
Error Clear
0
8
UART0FBRD
UART Fractional Baud-Rate Divisor
0x28
read-write
n
0x0
0x0
UART_FBRD_DIVFRAC
Fractional Baud-Rate Divisor
0
6
UART0FR
UART Flag
0x18
read-write
n
0x0
0x0
UART_FR_BUSY
UART Busy
3
4
UART_FR_CTS
Clear To Send
0
1
UART_FR_DCD
Data Carrier Detect
2
3
UART_FR_DSR
Data Set Ready
1
2
UART_FR_RI
Ring Indicator
8
9
UART_FR_RXFE
UART Receive FIFO Empty
4
5
UART_FR_RXFF
UART Receive FIFO Full
6
7
UART_FR_TXFE
UART Transmit FIFO Empty
7
8
UART_FR_TXFF
UART Transmit FIFO Full
5
6
UART0IBRD
UART Integer Baud-Rate Divisor
0x24
read-write
n
0x0
0x0
UART_IBRD_DIVINT
Integer Baud-Rate Divisor
0
16
UART0ICR
UART Interrupt Clear
0x44
write-only
n
0x0
0x0
UART_ICR_9BITIC
9-Bit Mode Interrupt Clear
12
13
write-only
UART_ICR_BEIC
Break Error Interrupt Clear
9
10
write-only
UART_ICR_CTSMIC
UART Clear to Send Modem Interrupt Clear
1
2
write-only
UART_ICR_DCDMIC
UART Data Carrier Detect Modem Interrupt Clear
2
3
write-only
UART_ICR_DSRMIC
UART Data Set Ready Modem Interrupt Clear
3
4
write-only
UART_ICR_FEIC
Framing Error Interrupt Clear
7
8
write-only
UART_ICR_OEIC
Overrun Error Interrupt Clear
10
11
write-only
UART_ICR_PEIC
Parity Error Interrupt Clear
8
9
write-only
UART_ICR_RIMIC
UART Ring Indicator Modem Interrupt Clear
0
1
write-only
UART_ICR_RTIC
Receive Time-Out Interrupt Clear
6
7
write-only
UART_ICR_RXIC
Receive Interrupt Clear
4
5
write-only
UART_ICR_TXIC
Transmit Interrupt Clear
5
6
write-only
UART0IFLS
UART Interrupt FIFO Level Select
0x34
read-write
n
0x0
0x0
UART_IFLS_RX
UART Receive Interrupt FIFO Level Select
3
6
UART_IFLS_RX1_8
RX FIFO >= 1/8 full
0x0
UART_IFLS_RX2_8
RX FIFO >= 1/4 full
0x1
UART_IFLS_RX4_8
RX FIFO >= 1/2 full (default)
0x2
UART_IFLS_RX6_8
RX FIFO >= 3/4 full
0x3
UART_IFLS_RX7_8
RX FIFO >= 7/8 full
0x4
UART_IFLS_TX
UART Transmit Interrupt FIFO Level Select
0
3
UART_IFLS_TX1_8
TX FIFO <= 1/8 full
0x0
UART_IFLS_TX2_8
TX FIFO <= 1/4 full
0x1
UART_IFLS_TX4_8
TX FIFO <= 1/2 full (default)
0x2
UART_IFLS_TX6_8
TX FIFO <= 3/4 full
0x3
UART_IFLS_TX7_8
TX FIFO <= 7/8 full
0x4
UART0ILPR
UART IrDA Low-Power Register
0x20
read-write
n
0x0
0x0
UART_ILPR_ILPDVSR
IrDA Low-Power Divisor
0
8
UART0IM
UART Interrupt Mask
0x38
read-write
n
0x0
0x0
UART_IM_9BITIM
9-Bit Mode Interrupt Mask
12
13
UART_IM_BEIM
UART Break Error Interrupt Mask
9
10
UART_IM_CTSMIM
UART Clear to Send Modem Interrupt Mask
1
2
UART_IM_DCDMIM
UART Data Carrier Detect Modem Interrupt Mask
2
3
UART_IM_DSRMIM
UART Data Set Ready Modem Interrupt Mask
3
4
UART_IM_FEIM
UART Framing Error Interrupt Mask
7
8
UART_IM_OEIM
UART Overrun Error Interrupt Mask
10
11
UART_IM_PEIM
UART Parity Error Interrupt Mask
8
9
UART_IM_RIMIM
UART Ring Indicator Modem Interrupt Mask
0
1
UART_IM_RTIM
UART Receive Time-Out Interrupt Mask
6
7
UART_IM_RXIM
UART Receive Interrupt Mask
4
5
UART_IM_TXIM
UART Transmit Interrupt Mask
5
6
UART0LCRH
UART Line Control
0x2C
read-write
n
0x0
0x0
UART_LCRH_BRK
UART Send Break
0
1
UART_LCRH_EPS
UART Even Parity Select
2
3
UART_LCRH_FEN
UART Enable FIFOs
4
5
UART_LCRH_PEN
UART Parity Enable
1
2
UART_LCRH_SPS
UART Stick Parity Select
7
8
UART_LCRH_STP2
UART Two Stop Bits Select
3
4
UART_LCRH_WLEN
UART Word Length
5
7
UART_LCRH_WLEN_5
5 bits (default)
0x0
UART_LCRH_WLEN_6
6 bits
0x1
UART_LCRH_WLEN_7
7 bits
0x2
UART_LCRH_WLEN_8
8 bits
0x3
UART0MIS
UART Masked Interrupt Status
0x40
read-write
n
0x0
0x0
UART_MIS_9BITMIS
9-Bit Mode Masked Interrupt Status
12
13
UART_MIS_BEMIS
UART Break Error Masked Interrupt Status
9
10
UART_MIS_CTSMIS
UART Clear to Send Modem Masked Interrupt Status
1
2
UART_MIS_DCDMIS
UART Data Carrier Detect Modem Masked Interrupt Status
2
3
UART_MIS_DSRMIS
UART Data Set Ready Modem Masked Interrupt Status
3
4
UART_MIS_FEMIS
UART Framing Error Masked Interrupt Status
7
8
UART_MIS_OEMIS
UART Overrun Error Masked Interrupt Status
10
11
UART_MIS_PEMIS
UART Parity Error Masked Interrupt Status
8
9
UART_MIS_RIMIS
UART Ring Indicator Modem Masked Interrupt Status
0
1
UART_MIS_RTMIS
UART Receive Time-Out Masked Interrupt Status
6
7
UART_MIS_RXMIS
UART Receive Masked Interrupt Status
4
5
UART_MIS_TXMIS
UART Transmit Masked Interrupt Status
5
6
UART0PP
UART Peripheral Properties
0xFC0
read-write
n
0x0
0x0
UART_PP_NB
9-Bit Support
1
2
UART_PP_SC
Smart Card Support
0
1
UART0RIS
UART Raw Interrupt Status
0x3C
read-write
n
0x0
0x0
UART_RIS_9BITRIS
9-Bit Mode Raw Interrupt Status
12
13
UART_RIS_BERIS
UART Break Error Raw Interrupt Status
9
10
UART_RIS_CTSRIS
UART Clear to Send Modem Raw Interrupt Status
1
2
UART_RIS_DCDRIS
UART Data Carrier Detect Modem Raw Interrupt Status
2
3
UART_RIS_DSRRIS
UART Data Set Ready Modem Raw Interrupt Status
3
4
UART_RIS_FERIS
UART Framing Error Raw Interrupt Status
7
8
UART_RIS_OERIS
UART Overrun Error Raw Interrupt Status
10
11
UART_RIS_PERIS
UART Parity Error Raw Interrupt Status
8
9
UART_RIS_RIRIS
UART Ring Indicator Modem Raw Interrupt Status
0
1
UART_RIS_RTRIS
UART Receive Time-Out Raw Interrupt Status
6
7
UART_RIS_RXRIS
UART Receive Raw Interrupt Status
4
5
UART_RIS_TXRIS
UART Transmit Raw Interrupt Status
5
6
UART0RSR
UART Receive Status/Error Clear
0x4
read-write
n
0x0
0x0
UART_RSR_BE
UART Break Error
2
3
UART_RSR_FE
UART Framing Error
0
1
UART_RSR_OE
UART Overrun Error
3
4
UART_RSR_PE
UART Parity Error
1
2
_9BITADDR
UART 9-Bit Self Address
0xA4
-1
read-write
n
0x0
0x0
UART_9BITADDR_9BITEN
Enable 9-Bit Mode
15
16
UART_9BITADDR_ADDR
Self Address for 9-Bit Mode
0
8
_9BITAMASK
UART 9-Bit Self Address Mask
0xA8
-1
read-write
n
0x0
0x0
UART_9BITAMASK_MASK
Self Address Mask for 9-Bit Mode
0
8
UDMA
Register map for UDMA peripheral
UDM
0x0
0x0
0x1000
registers
n
UDMA
46
UDMAERR
47
ALTBASE
DMA Alternate Channel Control Base Pointer
0xC
-1
read-write
n
0x0
0x0
UDMA_ALTBASE_ADDR
Alternate Channel Address Pointer
0
32
ALTCLR
DMA Channel Primary Alternate Clear
0x34
-1
write-only
n
0x0
0x0
UDMA_ALTCLR_CLR
Channel [n] Alternate Clear
0
32
write-only
ALTSET
DMA Channel Primary Alternate Set
0x30
-1
read-write
n
0x0
0x0
UDMA_ALTSET_SET
Channel [n] Alternate Set
0
32
CFG
DMA Configuration
0x4
-1
write-only
n
0x0
0x0
UDMA_CFG_MASTEN
Controller Master Enable
0
1
write-only
CHASGN
DMA Channel Assignment
0x500
-1
read-write
n
0x0
0x0
UDMA_CHASGN
Channel [n] Assignment Select
0
32
UDMA_CHASGN_PRIMARY
Use the primary channel assignment
0x0
UDMA_CHASGN_SECONDARY
Use the secondary channel assignment
0x1
CHIS
DMA Channel Interrupt Status
0x504
-1
read-write
n
0x0
0x0
UDMA_CHIS
Channel [n] Interrupt Status
0
32
CHMAP0
DMA Channel Map Select 0
0x510
-1
read-write
n
0x0
0x0
UDMA_CHMAP0_CH0SEL
uDMA Channel 0 Source Select
0
4
UDMA_CHMAP0_CH1SEL
uDMA Channel 1 Source Select
4
8
UDMA_CHMAP0_CH2SEL
uDMA Channel 2 Source Select
8
12
UDMA_CHMAP0_CH3SEL
uDMA Channel 3 Source Select
12
16
UDMA_CHMAP0_CH4SEL
uDMA Channel 4 Source Select
16
20
UDMA_CHMAP0_CH5SEL
uDMA Channel 5 Source Select
20
24
UDMA_CHMAP0_CH6SEL
uDMA Channel 6 Source Select
24
28
UDMA_CHMAP0_CH7SEL
uDMA Channel 7 Source Select
28
32
CHMAP1
DMA Channel Map Select 1
0x514
-1
read-write
n
0x0
0x0
UDMA_CHMAP1_CH10SEL
uDMA Channel 10 Source Select
8
12
UDMA_CHMAP1_CH11SEL
uDMA Channel 11 Source Select
12
16
UDMA_CHMAP1_CH12SEL
uDMA Channel 12 Source Select
16
20
UDMA_CHMAP1_CH13SEL
uDMA Channel 13 Source Select
20
24
UDMA_CHMAP1_CH14SEL
uDMA Channel 14 Source Select
24
28
UDMA_CHMAP1_CH15SEL
uDMA Channel 15 Source Select
28
32
UDMA_CHMAP1_CH8SEL
uDMA Channel 8 Source Select
0
4
UDMA_CHMAP1_CH9SEL
uDMA Channel 9 Source Select
4
8
CHMAP2
DMA Channel Map Select 2
0x518
-1
read-write
n
0x0
0x0
UDMA_CHMAP2_CH16SEL
uDMA Channel 16 Source Select
0
4
UDMA_CHMAP2_CH17SEL
uDMA Channel 17 Source Select
4
8
UDMA_CHMAP2_CH18SEL
uDMA Channel 18 Source Select
8
12
UDMA_CHMAP2_CH19SEL
uDMA Channel 19 Source Select
12
16
UDMA_CHMAP2_CH20SEL
uDMA Channel 20 Source Select
16
20
UDMA_CHMAP2_CH21SEL
uDMA Channel 21 Source Select
20
24
UDMA_CHMAP2_CH22SEL
uDMA Channel 22 Source Select
24
28
UDMA_CHMAP2_CH23SEL
uDMA Channel 23 Source Select
28
32
CHMAP3
DMA Channel Map Select 3
0x51C
-1
read-write
n
0x0
0x0
UDMA_CHMAP3_CH24SEL
uDMA Channel 24 Source Select
0
4
UDMA_CHMAP3_CH25SEL
uDMA Channel 25 Source Select
4
8
UDMA_CHMAP3_CH26SEL
uDMA Channel 26 Source Select
8
12
UDMA_CHMAP3_CH27SEL
uDMA Channel 27 Source Select
12
16
UDMA_CHMAP3_CH28SEL
uDMA Channel 28 Source Select
16
20
UDMA_CHMAP3_CH29SEL
uDMA Channel 29 Source Select
20
24
UDMA_CHMAP3_CH30SEL
uDMA Channel 30 Source Select
24
28
UDMA_CHMAP3_CH31SEL
uDMA Channel 31 Source Select
28
32
CTLBASE
DMA Channel Control Base Pointer
0x8
-1
read-write
n
0x0
0x0
UDMA_CTLBASE_ADDR
Channel Control Base Address
10
32
ENACLR
DMA Channel Enable Clear
0x2C
-1
write-only
n
0x0
0x0
UDMA_ENACLR_CLR
Clear Channel [n] Enable Clear
0
32
write-only
ENASET
DMA Channel Enable Set
0x28
-1
read-write
n
0x0
0x0
UDMA_ENASET_SET
Channel [n] Enable Set
0
32
ERRCLR
DMA Bus Error Clear
0x4C
-1
read-write
n
0x0
0x0
UDMA_ERRCLR_ERRCLR
uDMA Bus Error Status
0
1
PRIOCLR
DMA Channel Priority Clear
0x3C
-1
write-only
n
0x0
0x0
UDMA_PRIOCLR_CLR
Channel [n] Priority Clear
0
32
write-only
PRIOSET
DMA Channel Priority Set
0x38
-1
read-write
n
0x0
0x0
UDMA_PRIOSET_SET
Channel [n] Priority Set
0
32
REQMASKCLR
DMA Channel Request Mask Clear
0x24
-1
write-only
n
0x0
0x0
UDMA_REQMASKCLR_CLR
Channel [n] Request Mask Clear
0
32
write-only
REQMASKSET
DMA Channel Request Mask Set
0x20
-1
read-write
n
0x0
0x0
UDMA_REQMASKSET_SET
Channel [n] Request Mask Set
0
32
STAT
DMA Status
0x0
-1
read-write
n
0x0
0x0
UDMA_STAT_DMACHANS
Available uDMA Channels Minus 1
16
21
UDMA_STAT_MASTEN
Master Enable Status
0
1
UDMA_STAT_STATE
Control State Machine Status
4
8
UDMA_STAT_STATE_IDLE
Idle
0x0
UDMA_STAT_STATE_RD_CTRL
Reading channel controller data
0x1
UDMA_STAT_STATE_RD_SRCENDP
Reading source end pointer
0x2
UDMA_STAT_STATE_RD_DSTENDP
Reading destination end pointer
0x3
UDMA_STAT_STATE_RD_SRCDAT
Reading source data
0x4
UDMA_STAT_STATE_WR_DSTDAT
Writing destination data
0x5
UDMA_STAT_STATE_WAIT
Waiting for uDMA request to clear
0x6
UDMA_STAT_STATE_WR_CTRL
Writing channel controller data
0x7
UDMA_STAT_STATE_STALL
Stalled
0x8
UDMA_STAT_STATE_DONE
Done
0x9
UDMA_STAT_STATE_UNDEF
Undefined
0xa
SWREQ
DMA Channel Software Request
0x14
-1
write-only
n
0x0
0x0
UDMA_SWREQ
Channel [n] Software Request
0
32
write-only
UDMAALTBASE
DMA Alternate Channel Control Base Pointer
0xC
read-write
n
0x0
0x0
UDMA_ALTBASE_ADDR
Alternate Channel Address Pointer
0
32
UDMAALTCLR
DMA Channel Primary Alternate Clear
0x34
write-only
n
0x0
0x0
UDMA_ALTCLR_CLR
Channel [n] Alternate Clear
0
32
write-only
UDMAALTSET
DMA Channel Primary Alternate Set
0x30
read-write
n
0x0
0x0
UDMA_ALTSET_SET
Channel [n] Alternate Set
0
32
UDMACFG
DMA Configuration
0x4
write-only
n
0x0
0x0
UDMA_CFG_MASTEN
Controller Master Enable
0
1
write-only
UDMACHASGN
DMA Channel Assignment
0x500
read-write
n
0x0
0x0
UDMA_CHASGN
Channel [n] Assignment Select
0
32
UDMA_CHASGN_PRIMARY
Use the primary channel assignment
0x0
UDMA_CHASGN_SECONDARY
Use the secondary channel assignment
0x1
UDMACHIS
DMA Channel Interrupt Status
0x504
read-write
n
0x0
0x0
UDMA_CHIS
Channel [n] Interrupt Status
0
32
UDMACHMAP0
DMA Channel Map Select 0
0x510
read-write
n
0x0
0x0
UDMA_CHMAP0_CH0SEL
uDMA Channel 0 Source Select
0
4
UDMA_CHMAP0_CH1SEL
uDMA Channel 1 Source Select
4
8
UDMA_CHMAP0_CH2SEL
uDMA Channel 2 Source Select
8
12
UDMA_CHMAP0_CH3SEL
uDMA Channel 3 Source Select
12
16
UDMA_CHMAP0_CH4SEL
uDMA Channel 4 Source Select
16
20
UDMA_CHMAP0_CH5SEL
uDMA Channel 5 Source Select
20
24
UDMA_CHMAP0_CH6SEL
uDMA Channel 6 Source Select
24
28
UDMA_CHMAP0_CH7SEL
uDMA Channel 7 Source Select
28
32
UDMACHMAP1
DMA Channel Map Select 1
0x514
read-write
n
0x0
0x0
UDMA_CHMAP1_CH10SEL
uDMA Channel 10 Source Select
8
12
UDMA_CHMAP1_CH11SEL
uDMA Channel 11 Source Select
12
16
UDMA_CHMAP1_CH12SEL
uDMA Channel 12 Source Select
16
20
UDMA_CHMAP1_CH13SEL
uDMA Channel 13 Source Select
20
24
UDMA_CHMAP1_CH14SEL
uDMA Channel 14 Source Select
24
28
UDMA_CHMAP1_CH15SEL
uDMA Channel 15 Source Select
28
32
UDMA_CHMAP1_CH8SEL
uDMA Channel 8 Source Select
0
4
UDMA_CHMAP1_CH9SEL
uDMA Channel 9 Source Select
4
8
UDMACHMAP2
DMA Channel Map Select 2
0x518
read-write
n
0x0
0x0
UDMA_CHMAP2_CH16SEL
uDMA Channel 16 Source Select
0
4
UDMA_CHMAP2_CH17SEL
uDMA Channel 17 Source Select
4
8
UDMA_CHMAP2_CH18SEL
uDMA Channel 18 Source Select
8
12
UDMA_CHMAP2_CH19SEL
uDMA Channel 19 Source Select
12
16
UDMA_CHMAP2_CH20SEL
uDMA Channel 20 Source Select
16
20
UDMA_CHMAP2_CH21SEL
uDMA Channel 21 Source Select
20
24
UDMA_CHMAP2_CH22SEL
uDMA Channel 22 Source Select
24
28
UDMA_CHMAP2_CH23SEL
uDMA Channel 23 Source Select
28
32
UDMACHMAP3
DMA Channel Map Select 3
0x51C
read-write
n
0x0
0x0
UDMA_CHMAP3_CH24SEL
uDMA Channel 24 Source Select
0
4
UDMA_CHMAP3_CH25SEL
uDMA Channel 25 Source Select
4
8
UDMA_CHMAP3_CH26SEL
uDMA Channel 26 Source Select
8
12
UDMA_CHMAP3_CH27SEL
uDMA Channel 27 Source Select
12
16
UDMA_CHMAP3_CH28SEL
uDMA Channel 28 Source Select
16
20
UDMA_CHMAP3_CH29SEL
uDMA Channel 29 Source Select
20
24
UDMA_CHMAP3_CH30SEL
uDMA Channel 30 Source Select
24
28
UDMA_CHMAP3_CH31SEL
uDMA Channel 31 Source Select
28
32
UDMACTLBASE
DMA Channel Control Base Pointer
0x8
read-write
n
0x0
0x0
UDMA_CTLBASE_ADDR
Channel Control Base Address
10
32
UDMAENACLR
DMA Channel Enable Clear
0x2C
write-only
n
0x0
0x0
UDMA_ENACLR_CLR
Clear Channel [n] Enable Clear
0
32
write-only
UDMAENASET
DMA Channel Enable Set
0x28
read-write
n
0x0
0x0
UDMA_ENASET_SET
Channel [n] Enable Set
0
32
UDMAERRCLR
DMA Bus Error Clear
0x4C
read-write
n
0x0
0x0
UDMA_ERRCLR_ERRCLR
uDMA Bus Error Status
0
1
UDMAPRIOCLR
DMA Channel Priority Clear
0x3C
write-only
n
0x0
0x0
UDMA_PRIOCLR_CLR
Channel [n] Priority Clear
0
32
write-only
UDMAPRIOSET
DMA Channel Priority Set
0x38
read-write
n
0x0
0x0
UDMA_PRIOSET_SET
Channel [n] Priority Set
0
32
UDMAREQMASKCLR
DMA Channel Request Mask Clear
0x24
write-only
n
0x0
0x0
UDMA_REQMASKCLR_CLR
Channel [n] Request Mask Clear
0
32
write-only
UDMAREQMASKSET
DMA Channel Request Mask Set
0x20
read-write
n
0x0
0x0
UDMA_REQMASKSET_SET
Channel [n] Request Mask Set
0
32
UDMASTAT
DMA Status
0x0
read-write
n
0x0
0x0
UDMA_STAT_DMACHANS
Available uDMA Channels Minus 1
16
21
UDMA_STAT_MASTEN
Master Enable Status
0
1
UDMA_STAT_STATE
Control State Machine Status
4
8
UDMA_STAT_STATE_IDLE
Idle
0x0
UDMA_STAT_STATE_RD_CTRL
Reading channel controller data
0x1
UDMA_STAT_STATE_RD_SRCENDP
Reading source end pointer
0x2
UDMA_STAT_STATE_RD_DSTENDP
Reading destination end pointer
0x3
UDMA_STAT_STATE_RD_SRCDAT
Reading source data
0x4
UDMA_STAT_STATE_WR_DSTDAT
Writing destination data
0x5
UDMA_STAT_STATE_WAIT
Waiting for uDMA request to clear
0x6
UDMA_STAT_STATE_WR_CTRL
Writing channel controller data
0x7
UDMA_STAT_STATE_STALL
Stalled
0x8
UDMA_STAT_STATE_DONE
Done
0x9
UDMA_STAT_STATE_UNDEF
Undefined
0xa
UDMASWREQ
DMA Channel Software Request
0x14
write-only
n
0x0
0x0
UDMA_SWREQ
Channel [n] Software Request
0
32
write-only
UDMAUSEBURSTCLR
DMA Channel Useburst Clear
0x1C
write-only
n
0x0
0x0
UDMA_USEBURSTCLR_CLR
Channel [n] Useburst Clear
0
32
write-only
UDMAUSEBURSTSET
DMA Channel Useburst Set
0x18
read-write
n
0x0
0x0
UDMA_USEBURSTSET_SET
Channel [n] Useburst Set
0
32
UDMAWAITSTAT
DMA Channel Wait-on-Request Status
0x10
read-write
n
0x0
0x0
UDMA_WAITSTAT_WAITREQ
Channel [n] Wait Status
0
32
USEBURSTCLR
DMA Channel Useburst Clear
0x1C
-1
write-only
n
0x0
0x0
UDMA_USEBURSTCLR_CLR
Channel [n] Useburst Clear
0
32
write-only
USEBURSTSET
DMA Channel Useburst Set
0x18
-1
read-write
n
0x0
0x0
UDMA_USEBURSTSET_SET
Channel [n] Useburst Set
0
32
WAITSTAT
DMA Channel Wait-on-Request Status
0x10
-1
read-write
n
0x0
0x0
UDMA_WAITSTAT_WAITREQ
Channel [n] Wait Status
0
32
WATCHDOG0
Register map for WATCHDOG0 peripheral
WATCHDOG
0x0
0x0
0x1000
registers
n
WATCHDOG0
18
CTL
Watchdog Control
0x8
-1
read-write
n
0x0
0x0
WDT_CTL_INTEN
Watchdog Interrupt Enable
0
1
WDT_CTL_INTTYPE
Watchdog Interrupt Type
2
3
WDT_CTL_RESEN
Watchdog Reset Enable
1
2
WDT_CTL_WRC
Write Complete
31
32
ICR
Watchdog Interrupt Clear
0xC
-1
write-only
n
0x0
0x0
WDT_ICR
Watchdog Interrupt Clear
0
32
write-only
LOAD
Watchdog Load
0x0
-1
read-write
n
0x0
0x0
WDT_LOAD
Watchdog Load Value
0
32
LOCK
Watchdog Lock
0xC00
-1
read-write
n
0x0
0x0
WDT_LOCK
Watchdog Lock
0
32
WDT_LOCK_UNLOCKED
Unlocked
0x0
WDT_LOCK_LOCKED
Locked
0x1
WDT_LOCK_UNLOCK
Unlocks the watchdog timer
0x1acce551
MIS
Watchdog Masked Interrupt Status
0x14
-1
read-write
n
0x0
0x0
WDT_MIS_WDTMIS
Watchdog Masked Interrupt Status
0
1
RIS
Watchdog Raw Interrupt Status
0x10
-1
read-write
n
0x0
0x0
WDT_RIS_WDTRIS
Watchdog Raw Interrupt Status
0
1
TEST
Watchdog Test
0x418
-1
read-write
n
0x0
0x0
WDT_TEST_STALL
Watchdog Stall Enable
8
9
VALUE
Watchdog Value
0x4
-1
read-write
n
0x0
0x0
WDT_VALUE
Watchdog Value
0
32
WATCHDOG0CTL
Watchdog Control
0x8
read-write
n
0x0
0x0
WDT_CTL_INTEN
Watchdog Interrupt Enable
0
1
WDT_CTL_INTTYPE
Watchdog Interrupt Type
2
3
WDT_CTL_RESEN
Watchdog Reset Enable
1
2
WDT_CTL_WRC
Write Complete
31
32
WATCHDOG0ICR
Watchdog Interrupt Clear
0xC
write-only
n
0x0
0x0
WDT_ICR
Watchdog Interrupt Clear
0
32
write-only
WATCHDOG0LOAD
Watchdog Load
0x0
read-write
n
0x0
0x0
WDT_LOAD
Watchdog Load Value
0
32
WATCHDOG0LOCK
Watchdog Lock
0xC00
read-write
n
0x0
0x0
WDT_LOCK
Watchdog Lock
0
32
WDT_LOCK_UNLOCKED
Unlocked
0x0
WDT_LOCK_LOCKED
Locked
0x1
WDT_LOCK_UNLOCK
Unlocks the watchdog timer
0x1acce551
WATCHDOG0MIS
Watchdog Masked Interrupt Status
0x14
read-write
n
0x0
0x0
WDT_MIS_WDTMIS
Watchdog Masked Interrupt Status
0
1
WATCHDOG0RIS
Watchdog Raw Interrupt Status
0x10
read-write
n
0x0
0x0
WDT_RIS_WDTRIS
Watchdog Raw Interrupt Status
0
1
WATCHDOG0TEST
Watchdog Test
0x418
read-write
n
0x0
0x0
WDT_TEST_STALL
Watchdog Stall Enable
8
9
WATCHDOG0VALUE
Watchdog Value
0x4
read-write
n
0x0
0x0
WDT_VALUE
Watchdog Value
0
32
WATCHDOG1
Register map for WATCHDOG0 peripheral
WATCHDOG
0x0
0x0
0x1000
registers
n
CTL
Watchdog Control
0x8
-1
read-write
n
0x0
0x0
WDT_CTL_INTEN
Watchdog Interrupt Enable
0
1
WDT_CTL_INTTYPE
Watchdog Interrupt Type
2
3
WDT_CTL_RESEN
Watchdog Reset Enable
1
2
WDT_CTL_WRC
Write Complete
31
32
ICR
Watchdog Interrupt Clear
0xC
-1
write-only
n
0x0
0x0
WDT_ICR
Watchdog Interrupt Clear
0
32
write-only
LOAD
Watchdog Load
0x0
-1
read-write
n
0x0
0x0
WDT_LOAD
Watchdog Load Value
0
32
LOCK
Watchdog Lock
0xC00
-1
read-write
n
0x0
0x0
WDT_LOCK
Watchdog Lock
0
32
WDT_LOCK_UNLOCKED
Unlocked
0x0
WDT_LOCK_LOCKED
Locked
0x1
WDT_LOCK_UNLOCK
Unlocks the watchdog timer
0x1acce551
MIS
Watchdog Masked Interrupt Status
0x14
-1
read-write
n
0x0
0x0
WDT_MIS_WDTMIS
Watchdog Masked Interrupt Status
0
1
RIS
Watchdog Raw Interrupt Status
0x10
-1
read-write
n
0x0
0x0
WDT_RIS_WDTRIS
Watchdog Raw Interrupt Status
0
1
TEST
Watchdog Test
0x418
-1
read-write
n
0x0
0x0
WDT_TEST_STALL
Watchdog Stall Enable
8
9
VALUE
Watchdog Value
0x4
-1
read-write
n
0x0
0x0
WDT_VALUE
Watchdog Value
0
32
WATCHDOG0CTL
Watchdog Control
0x8
read-write
n
0x0
0x0
WDT_CTL_INTEN
Watchdog Interrupt Enable
0
1
WDT_CTL_INTTYPE
Watchdog Interrupt Type
2
3
WDT_CTL_RESEN
Watchdog Reset Enable
1
2
WDT_CTL_WRC
Write Complete
31
32
WATCHDOG0ICR
Watchdog Interrupt Clear
0xC
write-only
n
0x0
0x0
WDT_ICR
Watchdog Interrupt Clear
0
32
write-only
WATCHDOG0LOAD
Watchdog Load
0x0
read-write
n
0x0
0x0
WDT_LOAD
Watchdog Load Value
0
32
WATCHDOG0LOCK
Watchdog Lock
0xC00
read-write
n
0x0
0x0
WDT_LOCK
Watchdog Lock
0
32
WDT_LOCK_UNLOCKED
Unlocked
0x0
WDT_LOCK_LOCKED
Locked
0x1
WDT_LOCK_UNLOCK
Unlocks the watchdog timer
0x1acce551
WATCHDOG0MIS
Watchdog Masked Interrupt Status
0x14
read-write
n
0x0
0x0
WDT_MIS_WDTMIS
Watchdog Masked Interrupt Status
0
1
WATCHDOG0RIS
Watchdog Raw Interrupt Status
0x10
read-write
n
0x0
0x0
WDT_RIS_WDTRIS
Watchdog Raw Interrupt Status
0
1
WATCHDOG0TEST
Watchdog Test
0x418
read-write
n
0x0
0x0
WDT_TEST_STALL
Watchdog Stall Enable
8
9
WATCHDOG0VALUE
Watchdog Value
0x4
read-write
n
0x0
0x0
WDT_VALUE
Watchdog Value
0
32
WTIMER0
Register map for WTIMER0 peripheral
TIMER
0x0
0x0
0x1000
registers
n
WTIMER0A
94
WTIMER0B
95
CFG
GPTM Configuration
0x0
-1
read-write
n
0x0
0x0
TIMER_CFG
GPTM Configuration
0
3
TIMER_CFG_32_BIT_TIMER
For a 16/32-bit timer, this value selects the 32-bit timer configuration
0x0
TIMER_CFG_32_BIT_RTC
For a 16/32-bit timer, this value selects the 32-bit real-time clock (RTC) counter configuration
0x1
TIMER_CFG_16_BIT
For a 16/32-bit timer, this value selects the 16-bit timer configuration
0x4
CTL
GPTM Control
0xC
-1
read-write
n
0x0
0x0
TIMER_CTL_RTCEN
GPTM RTC Stall Enable
4
5
TIMER_CTL_TAEN
GPTM Timer A Enable
0
1
TIMER_CTL_TAEVENT
GPTM Timer A Event Mode
2
4
TIMER_CTL_TAEVENT_POS
Positive edge
0x0
TIMER_CTL_TAEVENT_NEG
Negative edge
0x1
TIMER_CTL_TAEVENT_BOTH
Both edges
0x3
TIMER_CTL_TAOTE
GPTM Timer A Output Trigger Enable
5
6
TIMER_CTL_TAPWML
GPTM Timer A PWM Output Level
6
7
TIMER_CTL_TASTALL
GPTM Timer A Stall Enable
1
2
TIMER_CTL_TBEN
GPTM Timer B Enable
8
9
TIMER_CTL_TBEVENT
GPTM Timer B Event Mode
10
12
TIMER_CTL_TBEVENT_POS
Positive edge
0x0
TIMER_CTL_TBEVENT_NEG
Negative edge
0x1
TIMER_CTL_TBEVENT_BOTH
Both edges
0x3
TIMER_CTL_TBOTE
GPTM Timer B Output Trigger Enable
13
14
TIMER_CTL_TBPWML
GPTM Timer B PWM Output Level
14
15
TIMER_CTL_TBSTALL
GPTM Timer B Stall Enable
9
10
ICR
GPTM Interrupt Clear
0x24
-1
write-only
n
0x0
0x0
TIMER_ICR_CAECINT
GPTM Timer A Capture Mode Event Interrupt Clear
2
3
write-only
TIMER_ICR_CAMCINT
GPTM Timer A Capture Mode Match Interrupt Clear
1
2
write-only
TIMER_ICR_CBECINT
GPTM Timer B Capture Mode Event Interrupt Clear
10
11
write-only
TIMER_ICR_CBMCINT
GPTM Timer B Capture Mode Match Interrupt Clear
9
10
write-only
TIMER_ICR_RTCCINT
GPTM RTC Interrupt Clear
3
4
write-only
TIMER_ICR_TAMCINT
GPTM Timer A Match Interrupt Clear
4
5
write-only
TIMER_ICR_TATOCINT
GPTM Timer A Time-Out Raw Interrupt
0
1
write-only
TIMER_ICR_TBMCINT
GPTM Timer B Match Interrupt Clear
11
12
write-only
TIMER_ICR_TBTOCINT
GPTM Timer B Time-Out Interrupt Clear
8
9
write-only
TIMER_ICR_WUECINT
32/64-Bit Wide GPTM Write Update Error Interrupt Clear
16
17
write-only
IMR
GPTM Interrupt Mask
0x18
-1
read-write
n
0x0
0x0
TIMER_IMR_CAEIM
GPTM Timer A Capture Mode Event Interrupt Mask
2
3
TIMER_IMR_CAMIM
GPTM Timer A Capture Mode Match Interrupt Mask
1
2
TIMER_IMR_CBEIM
GPTM Timer B Capture Mode Event Interrupt Mask
10
11
TIMER_IMR_CBMIM
GPTM Timer B Capture Mode Match Interrupt Mask
9
10
TIMER_IMR_RTCIM
GPTM RTC Interrupt Mask
3
4
TIMER_IMR_TAMIM
GPTM Timer A Match Interrupt Mask
4
5
TIMER_IMR_TATOIM
GPTM Timer A Time-Out Interrupt Mask
0
1
TIMER_IMR_TBMIM
GPTM Timer B Match Interrupt Mask
11
12
TIMER_IMR_TBTOIM
GPTM Timer B Time-Out Interrupt Mask
8
9
TIMER_IMR_WUEIM
32/64-Bit Wide GPTM Write Update Error Interrupt Mask
16
17
MIS
GPTM Masked Interrupt Status
0x20
-1
read-write
n
0x0
0x0
TIMER_MIS_CAEMIS
GPTM Timer A Capture Mode Event Masked Interrupt
2
3
TIMER_MIS_CAMMIS
GPTM Timer A Capture Mode Match Masked Interrupt
1
2
TIMER_MIS_CBEMIS
GPTM Timer B Capture Mode Event Masked Interrupt
10
11
TIMER_MIS_CBMMIS
GPTM Timer B Capture Mode Match Masked Interrupt
9
10
TIMER_MIS_RTCMIS
GPTM RTC Masked Interrupt
3
4
TIMER_MIS_TAMMIS
GPTM Timer A Match Masked Interrupt
4
5
TIMER_MIS_TATOMIS
GPTM Timer A Time-Out Masked Interrupt
0
1
TIMER_MIS_TBMMIS
GPTM Timer B Match Masked Interrupt
11
12
TIMER_MIS_TBTOMIS
GPTM Timer B Time-Out Masked Interrupt
8
9
TIMER_MIS_WUEMIS
32/64-Bit Wide GPTM Write Update Error Masked Interrupt Status
16
17
PP
GPTM Peripheral Properties
0xFC0
-1
read-write
n
0x0
0x0
TIMER_PP_SIZE
Count Size
0
4
TIMER_PP_SIZE_16
Timer A and Timer B counters are 16 bits each with an 8-bit prescale counter
0x0
TIMER_PP_SIZE_32
Timer A and Timer B counters are 32 bits each with a 16-bit prescale counter
0x1
RIS
GPTM Raw Interrupt Status
0x1C
-1
read-write
n
0x0
0x0
TIMER_RIS_CAERIS
GPTM Timer A Capture Mode Event Raw Interrupt
2
3
TIMER_RIS_CAMRIS
GPTM Timer A Capture Mode Match Raw Interrupt
1
2
TIMER_RIS_CBERIS
GPTM Timer B Capture Mode Event Raw Interrupt
10
11
TIMER_RIS_CBMRIS
GPTM Timer B Capture Mode Match Raw Interrupt
9
10
TIMER_RIS_RTCRIS
GPTM RTC Raw Interrupt
3
4
TIMER_RIS_TAMRIS
GPTM Timer A Match Raw Interrupt
4
5
TIMER_RIS_TATORIS
GPTM Timer A Time-Out Raw Interrupt
0
1
TIMER_RIS_TBMRIS
GPTM Timer B Match Raw Interrupt
11
12
TIMER_RIS_TBTORIS
GPTM Timer B Time-Out Raw Interrupt
8
9
TIMER_RIS_WUERIS
32/64-Bit Wide GPTM Write Update Error Raw Interrupt Status
16
17
RTCPD
GPTM RTC Predivide
0x58
-1
read-write
n
0x0
0x0
TIMER_RTCPD_RTCPD
RTC Predivide Counter Value
0
16
SYNC
GPTM Synchronize
0x10
-1
read-write
n
0x0
0x0
TIMER_SYNC_SYNCT0
Synchronize GPTM Timer 0
0
2
TIMER_SYNC_SYNCT0_NONE
GPTM0 is not affected
0x0
TIMER_SYNC_SYNCT0_TA
A timeout event for Timer A of GPTM0 is triggered
0x1
TIMER_SYNC_SYNCT0_TB
A timeout event for Timer B of GPTM0 is triggered
0x2
TIMER_SYNC_SYNCT0_TATB
A timeout event for both Timer A and Timer B of GPTM0 is triggered
0x3
TIMER_SYNC_SYNCT1
Synchronize GPTM Timer 1
2
4
TIMER_SYNC_SYNCT1_NONE
GPTM1 is not affected
0x0
TIMER_SYNC_SYNCT1_TA
A timeout event for Timer A of GPTM1 is triggered
0x1
TIMER_SYNC_SYNCT1_TB
A timeout event for Timer B of GPTM1 is triggered
0x2
TIMER_SYNC_SYNCT1_TATB
A timeout event for both Timer A and Timer B of GPTM1 is triggered
0x3
TIMER_SYNC_SYNCT2
Synchronize GPTM Timer 2
4
6
TIMER_SYNC_SYNCT2_NONE
GPTM2 is not affected
0x0
TIMER_SYNC_SYNCT2_TA
A timeout event for Timer A of GPTM2 is triggered
0x1
TIMER_SYNC_SYNCT2_TB
A timeout event for Timer B of GPTM2 is triggered
0x2
TIMER_SYNC_SYNCT2_TATB
A timeout event for both Timer A and Timer B of GPTM2 is triggered
0x3
TIMER_SYNC_SYNCT3
Synchronize GPTM Timer 3
6
8
TIMER_SYNC_SYNCT3_NONE
GPTM3 is not affected
0x0
TIMER_SYNC_SYNCT3_TA
A timeout event for Timer A of GPTM3 is triggered
0x1
TIMER_SYNC_SYNCT3_TB
A timeout event for Timer B of GPTM3 is triggered
0x2
TIMER_SYNC_SYNCT3_TATB
A timeout event for both Timer A and Timer B of GPTM3 is triggered
0x3
TIMER_SYNC_SYNCT4
Synchronize GPTM Timer 4
8
10
TIMER_SYNC_SYNCT4_NONE
GPTM4 is not affected
0x0
TIMER_SYNC_SYNCT4_TA
A timeout event for Timer A of GPTM4 is triggered
0x1
TIMER_SYNC_SYNCT4_TB
A timeout event for Timer B of GPTM4 is triggered
0x2
TIMER_SYNC_SYNCT4_TATB
A timeout event for both Timer A and Timer B of GPTM4 is triggered
0x3
TIMER_SYNC_SYNCT5
Synchronize GPTM Timer 5
10
12
TIMER_SYNC_SYNCT5_NONE
GPTM5 is not affected
0x0
TIMER_SYNC_SYNCT5_TA
A timeout event for Timer A of GPTM5 is triggered
0x1
TIMER_SYNC_SYNCT5_TB
A timeout event for Timer B of GPTM5 is triggered
0x2
TIMER_SYNC_SYNCT5_TATB
A timeout event for both Timer A and Timer B of GPTM5 is triggered
0x3
TIMER_SYNC_SYNCWT0
Synchronize GPTM 32/64-Bit Timer 0
12
14
TIMER_SYNC_SYNCWT0_NONE
GPTM 32/64-Bit Timer 0 is not affected
0x0
TIMER_SYNC_SYNCWT0_TA
A timeout event for Timer A of GPTM 32/64-Bit Timer 0 is triggered
0x1
TIMER_SYNC_SYNCWT0_TB
A timeout event for Timer B of GPTM 32/64-Bit Timer 0 is triggered
0x2
TIMER_SYNC_SYNCWT0_TATB
A timeout event for both Timer A and Timer B of GPTM 32/64-Bit Timer 0 is triggered
0x3
TIMER_SYNC_SYNCWT1
Synchronize GPTM 32/64-Bit Timer 1
14
16
TIMER_SYNC_SYNCWT1_NONE
GPTM 32/64-Bit Timer 1 is not affected
0x0
TIMER_SYNC_SYNCWT1_TA
A timeout event for Timer A of GPTM 32/64-Bit Timer 1 is triggered
0x1
TIMER_SYNC_SYNCWT1_TB
A timeout event for Timer B of GPTM 32/64-Bit Timer 1 is triggered
0x2
TIMER_SYNC_SYNCWT1_TATB
A timeout event for both Timer A and Timer B of GPTM 32/64-Bit Timer 1 is triggered
0x3
TIMER_SYNC_SYNCWT2
Synchronize GPTM 32/64-Bit Timer 2
16
18
TIMER_SYNC_SYNCWT2_NONE
GPTM 32/64-Bit Timer 2 is not affected
0x0
TIMER_SYNC_SYNCWT2_TA
A timeout event for Timer A of GPTM 32/64-Bit Timer 2 is triggered
0x1
TIMER_SYNC_SYNCWT2_TB
A timeout event for Timer B of GPTM 32/64-Bit Timer 2 is triggered
0x2
TIMER_SYNC_SYNCWT2_TATB
A timeout event for both Timer A and Timer B of GPTM 32/64-Bit Timer 2 is triggered
0x3
TIMER_SYNC_SYNCWT3
Synchronize GPTM 32/64-Bit Timer 3
18
20
TIMER_SYNC_SYNCWT3_NONE
GPTM 32/64-Bit Timer 3 is not affected
0x0
TIMER_SYNC_SYNCWT3_TA
A timeout event for Timer A of GPTM 32/64-Bit Timer 3 is triggered
0x1
TIMER_SYNC_SYNCWT3_TB
A timeout event for Timer B of GPTM 32/64-Bit Timer 3 is triggered
0x2
TIMER_SYNC_SYNCWT3_TATB
A timeout event for both Timer A and Timer B of GPTM 32/64-Bit Timer 3 is triggered
0x3
TIMER_SYNC_SYNCWT4
Synchronize GPTM 32/64-Bit Timer 4
20
22
TIMER_SYNC_SYNCWT4_NONE
GPTM 32/64-Bit Timer 4 is not affected
0x0
TIMER_SYNC_SYNCWT4_TA
A timeout event for Timer A of GPTM 32/64-Bit Timer 4 is triggered
0x1
TIMER_SYNC_SYNCWT4_TB
A timeout event for Timer B of GPTM 32/64-Bit Timer 4 is triggered
0x2
TIMER_SYNC_SYNCWT4_TATB
A timeout event for both Timer A and Timer B of GPTM 32/64-Bit Timer 4 is triggered
0x3
TIMER_SYNC_SYNCWT5
Synchronize GPTM 32/64-Bit Timer 5
22
24
TIMER_SYNC_SYNCWT5_NONE
GPTM 32/64-Bit Timer 5 is not affected
0x0
TIMER_SYNC_SYNCWT5_TA
A timeout event for Timer A of GPTM 32/64-Bit Timer 5 is triggered
0x1
TIMER_SYNC_SYNCWT5_TB
A timeout event for Timer B of GPTM 32/64-Bit Timer 5 is triggered
0x2
TIMER_SYNC_SYNCWT5_TATB
A timeout event for both Timer A and Timer B of GPTM 32/64-Bit Timer 5 is triggered
0x3
TAILR
GPTM Timer A Interval Load
0x28
-1
read-write
n
0x0
0x0
TAMATCHR
GPTM Timer A Match
0x30
-1
read-write
n
0x0
0x0
TAMR
GPTM Timer A Mode
0x4
-1
read-write
n
0x0
0x0
TIMER_TAMR_TAAMS
GPTM Timer A Alternate Mode Select
3
4
TIMER_TAMR_TACDIR
GPTM Timer A Count Direction
4
5
TIMER_TAMR_TACMR
GPTM Timer A Capture Mode
2
3
TIMER_TAMR_TAILD
GPTM Timer A Interval Load Write
8
9
TIMER_TAMR_TAMIE
GPTM Timer A Match Interrupt Enable
5
6
TIMER_TAMR_TAMR
GPTM Timer A Mode
0
2
TIMER_TAMR_TAMR_1_SHOT
One-Shot Timer mode
0x1
TIMER_TAMR_TAMR_PERIOD
Periodic Timer mode
0x2
TIMER_TAMR_TAMR_CAP
Capture mode
0x3
TIMER_TAMR_TAMRSU
GPTM Timer A Match Register Update
10
11
TIMER_TAMR_TAPLO
GPTM Timer A PWM Legacy Operation
11
12
TIMER_TAMR_TAPWMIE
GPTM Timer A PWM Interrupt Enable
9
10
TIMER_TAMR_TASNAPS
GPTM Timer A Snap-Shot Mode
7
8
TIMER_TAMR_TAWOT
GPTM Timer A Wait-on-Trigger
6
7
TAPMR
GPTM TimerA Prescale Match
0x40
-1
read-write
n
0x0
0x0
TIMER_TAPMR_TAPSMR
GPTM TimerA Prescale Match
0
8
TIMER_TAPMR_TAPSMRH
GPTM Timer A Prescale Match High Byte
8
16
TAPR
GPTM Timer A Prescale
0x38
-1
read-write
n
0x0
0x0
TIMER_TAPR_TAPSR
GPTM Timer A Prescale
0
8
TIMER_TAPR_TAPSRH
GPTM Timer A Prescale High Byte
8
16
TAPS
GPTM Timer A Prescale Snapshot
0x5C
-1
read-write
n
0x0
0x0
TIMER_TAPS_PSS
GPTM Timer A Prescaler Snapshot
0
16
TAPV
GPTM Timer A Prescale Value
0x64
-1
read-write
n
0x0
0x0
TIMER_TAPV_PSV
GPTM Timer A Prescaler Value
0
16
TAR
GPTM Timer A
0x48
-1
read-write
n
0x0
0x0
TAV
GPTM Timer A Value
0x50
-1
read-write
n
0x0
0x0
TBILR
GPTM Timer B Interval Load
0x2C
-1
read-write
n
0x0
0x0
TBMATCHR
GPTM Timer B Match
0x34
-1
read-write
n
0x0
0x0
TBMR
GPTM Timer B Mode
0x8
-1
read-write
n
0x0
0x0
TIMER_TBMR_TBAMS
GPTM Timer B Alternate Mode Select
3
4
TIMER_TBMR_TBCDIR
GPTM Timer B Count Direction
4
5
TIMER_TBMR_TBCMR
GPTM Timer B Capture Mode
2
3
TIMER_TBMR_TBILD
GPTM Timer B Interval Load Write
8
9
TIMER_TBMR_TBMIE
GPTM Timer B Match Interrupt Enable
5
6
TIMER_TBMR_TBMR
GPTM Timer B Mode
0
2
TIMER_TBMR_TBMR_1_SHOT
One-Shot Timer mode
0x1
TIMER_TBMR_TBMR_PERIOD
Periodic Timer mode
0x2
TIMER_TBMR_TBMR_CAP
Capture mode
0x3
TIMER_TBMR_TBMRSU
GPTM Timer B Match Register Update
10
11
TIMER_TBMR_TBPLO
GPTM Timer B PWM Legacy Operation
11
12
TIMER_TBMR_TBPWMIE
GPTM Timer B PWM Interrupt Enable
9
10
TIMER_TBMR_TBSNAPS
GPTM Timer B Snap-Shot Mode
7
8
TIMER_TBMR_TBWOT
GPTM Timer B Wait-on-Trigger
6
7
TBPMR
GPTM TimerB Prescale Match
0x44
-1
read-write
n
0x0
0x0
TIMER_TBPMR_TBPSMR
GPTM TimerB Prescale Match
0
8
TIMER_TBPMR_TBPSMRH
GPTM Timer B Prescale Match High Byte
8
16
TBPR
GPTM Timer B Prescale
0x3C
-1
read-write
n
0x0
0x0
TIMER_TBPR_TBPSR
GPTM Timer B Prescale
0
8
TIMER_TBPR_TBPSRH
GPTM Timer B Prescale High Byte
8
16
TBPS
GPTM Timer B Prescale Snapshot
0x60
-1
read-write
n
0x0
0x0
TIMER_TBPS_PSS
GPTM Timer A Prescaler Value
0
16
TBPV
GPTM Timer B Prescale Value
0x68
-1
read-write
n
0x0
0x0
TIMER_TBPV_PSV
GPTM Timer B Prescaler Value
0
16
TBR
GPTM Timer B
0x4C
-1
read-write
n
0x0
0x0
TBV
GPTM Timer B Value
0x54
-1
read-write
n
0x0
0x0
WTIMER0CFG
GPTM Configuration
0x0
read-write
n
0x0
0x0
TIMER_CFG
GPTM Configuration
0
3
TIMER_CFG_32_BIT_TIMER
For a 16/32-bit timer, this value selects the 32-bit timer configuration
0x0
TIMER_CFG_32_BIT_RTC
For a 16/32-bit timer, this value selects the 32-bit real-time clock (RTC) counter configuration
0x1
TIMER_CFG_16_BIT
For a 16/32-bit timer, this value selects the 16-bit timer configuration
0x4
WTIMER0CTL
GPTM Control
0xC
read-write
n
0x0
0x0
TIMER_CTL_RTCEN
GPTM RTC Stall Enable
4
5
TIMER_CTL_TAEN
GPTM Timer A Enable
0
1
TIMER_CTL_TAEVENT
GPTM Timer A Event Mode
2
4
TIMER_CTL_TAEVENT_POS
Positive edge
0x0
TIMER_CTL_TAEVENT_NEG
Negative edge
0x1
TIMER_CTL_TAEVENT_BOTH
Both edges
0x3
TIMER_CTL_TAOTE
GPTM Timer A Output Trigger Enable
5
6
TIMER_CTL_TAPWML
GPTM Timer A PWM Output Level
6
7
TIMER_CTL_TASTALL
GPTM Timer A Stall Enable
1
2
TIMER_CTL_TBEN
GPTM Timer B Enable
8
9
TIMER_CTL_TBEVENT
GPTM Timer B Event Mode
10
12
TIMER_CTL_TBEVENT_POS
Positive edge
0x0
TIMER_CTL_TBEVENT_NEG
Negative edge
0x1
TIMER_CTL_TBEVENT_BOTH
Both edges
0x3
TIMER_CTL_TBOTE
GPTM Timer B Output Trigger Enable
13
14
TIMER_CTL_TBPWML
GPTM Timer B PWM Output Level
14
15
TIMER_CTL_TBSTALL
GPTM Timer B Stall Enable
9
10
WTIMER0ICR
GPTM Interrupt Clear
0x24
write-only
n
0x0
0x0
TIMER_ICR_CAECINT
GPTM Timer A Capture Mode Event Interrupt Clear
2
3
write-only
TIMER_ICR_CAMCINT
GPTM Timer A Capture Mode Match Interrupt Clear
1
2
write-only
TIMER_ICR_CBECINT
GPTM Timer B Capture Mode Event Interrupt Clear
10
11
write-only
TIMER_ICR_CBMCINT
GPTM Timer B Capture Mode Match Interrupt Clear
9
10
write-only
TIMER_ICR_RTCCINT
GPTM RTC Interrupt Clear
3
4
write-only
TIMER_ICR_TAMCINT
GPTM Timer A Match Interrupt Clear
4
5
write-only
TIMER_ICR_TATOCINT
GPTM Timer A Time-Out Raw Interrupt
0
1
write-only
TIMER_ICR_TBMCINT
GPTM Timer B Match Interrupt Clear
11
12
write-only
TIMER_ICR_TBTOCINT
GPTM Timer B Time-Out Interrupt Clear
8
9
write-only
TIMER_ICR_WUECINT
32/64-Bit Wide GPTM Write Update Error Interrupt Clear
16
17
write-only
WTIMER0IMR
GPTM Interrupt Mask
0x18
read-write
n
0x0
0x0
TIMER_IMR_CAEIM
GPTM Timer A Capture Mode Event Interrupt Mask
2
3
TIMER_IMR_CAMIM
GPTM Timer A Capture Mode Match Interrupt Mask
1
2
TIMER_IMR_CBEIM
GPTM Timer B Capture Mode Event Interrupt Mask
10
11
TIMER_IMR_CBMIM
GPTM Timer B Capture Mode Match Interrupt Mask
9
10
TIMER_IMR_RTCIM
GPTM RTC Interrupt Mask
3
4
TIMER_IMR_TAMIM
GPTM Timer A Match Interrupt Mask
4
5
TIMER_IMR_TATOIM
GPTM Timer A Time-Out Interrupt Mask
0
1
TIMER_IMR_TBMIM
GPTM Timer B Match Interrupt Mask
11
12
TIMER_IMR_TBTOIM
GPTM Timer B Time-Out Interrupt Mask
8
9
TIMER_IMR_WUEIM
32/64-Bit Wide GPTM Write Update Error Interrupt Mask
16
17
WTIMER0MIS
GPTM Masked Interrupt Status
0x20
read-write
n
0x0
0x0
TIMER_MIS_CAEMIS
GPTM Timer A Capture Mode Event Masked Interrupt
2
3
TIMER_MIS_CAMMIS
GPTM Timer A Capture Mode Match Masked Interrupt
1
2
TIMER_MIS_CBEMIS
GPTM Timer B Capture Mode Event Masked Interrupt
10
11
TIMER_MIS_CBMMIS
GPTM Timer B Capture Mode Match Masked Interrupt
9
10
TIMER_MIS_RTCMIS
GPTM RTC Masked Interrupt
3
4
TIMER_MIS_TAMMIS
GPTM Timer A Match Masked Interrupt
4
5
TIMER_MIS_TATOMIS
GPTM Timer A Time-Out Masked Interrupt
0
1
TIMER_MIS_TBMMIS
GPTM Timer B Match Masked Interrupt
11
12
TIMER_MIS_TBTOMIS
GPTM Timer B Time-Out Masked Interrupt
8
9
TIMER_MIS_WUEMIS
32/64-Bit Wide GPTM Write Update Error Masked Interrupt Status
16
17
WTIMER0PP
GPTM Peripheral Properties
0xFC0
read-write
n
0x0
0x0
TIMER_PP_SIZE
Count Size
0
4
TIMER_PP_SIZE_16
Timer A and Timer B counters are 16 bits each with an 8-bit prescale counter
0x0
TIMER_PP_SIZE_32
Timer A and Timer B counters are 32 bits each with a 16-bit prescale counter
0x1
WTIMER0RIS
GPTM Raw Interrupt Status
0x1C
read-write
n
0x0
0x0
TIMER_RIS_CAERIS
GPTM Timer A Capture Mode Event Raw Interrupt
2
3
TIMER_RIS_CAMRIS
GPTM Timer A Capture Mode Match Raw Interrupt
1
2
TIMER_RIS_CBERIS
GPTM Timer B Capture Mode Event Raw Interrupt
10
11
TIMER_RIS_CBMRIS
GPTM Timer B Capture Mode Match Raw Interrupt
9
10
TIMER_RIS_RTCRIS
GPTM RTC Raw Interrupt
3
4
TIMER_RIS_TAMRIS
GPTM Timer A Match Raw Interrupt
4
5
TIMER_RIS_TATORIS
GPTM Timer A Time-Out Raw Interrupt
0
1
TIMER_RIS_TBMRIS
GPTM Timer B Match Raw Interrupt
11
12
TIMER_RIS_TBTORIS
GPTM Timer B Time-Out Raw Interrupt
8
9
TIMER_RIS_WUERIS
32/64-Bit Wide GPTM Write Update Error Raw Interrupt Status
16
17
WTIMER0RTCPD
GPTM RTC Predivide
0x58
read-write
n
0x0
0x0
TIMER_RTCPD_RTCPD
RTC Predivide Counter Value
0
16
WTIMER0SYNC
GPTM Synchronize
0x10
read-write
n
0x0
0x0
TIMER_SYNC_SYNCT0
Synchronize GPTM Timer 0
0
2
TIMER_SYNC_SYNCT0_NONE
GPTM0 is not affected
0x0
TIMER_SYNC_SYNCT0_TA
A timeout event for Timer A of GPTM0 is triggered
0x1
TIMER_SYNC_SYNCT0_TB
A timeout event for Timer B of GPTM0 is triggered
0x2
TIMER_SYNC_SYNCT0_TATB
A timeout event for both Timer A and Timer B of GPTM0 is triggered
0x3
TIMER_SYNC_SYNCT1
Synchronize GPTM Timer 1
2
4
TIMER_SYNC_SYNCT1_NONE
GPTM1 is not affected
0x0
TIMER_SYNC_SYNCT1_TA
A timeout event for Timer A of GPTM1 is triggered
0x1
TIMER_SYNC_SYNCT1_TB
A timeout event for Timer B of GPTM1 is triggered
0x2
TIMER_SYNC_SYNCT1_TATB
A timeout event for both Timer A and Timer B of GPTM1 is triggered
0x3
TIMER_SYNC_SYNCT2
Synchronize GPTM Timer 2
4
6
TIMER_SYNC_SYNCT2_NONE
GPTM2 is not affected
0x0
TIMER_SYNC_SYNCT2_TA
A timeout event for Timer A of GPTM2 is triggered
0x1
TIMER_SYNC_SYNCT2_TB
A timeout event for Timer B of GPTM2 is triggered
0x2
TIMER_SYNC_SYNCT2_TATB
A timeout event for both Timer A and Timer B of GPTM2 is triggered
0x3
TIMER_SYNC_SYNCT3
Synchronize GPTM Timer 3
6
8
TIMER_SYNC_SYNCT3_NONE
GPTM3 is not affected
0x0
TIMER_SYNC_SYNCT3_TA
A timeout event for Timer A of GPTM3 is triggered
0x1
TIMER_SYNC_SYNCT3_TB
A timeout event for Timer B of GPTM3 is triggered
0x2
TIMER_SYNC_SYNCT3_TATB
A timeout event for both Timer A and Timer B of GPTM3 is triggered
0x3
TIMER_SYNC_SYNCT4
Synchronize GPTM Timer 4
8
10
TIMER_SYNC_SYNCT4_NONE
GPTM4 is not affected
0x0
TIMER_SYNC_SYNCT4_TA
A timeout event for Timer A of GPTM4 is triggered
0x1
TIMER_SYNC_SYNCT4_TB
A timeout event for Timer B of GPTM4 is triggered
0x2
TIMER_SYNC_SYNCT4_TATB
A timeout event for both Timer A and Timer B of GPTM4 is triggered
0x3
TIMER_SYNC_SYNCT5
Synchronize GPTM Timer 5
10
12
TIMER_SYNC_SYNCT5_NONE
GPTM5 is not affected
0x0
TIMER_SYNC_SYNCT5_TA
A timeout event for Timer A of GPTM5 is triggered
0x1
TIMER_SYNC_SYNCT5_TB
A timeout event for Timer B of GPTM5 is triggered
0x2
TIMER_SYNC_SYNCT5_TATB
A timeout event for both Timer A and Timer B of GPTM5 is triggered
0x3
TIMER_SYNC_SYNCWT0
Synchronize GPTM 32/64-Bit Timer 0
12
14
TIMER_SYNC_SYNCWT0_NONE
GPTM 32/64-Bit Timer 0 is not affected
0x0
TIMER_SYNC_SYNCWT0_TA
A timeout event for Timer A of GPTM 32/64-Bit Timer 0 is triggered
0x1
TIMER_SYNC_SYNCWT0_TB
A timeout event for Timer B of GPTM 32/64-Bit Timer 0 is triggered
0x2
TIMER_SYNC_SYNCWT0_TATB
A timeout event for both Timer A and Timer B of GPTM 32/64-Bit Timer 0 is triggered
0x3
TIMER_SYNC_SYNCWT1
Synchronize GPTM 32/64-Bit Timer 1
14
16
TIMER_SYNC_SYNCWT1_NONE
GPTM 32/64-Bit Timer 1 is not affected
0x0
TIMER_SYNC_SYNCWT1_TA
A timeout event for Timer A of GPTM 32/64-Bit Timer 1 is triggered
0x1
TIMER_SYNC_SYNCWT1_TB
A timeout event for Timer B of GPTM 32/64-Bit Timer 1 is triggered
0x2
TIMER_SYNC_SYNCWT1_TATB
A timeout event for both Timer A and Timer B of GPTM 32/64-Bit Timer 1 is triggered
0x3
TIMER_SYNC_SYNCWT2
Synchronize GPTM 32/64-Bit Timer 2
16
18
TIMER_SYNC_SYNCWT2_NONE
GPTM 32/64-Bit Timer 2 is not affected
0x0
TIMER_SYNC_SYNCWT2_TA
A timeout event for Timer A of GPTM 32/64-Bit Timer 2 is triggered
0x1
TIMER_SYNC_SYNCWT2_TB
A timeout event for Timer B of GPTM 32/64-Bit Timer 2 is triggered
0x2
TIMER_SYNC_SYNCWT2_TATB
A timeout event for both Timer A and Timer B of GPTM 32/64-Bit Timer 2 is triggered
0x3
TIMER_SYNC_SYNCWT3
Synchronize GPTM 32/64-Bit Timer 3
18
20
TIMER_SYNC_SYNCWT3_NONE
GPTM 32/64-Bit Timer 3 is not affected
0x0
TIMER_SYNC_SYNCWT3_TA
A timeout event for Timer A of GPTM 32/64-Bit Timer 3 is triggered
0x1
TIMER_SYNC_SYNCWT3_TB
A timeout event for Timer B of GPTM 32/64-Bit Timer 3 is triggered
0x2
TIMER_SYNC_SYNCWT3_TATB
A timeout event for both Timer A and Timer B of GPTM 32/64-Bit Timer 3 is triggered
0x3
TIMER_SYNC_SYNCWT4
Synchronize GPTM 32/64-Bit Timer 4
20
22
TIMER_SYNC_SYNCWT4_NONE
GPTM 32/64-Bit Timer 4 is not affected
0x0
TIMER_SYNC_SYNCWT4_TA
A timeout event for Timer A of GPTM 32/64-Bit Timer 4 is triggered
0x1
TIMER_SYNC_SYNCWT4_TB
A timeout event for Timer B of GPTM 32/64-Bit Timer 4 is triggered
0x2
TIMER_SYNC_SYNCWT4_TATB
A timeout event for both Timer A and Timer B of GPTM 32/64-Bit Timer 4 is triggered
0x3
TIMER_SYNC_SYNCWT5
Synchronize GPTM 32/64-Bit Timer 5
22
24
TIMER_SYNC_SYNCWT5_NONE
GPTM 32/64-Bit Timer 5 is not affected
0x0
TIMER_SYNC_SYNCWT5_TA
A timeout event for Timer A of GPTM 32/64-Bit Timer 5 is triggered
0x1
TIMER_SYNC_SYNCWT5_TB
A timeout event for Timer B of GPTM 32/64-Bit Timer 5 is triggered
0x2
TIMER_SYNC_SYNCWT5_TATB
A timeout event for both Timer A and Timer B of GPTM 32/64-Bit Timer 5 is triggered
0x3
WTIMER0TAILR
GPTM Timer A Interval Load
0x28
read-write
n
0x0
0x0
WTIMER0TAMATCHR
GPTM Timer A Match
0x30
read-write
n
0x0
0x0
WTIMER0TAMR
GPTM Timer A Mode
0x4
read-write
n
0x0
0x0
TIMER_TAMR_TAAMS
GPTM Timer A Alternate Mode Select
3
4
TIMER_TAMR_TACDIR
GPTM Timer A Count Direction
4
5
TIMER_TAMR_TACMR
GPTM Timer A Capture Mode
2
3
TIMER_TAMR_TAILD
GPTM Timer A Interval Load Write
8
9
TIMER_TAMR_TAMIE
GPTM Timer A Match Interrupt Enable
5
6
TIMER_TAMR_TAMR
GPTM Timer A Mode
0
2
TIMER_TAMR_TAMR_1_SHOT
One-Shot Timer mode
0x1
TIMER_TAMR_TAMR_PERIOD
Periodic Timer mode
0x2
TIMER_TAMR_TAMR_CAP
Capture mode
0x3
TIMER_TAMR_TAMRSU
GPTM Timer A Match Register Update
10
11
TIMER_TAMR_TAPLO
GPTM Timer A PWM Legacy Operation
11
12
TIMER_TAMR_TAPWMIE
GPTM Timer A PWM Interrupt Enable
9
10
TIMER_TAMR_TASNAPS
GPTM Timer A Snap-Shot Mode
7
8
TIMER_TAMR_TAWOT
GPTM Timer A Wait-on-Trigger
6
7
WTIMER0TAPMR
GPTM TimerA Prescale Match
0x40
read-write
n
0x0
0x0
TIMER_TAPMR_TAPSMR
GPTM TimerA Prescale Match
0
8
TIMER_TAPMR_TAPSMRH
GPTM Timer A Prescale Match High Byte
8
16
WTIMER0TAPR
GPTM Timer A Prescale
0x38
read-write
n
0x0
0x0
TIMER_TAPR_TAPSR
GPTM Timer A Prescale
0
8
TIMER_TAPR_TAPSRH
GPTM Timer A Prescale High Byte
8
16
WTIMER0TAPS
GPTM Timer A Prescale Snapshot
0x5C
read-write
n
0x0
0x0
TIMER_TAPS_PSS
GPTM Timer A Prescaler Snapshot
0
16
WTIMER0TAPV
GPTM Timer A Prescale Value
0x64
read-write
n
0x0
0x0
TIMER_TAPV_PSV
GPTM Timer A Prescaler Value
0
16
WTIMER0TAR
GPTM Timer A
0x48
read-write
n
0x0
0x0
WTIMER0TAV
GPTM Timer A Value
0x50
read-write
n
0x0
0x0
WTIMER0TBILR
GPTM Timer B Interval Load
0x2C
read-write
n
0x0
0x0
WTIMER0TBMATCHR
GPTM Timer B Match
0x34
read-write
n
0x0
0x0
WTIMER0TBMR
GPTM Timer B Mode
0x8
read-write
n
0x0
0x0
TIMER_TBMR_TBAMS
GPTM Timer B Alternate Mode Select
3
4
TIMER_TBMR_TBCDIR
GPTM Timer B Count Direction
4
5
TIMER_TBMR_TBCMR
GPTM Timer B Capture Mode
2
3
TIMER_TBMR_TBILD
GPTM Timer B Interval Load Write
8
9
TIMER_TBMR_TBMIE
GPTM Timer B Match Interrupt Enable
5
6
TIMER_TBMR_TBMR
GPTM Timer B Mode
0
2
TIMER_TBMR_TBMR_1_SHOT
One-Shot Timer mode
0x1
TIMER_TBMR_TBMR_PERIOD
Periodic Timer mode
0x2
TIMER_TBMR_TBMR_CAP
Capture mode
0x3
TIMER_TBMR_TBMRSU
GPTM Timer B Match Register Update
10
11
TIMER_TBMR_TBPLO
GPTM Timer B PWM Legacy Operation
11
12
TIMER_TBMR_TBPWMIE
GPTM Timer B PWM Interrupt Enable
9
10
TIMER_TBMR_TBSNAPS
GPTM Timer B Snap-Shot Mode
7
8
TIMER_TBMR_TBWOT
GPTM Timer B Wait-on-Trigger
6
7
WTIMER0TBPMR
GPTM TimerB Prescale Match
0x44
read-write
n
0x0
0x0
TIMER_TBPMR_TBPSMR
GPTM TimerB Prescale Match
0
8
TIMER_TBPMR_TBPSMRH
GPTM Timer B Prescale Match High Byte
8
16
WTIMER0TBPR
GPTM Timer B Prescale
0x3C
read-write
n
0x0
0x0
TIMER_TBPR_TBPSR
GPTM Timer B Prescale
0
8
TIMER_TBPR_TBPSRH
GPTM Timer B Prescale High Byte
8
16
WTIMER0TBPS
GPTM Timer B Prescale Snapshot
0x60
read-write
n
0x0
0x0
TIMER_TBPS_PSS
GPTM Timer A Prescaler Value
0
16
WTIMER0TBPV
GPTM Timer B Prescale Value
0x68
read-write
n
0x0
0x0
TIMER_TBPV_PSV
GPTM Timer B Prescaler Value
0
16
WTIMER0TBR
GPTM Timer B
0x4C
read-write
n
0x0
0x0
WTIMER0TBV
GPTM Timer B Value
0x54
read-write
n
0x0
0x0
WTIMER1
Register map for TIMER0 peripheral
TIMER
0x0
0x0
0x1000
registers
n
WTIMER1A
96
WTIMER1B
97
CFG
GPTM Configuration
0x0
-1
read-write
n
0x0
0x0
TIMER_CFG
GPTM Configuration
0
3
TIMER_CFG_32_BIT_TIMER
For a 16/32-bit timer, this value selects the 32-bit timer configuration
0x0
TIMER_CFG_32_BIT_RTC
For a 16/32-bit timer, this value selects the 32-bit real-time clock (RTC) counter configuration
0x1
TIMER_CFG_16_BIT
For a 16/32-bit timer, this value selects the 16-bit timer configuration
0x4
CTL
GPTM Control
0xC
-1
read-write
n
0x0
0x0
TIMER_CTL_RTCEN
GPTM RTC Stall Enable
4
5
TIMER_CTL_TAEN
GPTM Timer A Enable
0
1
TIMER_CTL_TAEVENT
GPTM Timer A Event Mode
2
4
TIMER_CTL_TAEVENT_POS
Positive edge
0x0
TIMER_CTL_TAEVENT_NEG
Negative edge
0x1
TIMER_CTL_TAEVENT_BOTH
Both edges
0x3
TIMER_CTL_TAOTE
GPTM Timer A Output Trigger Enable
5
6
TIMER_CTL_TAPWML
GPTM Timer A PWM Output Level
6
7
TIMER_CTL_TASTALL
GPTM Timer A Stall Enable
1
2
TIMER_CTL_TBEN
GPTM Timer B Enable
8
9
TIMER_CTL_TBEVENT
GPTM Timer B Event Mode
10
12
TIMER_CTL_TBEVENT_POS
Positive edge
0x0
TIMER_CTL_TBEVENT_NEG
Negative edge
0x1
TIMER_CTL_TBEVENT_BOTH
Both edges
0x3
TIMER_CTL_TBOTE
GPTM Timer B Output Trigger Enable
13
14
TIMER_CTL_TBPWML
GPTM Timer B PWM Output Level
14
15
TIMER_CTL_TBSTALL
GPTM Timer B Stall Enable
9
10
ICR
GPTM Interrupt Clear
0x24
-1
write-only
n
0x0
0x0
TIMER_ICR_CAECINT
GPTM Timer A Capture Mode Event Interrupt Clear
2
3
write-only
TIMER_ICR_CAMCINT
GPTM Timer A Capture Mode Match Interrupt Clear
1
2
write-only
TIMER_ICR_CBECINT
GPTM Timer B Capture Mode Event Interrupt Clear
10
11
write-only
TIMER_ICR_CBMCINT
GPTM Timer B Capture Mode Match Interrupt Clear
9
10
write-only
TIMER_ICR_RTCCINT
GPTM RTC Interrupt Clear
3
4
write-only
TIMER_ICR_TAMCINT
GPTM Timer A Match Interrupt Clear
4
5
write-only
TIMER_ICR_TATOCINT
GPTM Timer A Time-Out Raw Interrupt
0
1
write-only
TIMER_ICR_TBMCINT
GPTM Timer B Match Interrupt Clear
11
12
write-only
TIMER_ICR_TBTOCINT
GPTM Timer B Time-Out Interrupt Clear
8
9
write-only
TIMER_ICR_WUECINT
32/64-Bit Wide GPTM Write Update Error Interrupt Clear
16
17
write-only
IMR
GPTM Interrupt Mask
0x18
-1
read-write
n
0x0
0x0
TIMER_IMR_CAEIM
GPTM Timer A Capture Mode Event Interrupt Mask
2
3
TIMER_IMR_CAMIM
GPTM Timer A Capture Mode Match Interrupt Mask
1
2
TIMER_IMR_CBEIM
GPTM Timer B Capture Mode Event Interrupt Mask
10
11
TIMER_IMR_CBMIM
GPTM Timer B Capture Mode Match Interrupt Mask
9
10
TIMER_IMR_RTCIM
GPTM RTC Interrupt Mask
3
4
TIMER_IMR_TAMIM
GPTM Timer A Match Interrupt Mask
4
5
TIMER_IMR_TATOIM
GPTM Timer A Time-Out Interrupt Mask
0
1
TIMER_IMR_TBMIM
GPTM Timer B Match Interrupt Mask
11
12
TIMER_IMR_TBTOIM
GPTM Timer B Time-Out Interrupt Mask
8
9
TIMER_IMR_WUEIM
32/64-Bit Wide GPTM Write Update Error Interrupt Mask
16
17
MIS
GPTM Masked Interrupt Status
0x20
-1
read-write
n
0x0
0x0
TIMER_MIS_CAEMIS
GPTM Timer A Capture Mode Event Masked Interrupt
2
3
TIMER_MIS_CAMMIS
GPTM Timer A Capture Mode Match Masked Interrupt
1
2
TIMER_MIS_CBEMIS
GPTM Timer B Capture Mode Event Masked Interrupt
10
11
TIMER_MIS_CBMMIS
GPTM Timer B Capture Mode Match Masked Interrupt
9
10
TIMER_MIS_RTCMIS
GPTM RTC Masked Interrupt
3
4
TIMER_MIS_TAMMIS
GPTM Timer A Match Masked Interrupt
4
5
TIMER_MIS_TATOMIS
GPTM Timer A Time-Out Masked Interrupt
0
1
TIMER_MIS_TBMMIS
GPTM Timer B Match Masked Interrupt
11
12
TIMER_MIS_TBTOMIS
GPTM Timer B Time-Out Masked Interrupt
8
9
TIMER_MIS_WUEMIS
32/64-Bit Wide GPTM Write Update Error Masked Interrupt Status
16
17
PP
GPTM Peripheral Properties
0xFC0
-1
read-write
n
0x0
0x0
TIMER_PP_SIZE
Count Size
0
4
TIMER_PP_SIZE_16
Timer A and Timer B counters are 16 bits each with an 8-bit prescale counter
0x0
TIMER_PP_SIZE_32
Timer A and Timer B counters are 32 bits each with a 16-bit prescale counter
0x1
RIS
GPTM Raw Interrupt Status
0x1C
-1
read-write
n
0x0
0x0
TIMER_RIS_CAERIS
GPTM Timer A Capture Mode Event Raw Interrupt
2
3
TIMER_RIS_CAMRIS
GPTM Timer A Capture Mode Match Raw Interrupt
1
2
TIMER_RIS_CBERIS
GPTM Timer B Capture Mode Event Raw Interrupt
10
11
TIMER_RIS_CBMRIS
GPTM Timer B Capture Mode Match Raw Interrupt
9
10
TIMER_RIS_RTCRIS
GPTM RTC Raw Interrupt
3
4
TIMER_RIS_TAMRIS
GPTM Timer A Match Raw Interrupt
4
5
TIMER_RIS_TATORIS
GPTM Timer A Time-Out Raw Interrupt
0
1
TIMER_RIS_TBMRIS
GPTM Timer B Match Raw Interrupt
11
12
TIMER_RIS_TBTORIS
GPTM Timer B Time-Out Raw Interrupt
8
9
TIMER_RIS_WUERIS
32/64-Bit Wide GPTM Write Update Error Raw Interrupt Status
16
17
RTCPD
GPTM RTC Predivide
0x58
-1
read-write
n
0x0
0x0
TIMER_RTCPD_RTCPD
RTC Predivide Counter Value
0
16
SYNC
GPTM Synchronize
0x10
-1
read-write
n
0x0
0x0
TIMER_SYNC_SYNCT0
Synchronize GPTM Timer 0
0
2
TIMER_SYNC_SYNCT0_NONE
GPTM0 is not affected
0x0
TIMER_SYNC_SYNCT0_TA
A timeout event for Timer A of GPTM0 is triggered
0x1
TIMER_SYNC_SYNCT0_TB
A timeout event for Timer B of GPTM0 is triggered
0x2
TIMER_SYNC_SYNCT0_TATB
A timeout event for both Timer A and Timer B of GPTM0 is triggered
0x3
TIMER_SYNC_SYNCT1
Synchronize GPTM Timer 1
2
4
TIMER_SYNC_SYNCT1_NONE
GPTM1 is not affected
0x0
TIMER_SYNC_SYNCT1_TA
A timeout event for Timer A of GPTM1 is triggered
0x1
TIMER_SYNC_SYNCT1_TB
A timeout event for Timer B of GPTM1 is triggered
0x2
TIMER_SYNC_SYNCT1_TATB
A timeout event for both Timer A and Timer B of GPTM1 is triggered
0x3
TIMER_SYNC_SYNCT2
Synchronize GPTM Timer 2
4
6
TIMER_SYNC_SYNCT2_NONE
GPTM2 is not affected
0x0
TIMER_SYNC_SYNCT2_TA
A timeout event for Timer A of GPTM2 is triggered
0x1
TIMER_SYNC_SYNCT2_TB
A timeout event for Timer B of GPTM2 is triggered
0x2
TIMER_SYNC_SYNCT2_TATB
A timeout event for both Timer A and Timer B of GPTM2 is triggered
0x3
TIMER_SYNC_SYNCT3
Synchronize GPTM Timer 3
6
8
TIMER_SYNC_SYNCT3_NONE
GPTM3 is not affected
0x0
TIMER_SYNC_SYNCT3_TA
A timeout event for Timer A of GPTM3 is triggered
0x1
TIMER_SYNC_SYNCT3_TB
A timeout event for Timer B of GPTM3 is triggered
0x2
TIMER_SYNC_SYNCT3_TATB
A timeout event for both Timer A and Timer B of GPTM3 is triggered
0x3
TIMER_SYNC_SYNCT4
Synchronize GPTM Timer 4
8
10
TIMER_SYNC_SYNCT4_NONE
GPTM4 is not affected
0x0
TIMER_SYNC_SYNCT4_TA
A timeout event for Timer A of GPTM4 is triggered
0x1
TIMER_SYNC_SYNCT4_TB
A timeout event for Timer B of GPTM4 is triggered
0x2
TIMER_SYNC_SYNCT4_TATB
A timeout event for both Timer A and Timer B of GPTM4 is triggered
0x3
TIMER_SYNC_SYNCT5
Synchronize GPTM Timer 5
10
12
TIMER_SYNC_SYNCT5_NONE
GPTM5 is not affected
0x0
TIMER_SYNC_SYNCT5_TA
A timeout event for Timer A of GPTM5 is triggered
0x1
TIMER_SYNC_SYNCT5_TB
A timeout event for Timer B of GPTM5 is triggered
0x2
TIMER_SYNC_SYNCT5_TATB
A timeout event for both Timer A and Timer B of GPTM5 is triggered
0x3
TIMER_SYNC_SYNCWT0
Synchronize GPTM 32/64-Bit Timer 0
12
14
TIMER_SYNC_SYNCWT0_NONE
GPTM 32/64-Bit Timer 0 is not affected
0x0
TIMER_SYNC_SYNCWT0_TA
A timeout event for Timer A of GPTM 32/64-Bit Timer 0 is triggered
0x1
TIMER_SYNC_SYNCWT0_TB
A timeout event for Timer B of GPTM 32/64-Bit Timer 0 is triggered
0x2
TIMER_SYNC_SYNCWT0_TATB
A timeout event for both Timer A and Timer B of GPTM 32/64-Bit Timer 0 is triggered
0x3
TIMER_SYNC_SYNCWT1
Synchronize GPTM 32/64-Bit Timer 1
14
16
TIMER_SYNC_SYNCWT1_NONE
GPTM 32/64-Bit Timer 1 is not affected
0x0
TIMER_SYNC_SYNCWT1_TA
A timeout event for Timer A of GPTM 32/64-Bit Timer 1 is triggered
0x1
TIMER_SYNC_SYNCWT1_TB
A timeout event for Timer B of GPTM 32/64-Bit Timer 1 is triggered
0x2
TIMER_SYNC_SYNCWT1_TATB
A timeout event for both Timer A and Timer B of GPTM 32/64-Bit Timer 1 is triggered
0x3
TIMER_SYNC_SYNCWT2
Synchronize GPTM 32/64-Bit Timer 2
16
18
TIMER_SYNC_SYNCWT2_NONE
GPTM 32/64-Bit Timer 2 is not affected
0x0
TIMER_SYNC_SYNCWT2_TA
A timeout event for Timer A of GPTM 32/64-Bit Timer 2 is triggered
0x1
TIMER_SYNC_SYNCWT2_TB
A timeout event for Timer B of GPTM 32/64-Bit Timer 2 is triggered
0x2
TIMER_SYNC_SYNCWT2_TATB
A timeout event for both Timer A and Timer B of GPTM 32/64-Bit Timer 2 is triggered
0x3
TIMER_SYNC_SYNCWT3
Synchronize GPTM 32/64-Bit Timer 3
18
20
TIMER_SYNC_SYNCWT3_NONE
GPTM 32/64-Bit Timer 3 is not affected
0x0
TIMER_SYNC_SYNCWT3_TA
A timeout event for Timer A of GPTM 32/64-Bit Timer 3 is triggered
0x1
TIMER_SYNC_SYNCWT3_TB
A timeout event for Timer B of GPTM 32/64-Bit Timer 3 is triggered
0x2
TIMER_SYNC_SYNCWT3_TATB
A timeout event for both Timer A and Timer B of GPTM 32/64-Bit Timer 3 is triggered
0x3
TIMER_SYNC_SYNCWT4
Synchronize GPTM 32/64-Bit Timer 4
20
22
TIMER_SYNC_SYNCWT4_NONE
GPTM 32/64-Bit Timer 4 is not affected
0x0
TIMER_SYNC_SYNCWT4_TA
A timeout event for Timer A of GPTM 32/64-Bit Timer 4 is triggered
0x1
TIMER_SYNC_SYNCWT4_TB
A timeout event for Timer B of GPTM 32/64-Bit Timer 4 is triggered
0x2
TIMER_SYNC_SYNCWT4_TATB
A timeout event for both Timer A and Timer B of GPTM 32/64-Bit Timer 4 is triggered
0x3
TIMER_SYNC_SYNCWT5
Synchronize GPTM 32/64-Bit Timer 5
22
24
TIMER_SYNC_SYNCWT5_NONE
GPTM 32/64-Bit Timer 5 is not affected
0x0
TIMER_SYNC_SYNCWT5_TA
A timeout event for Timer A of GPTM 32/64-Bit Timer 5 is triggered
0x1
TIMER_SYNC_SYNCWT5_TB
A timeout event for Timer B of GPTM 32/64-Bit Timer 5 is triggered
0x2
TIMER_SYNC_SYNCWT5_TATB
A timeout event for both Timer A and Timer B of GPTM 32/64-Bit Timer 5 is triggered
0x3
TAILR
GPTM Timer A Interval Load
0x28
-1
read-write
n
0x0
0x0
TAMATCHR
GPTM Timer A Match
0x30
-1
read-write
n
0x0
0x0
TAMR
GPTM Timer A Mode
0x4
-1
read-write
n
0x0
0x0
TIMER_TAMR_TAAMS
GPTM Timer A Alternate Mode Select
3
4
TIMER_TAMR_TACDIR
GPTM Timer A Count Direction
4
5
TIMER_TAMR_TACMR
GPTM Timer A Capture Mode
2
3
TIMER_TAMR_TAILD
GPTM Timer A Interval Load Write
8
9
TIMER_TAMR_TAMIE
GPTM Timer A Match Interrupt Enable
5
6
TIMER_TAMR_TAMR
GPTM Timer A Mode
0
2
TIMER_TAMR_TAMR_1_SHOT
One-Shot Timer mode
0x1
TIMER_TAMR_TAMR_PERIOD
Periodic Timer mode
0x2
TIMER_TAMR_TAMR_CAP
Capture mode
0x3
TIMER_TAMR_TAMRSU
GPTM Timer A Match Register Update
10
11
TIMER_TAMR_TAPLO
GPTM Timer A PWM Legacy Operation
11
12
TIMER_TAMR_TAPWMIE
GPTM Timer A PWM Interrupt Enable
9
10
TIMER_TAMR_TASNAPS
GPTM Timer A Snap-Shot Mode
7
8
TIMER_TAMR_TAWOT
GPTM Timer A Wait-on-Trigger
6
7
TAPMR
GPTM TimerA Prescale Match
0x40
-1
read-write
n
0x0
0x0
TIMER_TAPMR_TAPSMR
GPTM TimerA Prescale Match
0
8
TIMER_TAPMR_TAPSMRH
GPTM Timer A Prescale Match High Byte
8
16
TAPR
GPTM Timer A Prescale
0x38
-1
read-write
n
0x0
0x0
TIMER_TAPR_TAPSR
GPTM Timer A Prescale
0
8
TIMER_TAPR_TAPSRH
GPTM Timer A Prescale High Byte
8
16
TAPS
GPTM Timer A Prescale Snapshot
0x5C
-1
read-write
n
0x0
0x0
TIMER_TAPS_PSS
GPTM Timer A Prescaler Snapshot
0
16
TAPV
GPTM Timer A Prescale Value
0x64
-1
read-write
n
0x0
0x0
TIMER_TAPV_PSV
GPTM Timer A Prescaler Value
0
16
TAR
GPTM Timer A
0x48
-1
read-write
n
0x0
0x0
TAV
GPTM Timer A Value
0x50
-1
read-write
n
0x0
0x0
TBILR
GPTM Timer B Interval Load
0x2C
-1
read-write
n
0x0
0x0
TBMATCHR
GPTM Timer B Match
0x34
-1
read-write
n
0x0
0x0
TBMR
GPTM Timer B Mode
0x8
-1
read-write
n
0x0
0x0
TIMER_TBMR_TBAMS
GPTM Timer B Alternate Mode Select
3
4
TIMER_TBMR_TBCDIR
GPTM Timer B Count Direction
4
5
TIMER_TBMR_TBCMR
GPTM Timer B Capture Mode
2
3
TIMER_TBMR_TBILD
GPTM Timer B Interval Load Write
8
9
TIMER_TBMR_TBMIE
GPTM Timer B Match Interrupt Enable
5
6
TIMER_TBMR_TBMR
GPTM Timer B Mode
0
2
TIMER_TBMR_TBMR_1_SHOT
One-Shot Timer mode
0x1
TIMER_TBMR_TBMR_PERIOD
Periodic Timer mode
0x2
TIMER_TBMR_TBMR_CAP
Capture mode
0x3
TIMER_TBMR_TBMRSU
GPTM Timer B Match Register Update
10
11
TIMER_TBMR_TBPLO
GPTM Timer B PWM Legacy Operation
11
12
TIMER_TBMR_TBPWMIE
GPTM Timer B PWM Interrupt Enable
9
10
TIMER_TBMR_TBSNAPS
GPTM Timer B Snap-Shot Mode
7
8
TIMER_TBMR_TBWOT
GPTM Timer B Wait-on-Trigger
6
7
TBPMR
GPTM TimerB Prescale Match
0x44
-1
read-write
n
0x0
0x0
TIMER_TBPMR_TBPSMR
GPTM TimerB Prescale Match
0
8
TIMER_TBPMR_TBPSMRH
GPTM Timer B Prescale Match High Byte
8
16
TBPR
GPTM Timer B Prescale
0x3C
-1
read-write
n
0x0
0x0
TIMER_TBPR_TBPSR
GPTM Timer B Prescale
0
8
TIMER_TBPR_TBPSRH
GPTM Timer B Prescale High Byte
8
16
TBPS
GPTM Timer B Prescale Snapshot
0x60
-1
read-write
n
0x0
0x0
TIMER_TBPS_PSS
GPTM Timer A Prescaler Value
0
16
TBPV
GPTM Timer B Prescale Value
0x68
-1
read-write
n
0x0
0x0
TIMER_TBPV_PSV
GPTM Timer B Prescaler Value
0
16
TBR
GPTM Timer B
0x4C
-1
read-write
n
0x0
0x0
TBV
GPTM Timer B Value
0x54
-1
read-write
n
0x0
0x0
TIMER0CFG
GPTM Configuration
0x0
read-write
n
0x0
0x0
TIMER_CFG
GPTM Configuration
0
3
TIMER_CFG_32_BIT_TIMER
For a 16/32-bit timer, this value selects the 32-bit timer configuration
0x0
TIMER_CFG_32_BIT_RTC
For a 16/32-bit timer, this value selects the 32-bit real-time clock (RTC) counter configuration
0x1
TIMER_CFG_16_BIT
For a 16/32-bit timer, this value selects the 16-bit timer configuration
0x4
TIMER0CTL
GPTM Control
0xC
read-write
n
0x0
0x0
TIMER_CTL_RTCEN
GPTM RTC Stall Enable
4
5
TIMER_CTL_TAEN
GPTM Timer A Enable
0
1
TIMER_CTL_TAEVENT
GPTM Timer A Event Mode
2
4
TIMER_CTL_TAEVENT_POS
Positive edge
0x0
TIMER_CTL_TAEVENT_NEG
Negative edge
0x1
TIMER_CTL_TAEVENT_BOTH
Both edges
0x3
TIMER_CTL_TAOTE
GPTM Timer A Output Trigger Enable
5
6
TIMER_CTL_TAPWML
GPTM Timer A PWM Output Level
6
7
TIMER_CTL_TASTALL
GPTM Timer A Stall Enable
1
2
TIMER_CTL_TBEN
GPTM Timer B Enable
8
9
TIMER_CTL_TBEVENT
GPTM Timer B Event Mode
10
12
TIMER_CTL_TBEVENT_POS
Positive edge
0x0
TIMER_CTL_TBEVENT_NEG
Negative edge
0x1
TIMER_CTL_TBEVENT_BOTH
Both edges
0x3
TIMER_CTL_TBOTE
GPTM Timer B Output Trigger Enable
13
14
TIMER_CTL_TBPWML
GPTM Timer B PWM Output Level
14
15
TIMER_CTL_TBSTALL
GPTM Timer B Stall Enable
9
10
TIMER0ICR
GPTM Interrupt Clear
0x24
write-only
n
0x0
0x0
TIMER_ICR_CAECINT
GPTM Timer A Capture Mode Event Interrupt Clear
2
3
write-only
TIMER_ICR_CAMCINT
GPTM Timer A Capture Mode Match Interrupt Clear
1
2
write-only
TIMER_ICR_CBECINT
GPTM Timer B Capture Mode Event Interrupt Clear
10
11
write-only
TIMER_ICR_CBMCINT
GPTM Timer B Capture Mode Match Interrupt Clear
9
10
write-only
TIMER_ICR_RTCCINT
GPTM RTC Interrupt Clear
3
4
write-only
TIMER_ICR_TAMCINT
GPTM Timer A Match Interrupt Clear
4
5
write-only
TIMER_ICR_TATOCINT
GPTM Timer A Time-Out Raw Interrupt
0
1
write-only
TIMER_ICR_TBMCINT
GPTM Timer B Match Interrupt Clear
11
12
write-only
TIMER_ICR_TBTOCINT
GPTM Timer B Time-Out Interrupt Clear
8
9
write-only
TIMER_ICR_WUECINT
32/64-Bit Wide GPTM Write Update Error Interrupt Clear
16
17
write-only
TIMER0IMR
GPTM Interrupt Mask
0x18
read-write
n
0x0
0x0
TIMER_IMR_CAEIM
GPTM Timer A Capture Mode Event Interrupt Mask
2
3
TIMER_IMR_CAMIM
GPTM Timer A Capture Mode Match Interrupt Mask
1
2
TIMER_IMR_CBEIM
GPTM Timer B Capture Mode Event Interrupt Mask
10
11
TIMER_IMR_CBMIM
GPTM Timer B Capture Mode Match Interrupt Mask
9
10
TIMER_IMR_RTCIM
GPTM RTC Interrupt Mask
3
4
TIMER_IMR_TAMIM
GPTM Timer A Match Interrupt Mask
4
5
TIMER_IMR_TATOIM
GPTM Timer A Time-Out Interrupt Mask
0
1
TIMER_IMR_TBMIM
GPTM Timer B Match Interrupt Mask
11
12
TIMER_IMR_TBTOIM
GPTM Timer B Time-Out Interrupt Mask
8
9
TIMER_IMR_WUEIM
32/64-Bit Wide GPTM Write Update Error Interrupt Mask
16
17
TIMER0MIS
GPTM Masked Interrupt Status
0x20
read-write
n
0x0
0x0
TIMER_MIS_CAEMIS
GPTM Timer A Capture Mode Event Masked Interrupt
2
3
TIMER_MIS_CAMMIS
GPTM Timer A Capture Mode Match Masked Interrupt
1
2
TIMER_MIS_CBEMIS
GPTM Timer B Capture Mode Event Masked Interrupt
10
11
TIMER_MIS_CBMMIS
GPTM Timer B Capture Mode Match Masked Interrupt
9
10
TIMER_MIS_RTCMIS
GPTM RTC Masked Interrupt
3
4
TIMER_MIS_TAMMIS
GPTM Timer A Match Masked Interrupt
4
5
TIMER_MIS_TATOMIS
GPTM Timer A Time-Out Masked Interrupt
0
1
TIMER_MIS_TBMMIS
GPTM Timer B Match Masked Interrupt
11
12
TIMER_MIS_TBTOMIS
GPTM Timer B Time-Out Masked Interrupt
8
9
TIMER_MIS_WUEMIS
32/64-Bit Wide GPTM Write Update Error Masked Interrupt Status
16
17
TIMER0PP
GPTM Peripheral Properties
0xFC0
read-write
n
0x0
0x0
TIMER_PP_SIZE
Count Size
0
4
TIMER_PP_SIZE_16
Timer A and Timer B counters are 16 bits each with an 8-bit prescale counter
0x0
TIMER_PP_SIZE_32
Timer A and Timer B counters are 32 bits each with a 16-bit prescale counter
0x1
TIMER0RIS
GPTM Raw Interrupt Status
0x1C
read-write
n
0x0
0x0
TIMER_RIS_CAERIS
GPTM Timer A Capture Mode Event Raw Interrupt
2
3
TIMER_RIS_CAMRIS
GPTM Timer A Capture Mode Match Raw Interrupt
1
2
TIMER_RIS_CBERIS
GPTM Timer B Capture Mode Event Raw Interrupt
10
11
TIMER_RIS_CBMRIS
GPTM Timer B Capture Mode Match Raw Interrupt
9
10
TIMER_RIS_RTCRIS
GPTM RTC Raw Interrupt
3
4
TIMER_RIS_TAMRIS
GPTM Timer A Match Raw Interrupt
4
5
TIMER_RIS_TATORIS
GPTM Timer A Time-Out Raw Interrupt
0
1
TIMER_RIS_TBMRIS
GPTM Timer B Match Raw Interrupt
11
12
TIMER_RIS_TBTORIS
GPTM Timer B Time-Out Raw Interrupt
8
9
TIMER_RIS_WUERIS
32/64-Bit Wide GPTM Write Update Error Raw Interrupt Status
16
17
TIMER0RTCPD
GPTM RTC Predivide
0x58
read-write
n
0x0
0x0
TIMER_RTCPD_RTCPD
RTC Predivide Counter Value
0
16
TIMER0SYNC
GPTM Synchronize
0x10
read-write
n
0x0
0x0
TIMER_SYNC_SYNCT0
Synchronize GPTM Timer 0
0
2
TIMER_SYNC_SYNCT0_NONE
GPTM0 is not affected
0x0
TIMER_SYNC_SYNCT0_TA
A timeout event for Timer A of GPTM0 is triggered
0x1
TIMER_SYNC_SYNCT0_TB
A timeout event for Timer B of GPTM0 is triggered
0x2
TIMER_SYNC_SYNCT0_TATB
A timeout event for both Timer A and Timer B of GPTM0 is triggered
0x3
TIMER_SYNC_SYNCT1
Synchronize GPTM Timer 1
2
4
TIMER_SYNC_SYNCT1_NONE
GPTM1 is not affected
0x0
TIMER_SYNC_SYNCT1_TA
A timeout event for Timer A of GPTM1 is triggered
0x1
TIMER_SYNC_SYNCT1_TB
A timeout event for Timer B of GPTM1 is triggered
0x2
TIMER_SYNC_SYNCT1_TATB
A timeout event for both Timer A and Timer B of GPTM1 is triggered
0x3
TIMER_SYNC_SYNCT2
Synchronize GPTM Timer 2
4
6
TIMER_SYNC_SYNCT2_NONE
GPTM2 is not affected
0x0
TIMER_SYNC_SYNCT2_TA
A timeout event for Timer A of GPTM2 is triggered
0x1
TIMER_SYNC_SYNCT2_TB
A timeout event for Timer B of GPTM2 is triggered
0x2
TIMER_SYNC_SYNCT2_TATB
A timeout event for both Timer A and Timer B of GPTM2 is triggered
0x3
TIMER_SYNC_SYNCT3
Synchronize GPTM Timer 3
6
8
TIMER_SYNC_SYNCT3_NONE
GPTM3 is not affected
0x0
TIMER_SYNC_SYNCT3_TA
A timeout event for Timer A of GPTM3 is triggered
0x1
TIMER_SYNC_SYNCT3_TB
A timeout event for Timer B of GPTM3 is triggered
0x2
TIMER_SYNC_SYNCT3_TATB
A timeout event for both Timer A and Timer B of GPTM3 is triggered
0x3
TIMER_SYNC_SYNCT4
Synchronize GPTM Timer 4
8
10
TIMER_SYNC_SYNCT4_NONE
GPTM4 is not affected
0x0
TIMER_SYNC_SYNCT4_TA
A timeout event for Timer A of GPTM4 is triggered
0x1
TIMER_SYNC_SYNCT4_TB
A timeout event for Timer B of GPTM4 is triggered
0x2
TIMER_SYNC_SYNCT4_TATB
A timeout event for both Timer A and Timer B of GPTM4 is triggered
0x3
TIMER_SYNC_SYNCT5
Synchronize GPTM Timer 5
10
12
TIMER_SYNC_SYNCT5_NONE
GPTM5 is not affected
0x0
TIMER_SYNC_SYNCT5_TA
A timeout event for Timer A of GPTM5 is triggered
0x1
TIMER_SYNC_SYNCT5_TB
A timeout event for Timer B of GPTM5 is triggered
0x2
TIMER_SYNC_SYNCT5_TATB
A timeout event for both Timer A and Timer B of GPTM5 is triggered
0x3
TIMER_SYNC_SYNCWT0
Synchronize GPTM 32/64-Bit Timer 0
12
14
TIMER_SYNC_SYNCWT0_NONE
GPTM 32/64-Bit Timer 0 is not affected
0x0
TIMER_SYNC_SYNCWT0_TA
A timeout event for Timer A of GPTM 32/64-Bit Timer 0 is triggered
0x1
TIMER_SYNC_SYNCWT0_TB
A timeout event for Timer B of GPTM 32/64-Bit Timer 0 is triggered
0x2
TIMER_SYNC_SYNCWT0_TATB
A timeout event for both Timer A and Timer B of GPTM 32/64-Bit Timer 0 is triggered
0x3
TIMER_SYNC_SYNCWT1
Synchronize GPTM 32/64-Bit Timer 1
14
16
TIMER_SYNC_SYNCWT1_NONE
GPTM 32/64-Bit Timer 1 is not affected
0x0
TIMER_SYNC_SYNCWT1_TA
A timeout event for Timer A of GPTM 32/64-Bit Timer 1 is triggered
0x1
TIMER_SYNC_SYNCWT1_TB
A timeout event for Timer B of GPTM 32/64-Bit Timer 1 is triggered
0x2
TIMER_SYNC_SYNCWT1_TATB
A timeout event for both Timer A and Timer B of GPTM 32/64-Bit Timer 1 is triggered
0x3
TIMER_SYNC_SYNCWT2
Synchronize GPTM 32/64-Bit Timer 2
16
18
TIMER_SYNC_SYNCWT2_NONE
GPTM 32/64-Bit Timer 2 is not affected
0x0
TIMER_SYNC_SYNCWT2_TA
A timeout event for Timer A of GPTM 32/64-Bit Timer 2 is triggered
0x1
TIMER_SYNC_SYNCWT2_TB
A timeout event for Timer B of GPTM 32/64-Bit Timer 2 is triggered
0x2
TIMER_SYNC_SYNCWT2_TATB
A timeout event for both Timer A and Timer B of GPTM 32/64-Bit Timer 2 is triggered
0x3
TIMER_SYNC_SYNCWT3
Synchronize GPTM 32/64-Bit Timer 3
18
20
TIMER_SYNC_SYNCWT3_NONE
GPTM 32/64-Bit Timer 3 is not affected
0x0
TIMER_SYNC_SYNCWT3_TA
A timeout event for Timer A of GPTM 32/64-Bit Timer 3 is triggered
0x1
TIMER_SYNC_SYNCWT3_TB
A timeout event for Timer B of GPTM 32/64-Bit Timer 3 is triggered
0x2
TIMER_SYNC_SYNCWT3_TATB
A timeout event for both Timer A and Timer B of GPTM 32/64-Bit Timer 3 is triggered
0x3
TIMER_SYNC_SYNCWT4
Synchronize GPTM 32/64-Bit Timer 4
20
22
TIMER_SYNC_SYNCWT4_NONE
GPTM 32/64-Bit Timer 4 is not affected
0x0
TIMER_SYNC_SYNCWT4_TA
A timeout event for Timer A of GPTM 32/64-Bit Timer 4 is triggered
0x1
TIMER_SYNC_SYNCWT4_TB
A timeout event for Timer B of GPTM 32/64-Bit Timer 4 is triggered
0x2
TIMER_SYNC_SYNCWT4_TATB
A timeout event for both Timer A and Timer B of GPTM 32/64-Bit Timer 4 is triggered
0x3
TIMER_SYNC_SYNCWT5
Synchronize GPTM 32/64-Bit Timer 5
22
24
TIMER_SYNC_SYNCWT5_NONE
GPTM 32/64-Bit Timer 5 is not affected
0x0
TIMER_SYNC_SYNCWT5_TA
A timeout event for Timer A of GPTM 32/64-Bit Timer 5 is triggered
0x1
TIMER_SYNC_SYNCWT5_TB
A timeout event for Timer B of GPTM 32/64-Bit Timer 5 is triggered
0x2
TIMER_SYNC_SYNCWT5_TATB
A timeout event for both Timer A and Timer B of GPTM 32/64-Bit Timer 5 is triggered
0x3
TIMER0TAILR
GPTM Timer A Interval Load
0x28
read-write
n
0x0
0x0
TIMER0TAMATCHR
GPTM Timer A Match
0x30
read-write
n
0x0
0x0
TIMER0TAMR
GPTM Timer A Mode
0x4
read-write
n
0x0
0x0
TIMER_TAMR_TAAMS
GPTM Timer A Alternate Mode Select
3
4
TIMER_TAMR_TACDIR
GPTM Timer A Count Direction
4
5
TIMER_TAMR_TACMR
GPTM Timer A Capture Mode
2
3
TIMER_TAMR_TAILD
GPTM Timer A Interval Load Write
8
9
TIMER_TAMR_TAMIE
GPTM Timer A Match Interrupt Enable
5
6
TIMER_TAMR_TAMR
GPTM Timer A Mode
0
2
TIMER_TAMR_TAMR_1_SHOT
One-Shot Timer mode
0x1
TIMER_TAMR_TAMR_PERIOD
Periodic Timer mode
0x2
TIMER_TAMR_TAMR_CAP
Capture mode
0x3
TIMER_TAMR_TAMRSU
GPTM Timer A Match Register Update
10
11
TIMER_TAMR_TAPLO
GPTM Timer A PWM Legacy Operation
11
12
TIMER_TAMR_TAPWMIE
GPTM Timer A PWM Interrupt Enable
9
10
TIMER_TAMR_TASNAPS
GPTM Timer A Snap-Shot Mode
7
8
TIMER_TAMR_TAWOT
GPTM Timer A Wait-on-Trigger
6
7
TIMER0TAPMR
GPTM TimerA Prescale Match
0x40
read-write
n
0x0
0x0
TIMER_TAPMR_TAPSMR
GPTM TimerA Prescale Match
0
8
TIMER_TAPMR_TAPSMRH
GPTM Timer A Prescale Match High Byte
8
16
TIMER0TAPR
GPTM Timer A Prescale
0x38
read-write
n
0x0
0x0
TIMER_TAPR_TAPSR
GPTM Timer A Prescale
0
8
TIMER_TAPR_TAPSRH
GPTM Timer A Prescale High Byte
8
16
TIMER0TAPS
GPTM Timer A Prescale Snapshot
0x5C
read-write
n
0x0
0x0
TIMER_TAPS_PSS
GPTM Timer A Prescaler Snapshot
0
16
TIMER0TAPV
GPTM Timer A Prescale Value
0x64
read-write
n
0x0
0x0
TIMER_TAPV_PSV
GPTM Timer A Prescaler Value
0
16
TIMER0TAR
GPTM Timer A
0x48
read-write
n
0x0
0x0
TIMER0TAV
GPTM Timer A Value
0x50
read-write
n
0x0
0x0
TIMER0TBILR
GPTM Timer B Interval Load
0x2C
read-write
n
0x0
0x0
TIMER0TBMATCHR
GPTM Timer B Match
0x34
read-write
n
0x0
0x0
TIMER0TBMR
GPTM Timer B Mode
0x8
read-write
n
0x0
0x0
TIMER_TBMR_TBAMS
GPTM Timer B Alternate Mode Select
3
4
TIMER_TBMR_TBCDIR
GPTM Timer B Count Direction
4
5
TIMER_TBMR_TBCMR
GPTM Timer B Capture Mode
2
3
TIMER_TBMR_TBILD
GPTM Timer B Interval Load Write
8
9
TIMER_TBMR_TBMIE
GPTM Timer B Match Interrupt Enable
5
6
TIMER_TBMR_TBMR
GPTM Timer B Mode
0
2
TIMER_TBMR_TBMR_1_SHOT
One-Shot Timer mode
0x1
TIMER_TBMR_TBMR_PERIOD
Periodic Timer mode
0x2
TIMER_TBMR_TBMR_CAP
Capture mode
0x3
TIMER_TBMR_TBMRSU
GPTM Timer B Match Register Update
10
11
TIMER_TBMR_TBPLO
GPTM Timer B PWM Legacy Operation
11
12
TIMER_TBMR_TBPWMIE
GPTM Timer B PWM Interrupt Enable
9
10
TIMER_TBMR_TBSNAPS
GPTM Timer B Snap-Shot Mode
7
8
TIMER_TBMR_TBWOT
GPTM Timer B Wait-on-Trigger
6
7
TIMER0TBPMR
GPTM TimerB Prescale Match
0x44
read-write
n
0x0
0x0
TIMER_TBPMR_TBPSMR
GPTM TimerB Prescale Match
0
8
TIMER_TBPMR_TBPSMRH
GPTM Timer B Prescale Match High Byte
8
16
TIMER0TBPR
GPTM Timer B Prescale
0x3C
read-write
n
0x0
0x0
TIMER_TBPR_TBPSR
GPTM Timer B Prescale
0
8
TIMER_TBPR_TBPSRH
GPTM Timer B Prescale High Byte
8
16
TIMER0TBPS
GPTM Timer B Prescale Snapshot
0x60
read-write
n
0x0
0x0
TIMER_TBPS_PSS
GPTM Timer A Prescaler Value
0
16
TIMER0TBPV
GPTM Timer B Prescale Value
0x68
read-write
n
0x0
0x0
TIMER_TBPV_PSV
GPTM Timer B Prescaler Value
0
16
TIMER0TBR
GPTM Timer B
0x4C
read-write
n
0x0
0x0
TIMER0TBV
GPTM Timer B Value
0x54
read-write
n
0x0
0x0
WTIMER2
Register map for TIMER0 peripheral
TIMER
0x0
0x0
0x1000
registers
n
WTIMER2A
98
WTIMER2B
99
CFG
GPTM Configuration
0x0
-1
read-write
n
0x0
0x0
TIMER_CFG
GPTM Configuration
0
3
TIMER_CFG_32_BIT_TIMER
For a 16/32-bit timer, this value selects the 32-bit timer configuration
0x0
TIMER_CFG_32_BIT_RTC
For a 16/32-bit timer, this value selects the 32-bit real-time clock (RTC) counter configuration
0x1
TIMER_CFG_16_BIT
For a 16/32-bit timer, this value selects the 16-bit timer configuration
0x4
CTL
GPTM Control
0xC
-1
read-write
n
0x0
0x0
TIMER_CTL_RTCEN
GPTM RTC Stall Enable
4
5
TIMER_CTL_TAEN
GPTM Timer A Enable
0
1
TIMER_CTL_TAEVENT
GPTM Timer A Event Mode
2
4
TIMER_CTL_TAEVENT_POS
Positive edge
0x0
TIMER_CTL_TAEVENT_NEG
Negative edge
0x1
TIMER_CTL_TAEVENT_BOTH
Both edges
0x3
TIMER_CTL_TAOTE
GPTM Timer A Output Trigger Enable
5
6
TIMER_CTL_TAPWML
GPTM Timer A PWM Output Level
6
7
TIMER_CTL_TASTALL
GPTM Timer A Stall Enable
1
2
TIMER_CTL_TBEN
GPTM Timer B Enable
8
9
TIMER_CTL_TBEVENT
GPTM Timer B Event Mode
10
12
TIMER_CTL_TBEVENT_POS
Positive edge
0x0
TIMER_CTL_TBEVENT_NEG
Negative edge
0x1
TIMER_CTL_TBEVENT_BOTH
Both edges
0x3
TIMER_CTL_TBOTE
GPTM Timer B Output Trigger Enable
13
14
TIMER_CTL_TBPWML
GPTM Timer B PWM Output Level
14
15
TIMER_CTL_TBSTALL
GPTM Timer B Stall Enable
9
10
ICR
GPTM Interrupt Clear
0x24
-1
write-only
n
0x0
0x0
TIMER_ICR_CAECINT
GPTM Timer A Capture Mode Event Interrupt Clear
2
3
write-only
TIMER_ICR_CAMCINT
GPTM Timer A Capture Mode Match Interrupt Clear
1
2
write-only
TIMER_ICR_CBECINT
GPTM Timer B Capture Mode Event Interrupt Clear
10
11
write-only
TIMER_ICR_CBMCINT
GPTM Timer B Capture Mode Match Interrupt Clear
9
10
write-only
TIMER_ICR_RTCCINT
GPTM RTC Interrupt Clear
3
4
write-only
TIMER_ICR_TAMCINT
GPTM Timer A Match Interrupt Clear
4
5
write-only
TIMER_ICR_TATOCINT
GPTM Timer A Time-Out Raw Interrupt
0
1
write-only
TIMER_ICR_TBMCINT
GPTM Timer B Match Interrupt Clear
11
12
write-only
TIMER_ICR_TBTOCINT
GPTM Timer B Time-Out Interrupt Clear
8
9
write-only
TIMER_ICR_WUECINT
32/64-Bit Wide GPTM Write Update Error Interrupt Clear
16
17
write-only
IMR
GPTM Interrupt Mask
0x18
-1
read-write
n
0x0
0x0
TIMER_IMR_CAEIM
GPTM Timer A Capture Mode Event Interrupt Mask
2
3
TIMER_IMR_CAMIM
GPTM Timer A Capture Mode Match Interrupt Mask
1
2
TIMER_IMR_CBEIM
GPTM Timer B Capture Mode Event Interrupt Mask
10
11
TIMER_IMR_CBMIM
GPTM Timer B Capture Mode Match Interrupt Mask
9
10
TIMER_IMR_RTCIM
GPTM RTC Interrupt Mask
3
4
TIMER_IMR_TAMIM
GPTM Timer A Match Interrupt Mask
4
5
TIMER_IMR_TATOIM
GPTM Timer A Time-Out Interrupt Mask
0
1
TIMER_IMR_TBMIM
GPTM Timer B Match Interrupt Mask
11
12
TIMER_IMR_TBTOIM
GPTM Timer B Time-Out Interrupt Mask
8
9
TIMER_IMR_WUEIM
32/64-Bit Wide GPTM Write Update Error Interrupt Mask
16
17
MIS
GPTM Masked Interrupt Status
0x20
-1
read-write
n
0x0
0x0
TIMER_MIS_CAEMIS
GPTM Timer A Capture Mode Event Masked Interrupt
2
3
TIMER_MIS_CAMMIS
GPTM Timer A Capture Mode Match Masked Interrupt
1
2
TIMER_MIS_CBEMIS
GPTM Timer B Capture Mode Event Masked Interrupt
10
11
TIMER_MIS_CBMMIS
GPTM Timer B Capture Mode Match Masked Interrupt
9
10
TIMER_MIS_RTCMIS
GPTM RTC Masked Interrupt
3
4
TIMER_MIS_TAMMIS
GPTM Timer A Match Masked Interrupt
4
5
TIMER_MIS_TATOMIS
GPTM Timer A Time-Out Masked Interrupt
0
1
TIMER_MIS_TBMMIS
GPTM Timer B Match Masked Interrupt
11
12
TIMER_MIS_TBTOMIS
GPTM Timer B Time-Out Masked Interrupt
8
9
TIMER_MIS_WUEMIS
32/64-Bit Wide GPTM Write Update Error Masked Interrupt Status
16
17
PP
GPTM Peripheral Properties
0xFC0
-1
read-write
n
0x0
0x0
TIMER_PP_SIZE
Count Size
0
4
TIMER_PP_SIZE_16
Timer A and Timer B counters are 16 bits each with an 8-bit prescale counter
0x0
TIMER_PP_SIZE_32
Timer A and Timer B counters are 32 bits each with a 16-bit prescale counter
0x1
RIS
GPTM Raw Interrupt Status
0x1C
-1
read-write
n
0x0
0x0
TIMER_RIS_CAERIS
GPTM Timer A Capture Mode Event Raw Interrupt
2
3
TIMER_RIS_CAMRIS
GPTM Timer A Capture Mode Match Raw Interrupt
1
2
TIMER_RIS_CBERIS
GPTM Timer B Capture Mode Event Raw Interrupt
10
11
TIMER_RIS_CBMRIS
GPTM Timer B Capture Mode Match Raw Interrupt
9
10
TIMER_RIS_RTCRIS
GPTM RTC Raw Interrupt
3
4
TIMER_RIS_TAMRIS
GPTM Timer A Match Raw Interrupt
4
5
TIMER_RIS_TATORIS
GPTM Timer A Time-Out Raw Interrupt
0
1
TIMER_RIS_TBMRIS
GPTM Timer B Match Raw Interrupt
11
12
TIMER_RIS_TBTORIS
GPTM Timer B Time-Out Raw Interrupt
8
9
TIMER_RIS_WUERIS
32/64-Bit Wide GPTM Write Update Error Raw Interrupt Status
16
17
RTCPD
GPTM RTC Predivide
0x58
-1
read-write
n
0x0
0x0
TIMER_RTCPD_RTCPD
RTC Predivide Counter Value
0
16
SYNC
GPTM Synchronize
0x10
-1
read-write
n
0x0
0x0
TIMER_SYNC_SYNCT0
Synchronize GPTM Timer 0
0
2
TIMER_SYNC_SYNCT0_NONE
GPTM0 is not affected
0x0
TIMER_SYNC_SYNCT0_TA
A timeout event for Timer A of GPTM0 is triggered
0x1
TIMER_SYNC_SYNCT0_TB
A timeout event for Timer B of GPTM0 is triggered
0x2
TIMER_SYNC_SYNCT0_TATB
A timeout event for both Timer A and Timer B of GPTM0 is triggered
0x3
TIMER_SYNC_SYNCT1
Synchronize GPTM Timer 1
2
4
TIMER_SYNC_SYNCT1_NONE
GPTM1 is not affected
0x0
TIMER_SYNC_SYNCT1_TA
A timeout event for Timer A of GPTM1 is triggered
0x1
TIMER_SYNC_SYNCT1_TB
A timeout event for Timer B of GPTM1 is triggered
0x2
TIMER_SYNC_SYNCT1_TATB
A timeout event for both Timer A and Timer B of GPTM1 is triggered
0x3
TIMER_SYNC_SYNCT2
Synchronize GPTM Timer 2
4
6
TIMER_SYNC_SYNCT2_NONE
GPTM2 is not affected
0x0
TIMER_SYNC_SYNCT2_TA
A timeout event for Timer A of GPTM2 is triggered
0x1
TIMER_SYNC_SYNCT2_TB
A timeout event for Timer B of GPTM2 is triggered
0x2
TIMER_SYNC_SYNCT2_TATB
A timeout event for both Timer A and Timer B of GPTM2 is triggered
0x3
TIMER_SYNC_SYNCT3
Synchronize GPTM Timer 3
6
8
TIMER_SYNC_SYNCT3_NONE
GPTM3 is not affected
0x0
TIMER_SYNC_SYNCT3_TA
A timeout event for Timer A of GPTM3 is triggered
0x1
TIMER_SYNC_SYNCT3_TB
A timeout event for Timer B of GPTM3 is triggered
0x2
TIMER_SYNC_SYNCT3_TATB
A timeout event for both Timer A and Timer B of GPTM3 is triggered
0x3
TIMER_SYNC_SYNCT4
Synchronize GPTM Timer 4
8
10
TIMER_SYNC_SYNCT4_NONE
GPTM4 is not affected
0x0
TIMER_SYNC_SYNCT4_TA
A timeout event for Timer A of GPTM4 is triggered
0x1
TIMER_SYNC_SYNCT4_TB
A timeout event for Timer B of GPTM4 is triggered
0x2
TIMER_SYNC_SYNCT4_TATB
A timeout event for both Timer A and Timer B of GPTM4 is triggered
0x3
TIMER_SYNC_SYNCT5
Synchronize GPTM Timer 5
10
12
TIMER_SYNC_SYNCT5_NONE
GPTM5 is not affected
0x0
TIMER_SYNC_SYNCT5_TA
A timeout event for Timer A of GPTM5 is triggered
0x1
TIMER_SYNC_SYNCT5_TB
A timeout event for Timer B of GPTM5 is triggered
0x2
TIMER_SYNC_SYNCT5_TATB
A timeout event for both Timer A and Timer B of GPTM5 is triggered
0x3
TIMER_SYNC_SYNCWT0
Synchronize GPTM 32/64-Bit Timer 0
12
14
TIMER_SYNC_SYNCWT0_NONE
GPTM 32/64-Bit Timer 0 is not affected
0x0
TIMER_SYNC_SYNCWT0_TA
A timeout event for Timer A of GPTM 32/64-Bit Timer 0 is triggered
0x1
TIMER_SYNC_SYNCWT0_TB
A timeout event for Timer B of GPTM 32/64-Bit Timer 0 is triggered
0x2
TIMER_SYNC_SYNCWT0_TATB
A timeout event for both Timer A and Timer B of GPTM 32/64-Bit Timer 0 is triggered
0x3
TIMER_SYNC_SYNCWT1
Synchronize GPTM 32/64-Bit Timer 1
14
16
TIMER_SYNC_SYNCWT1_NONE
GPTM 32/64-Bit Timer 1 is not affected
0x0
TIMER_SYNC_SYNCWT1_TA
A timeout event for Timer A of GPTM 32/64-Bit Timer 1 is triggered
0x1
TIMER_SYNC_SYNCWT1_TB
A timeout event for Timer B of GPTM 32/64-Bit Timer 1 is triggered
0x2
TIMER_SYNC_SYNCWT1_TATB
A timeout event for both Timer A and Timer B of GPTM 32/64-Bit Timer 1 is triggered
0x3
TIMER_SYNC_SYNCWT2
Synchronize GPTM 32/64-Bit Timer 2
16
18
TIMER_SYNC_SYNCWT2_NONE
GPTM 32/64-Bit Timer 2 is not affected
0x0
TIMER_SYNC_SYNCWT2_TA
A timeout event for Timer A of GPTM 32/64-Bit Timer 2 is triggered
0x1
TIMER_SYNC_SYNCWT2_TB
A timeout event for Timer B of GPTM 32/64-Bit Timer 2 is triggered
0x2
TIMER_SYNC_SYNCWT2_TATB
A timeout event for both Timer A and Timer B of GPTM 32/64-Bit Timer 2 is triggered
0x3
TIMER_SYNC_SYNCWT3
Synchronize GPTM 32/64-Bit Timer 3
18
20
TIMER_SYNC_SYNCWT3_NONE
GPTM 32/64-Bit Timer 3 is not affected
0x0
TIMER_SYNC_SYNCWT3_TA
A timeout event for Timer A of GPTM 32/64-Bit Timer 3 is triggered
0x1
TIMER_SYNC_SYNCWT3_TB
A timeout event for Timer B of GPTM 32/64-Bit Timer 3 is triggered
0x2
TIMER_SYNC_SYNCWT3_TATB
A timeout event for both Timer A and Timer B of GPTM 32/64-Bit Timer 3 is triggered
0x3
TIMER_SYNC_SYNCWT4
Synchronize GPTM 32/64-Bit Timer 4
20
22
TIMER_SYNC_SYNCWT4_NONE
GPTM 32/64-Bit Timer 4 is not affected
0x0
TIMER_SYNC_SYNCWT4_TA
A timeout event for Timer A of GPTM 32/64-Bit Timer 4 is triggered
0x1
TIMER_SYNC_SYNCWT4_TB
A timeout event for Timer B of GPTM 32/64-Bit Timer 4 is triggered
0x2
TIMER_SYNC_SYNCWT4_TATB
A timeout event for both Timer A and Timer B of GPTM 32/64-Bit Timer 4 is triggered
0x3
TIMER_SYNC_SYNCWT5
Synchronize GPTM 32/64-Bit Timer 5
22
24
TIMER_SYNC_SYNCWT5_NONE
GPTM 32/64-Bit Timer 5 is not affected
0x0
TIMER_SYNC_SYNCWT5_TA
A timeout event for Timer A of GPTM 32/64-Bit Timer 5 is triggered
0x1
TIMER_SYNC_SYNCWT5_TB
A timeout event for Timer B of GPTM 32/64-Bit Timer 5 is triggered
0x2
TIMER_SYNC_SYNCWT5_TATB
A timeout event for both Timer A and Timer B of GPTM 32/64-Bit Timer 5 is triggered
0x3
TAILR
GPTM Timer A Interval Load
0x28
-1
read-write
n
0x0
0x0
TAMATCHR
GPTM Timer A Match
0x30
-1
read-write
n
0x0
0x0
TAMR
GPTM Timer A Mode
0x4
-1
read-write
n
0x0
0x0
TIMER_TAMR_TAAMS
GPTM Timer A Alternate Mode Select
3
4
TIMER_TAMR_TACDIR
GPTM Timer A Count Direction
4
5
TIMER_TAMR_TACMR
GPTM Timer A Capture Mode
2
3
TIMER_TAMR_TAILD
GPTM Timer A Interval Load Write
8
9
TIMER_TAMR_TAMIE
GPTM Timer A Match Interrupt Enable
5
6
TIMER_TAMR_TAMR
GPTM Timer A Mode
0
2
TIMER_TAMR_TAMR_1_SHOT
One-Shot Timer mode
0x1
TIMER_TAMR_TAMR_PERIOD
Periodic Timer mode
0x2
TIMER_TAMR_TAMR_CAP
Capture mode
0x3
TIMER_TAMR_TAMRSU
GPTM Timer A Match Register Update
10
11
TIMER_TAMR_TAPLO
GPTM Timer A PWM Legacy Operation
11
12
TIMER_TAMR_TAPWMIE
GPTM Timer A PWM Interrupt Enable
9
10
TIMER_TAMR_TASNAPS
GPTM Timer A Snap-Shot Mode
7
8
TIMER_TAMR_TAWOT
GPTM Timer A Wait-on-Trigger
6
7
TAPMR
GPTM TimerA Prescale Match
0x40
-1
read-write
n
0x0
0x0
TIMER_TAPMR_TAPSMR
GPTM TimerA Prescale Match
0
8
TIMER_TAPMR_TAPSMRH
GPTM Timer A Prescale Match High Byte
8
16
TAPR
GPTM Timer A Prescale
0x38
-1
read-write
n
0x0
0x0
TIMER_TAPR_TAPSR
GPTM Timer A Prescale
0
8
TIMER_TAPR_TAPSRH
GPTM Timer A Prescale High Byte
8
16
TAPS
GPTM Timer A Prescale Snapshot
0x5C
-1
read-write
n
0x0
0x0
TIMER_TAPS_PSS
GPTM Timer A Prescaler Snapshot
0
16
TAPV
GPTM Timer A Prescale Value
0x64
-1
read-write
n
0x0
0x0
TIMER_TAPV_PSV
GPTM Timer A Prescaler Value
0
16
TAR
GPTM Timer A
0x48
-1
read-write
n
0x0
0x0
TAV
GPTM Timer A Value
0x50
-1
read-write
n
0x0
0x0
TBILR
GPTM Timer B Interval Load
0x2C
-1
read-write
n
0x0
0x0
TBMATCHR
GPTM Timer B Match
0x34
-1
read-write
n
0x0
0x0
TBMR
GPTM Timer B Mode
0x8
-1
read-write
n
0x0
0x0
TIMER_TBMR_TBAMS
GPTM Timer B Alternate Mode Select
3
4
TIMER_TBMR_TBCDIR
GPTM Timer B Count Direction
4
5
TIMER_TBMR_TBCMR
GPTM Timer B Capture Mode
2
3
TIMER_TBMR_TBILD
GPTM Timer B Interval Load Write
8
9
TIMER_TBMR_TBMIE
GPTM Timer B Match Interrupt Enable
5
6
TIMER_TBMR_TBMR
GPTM Timer B Mode
0
2
TIMER_TBMR_TBMR_1_SHOT
One-Shot Timer mode
0x1
TIMER_TBMR_TBMR_PERIOD
Periodic Timer mode
0x2
TIMER_TBMR_TBMR_CAP
Capture mode
0x3
TIMER_TBMR_TBMRSU
GPTM Timer B Match Register Update
10
11
TIMER_TBMR_TBPLO
GPTM Timer B PWM Legacy Operation
11
12
TIMER_TBMR_TBPWMIE
GPTM Timer B PWM Interrupt Enable
9
10
TIMER_TBMR_TBSNAPS
GPTM Timer B Snap-Shot Mode
7
8
TIMER_TBMR_TBWOT
GPTM Timer B Wait-on-Trigger
6
7
TBPMR
GPTM TimerB Prescale Match
0x44
-1
read-write
n
0x0
0x0
TIMER_TBPMR_TBPSMR
GPTM TimerB Prescale Match
0
8
TIMER_TBPMR_TBPSMRH
GPTM Timer B Prescale Match High Byte
8
16
TBPR
GPTM Timer B Prescale
0x3C
-1
read-write
n
0x0
0x0
TIMER_TBPR_TBPSR
GPTM Timer B Prescale
0
8
TIMER_TBPR_TBPSRH
GPTM Timer B Prescale High Byte
8
16
TBPS
GPTM Timer B Prescale Snapshot
0x60
-1
read-write
n
0x0
0x0
TIMER_TBPS_PSS
GPTM Timer A Prescaler Value
0
16
TBPV
GPTM Timer B Prescale Value
0x68
-1
read-write
n
0x0
0x0
TIMER_TBPV_PSV
GPTM Timer B Prescaler Value
0
16
TBR
GPTM Timer B
0x4C
-1
read-write
n
0x0
0x0
TBV
GPTM Timer B Value
0x54
-1
read-write
n
0x0
0x0
TIMER0CFG
GPTM Configuration
0x0
read-write
n
0x0
0x0
TIMER_CFG
GPTM Configuration
0
3
TIMER_CFG_32_BIT_TIMER
For a 16/32-bit timer, this value selects the 32-bit timer configuration
0x0
TIMER_CFG_32_BIT_RTC
For a 16/32-bit timer, this value selects the 32-bit real-time clock (RTC) counter configuration
0x1
TIMER_CFG_16_BIT
For a 16/32-bit timer, this value selects the 16-bit timer configuration
0x4
TIMER0CTL
GPTM Control
0xC
read-write
n
0x0
0x0
TIMER_CTL_RTCEN
GPTM RTC Stall Enable
4
5
TIMER_CTL_TAEN
GPTM Timer A Enable
0
1
TIMER_CTL_TAEVENT
GPTM Timer A Event Mode
2
4
TIMER_CTL_TAEVENT_POS
Positive edge
0x0
TIMER_CTL_TAEVENT_NEG
Negative edge
0x1
TIMER_CTL_TAEVENT_BOTH
Both edges
0x3
TIMER_CTL_TAOTE
GPTM Timer A Output Trigger Enable
5
6
TIMER_CTL_TAPWML
GPTM Timer A PWM Output Level
6
7
TIMER_CTL_TASTALL
GPTM Timer A Stall Enable
1
2
TIMER_CTL_TBEN
GPTM Timer B Enable
8
9
TIMER_CTL_TBEVENT
GPTM Timer B Event Mode
10
12
TIMER_CTL_TBEVENT_POS
Positive edge
0x0
TIMER_CTL_TBEVENT_NEG
Negative edge
0x1
TIMER_CTL_TBEVENT_BOTH
Both edges
0x3
TIMER_CTL_TBOTE
GPTM Timer B Output Trigger Enable
13
14
TIMER_CTL_TBPWML
GPTM Timer B PWM Output Level
14
15
TIMER_CTL_TBSTALL
GPTM Timer B Stall Enable
9
10
TIMER0ICR
GPTM Interrupt Clear
0x24
write-only
n
0x0
0x0
TIMER_ICR_CAECINT
GPTM Timer A Capture Mode Event Interrupt Clear
2
3
write-only
TIMER_ICR_CAMCINT
GPTM Timer A Capture Mode Match Interrupt Clear
1
2
write-only
TIMER_ICR_CBECINT
GPTM Timer B Capture Mode Event Interrupt Clear
10
11
write-only
TIMER_ICR_CBMCINT
GPTM Timer B Capture Mode Match Interrupt Clear
9
10
write-only
TIMER_ICR_RTCCINT
GPTM RTC Interrupt Clear
3
4
write-only
TIMER_ICR_TAMCINT
GPTM Timer A Match Interrupt Clear
4
5
write-only
TIMER_ICR_TATOCINT
GPTM Timer A Time-Out Raw Interrupt
0
1
write-only
TIMER_ICR_TBMCINT
GPTM Timer B Match Interrupt Clear
11
12
write-only
TIMER_ICR_TBTOCINT
GPTM Timer B Time-Out Interrupt Clear
8
9
write-only
TIMER_ICR_WUECINT
32/64-Bit Wide GPTM Write Update Error Interrupt Clear
16
17
write-only
TIMER0IMR
GPTM Interrupt Mask
0x18
read-write
n
0x0
0x0
TIMER_IMR_CAEIM
GPTM Timer A Capture Mode Event Interrupt Mask
2
3
TIMER_IMR_CAMIM
GPTM Timer A Capture Mode Match Interrupt Mask
1
2
TIMER_IMR_CBEIM
GPTM Timer B Capture Mode Event Interrupt Mask
10
11
TIMER_IMR_CBMIM
GPTM Timer B Capture Mode Match Interrupt Mask
9
10
TIMER_IMR_RTCIM
GPTM RTC Interrupt Mask
3
4
TIMER_IMR_TAMIM
GPTM Timer A Match Interrupt Mask
4
5
TIMER_IMR_TATOIM
GPTM Timer A Time-Out Interrupt Mask
0
1
TIMER_IMR_TBMIM
GPTM Timer B Match Interrupt Mask
11
12
TIMER_IMR_TBTOIM
GPTM Timer B Time-Out Interrupt Mask
8
9
TIMER_IMR_WUEIM
32/64-Bit Wide GPTM Write Update Error Interrupt Mask
16
17
TIMER0MIS
GPTM Masked Interrupt Status
0x20
read-write
n
0x0
0x0
TIMER_MIS_CAEMIS
GPTM Timer A Capture Mode Event Masked Interrupt
2
3
TIMER_MIS_CAMMIS
GPTM Timer A Capture Mode Match Masked Interrupt
1
2
TIMER_MIS_CBEMIS
GPTM Timer B Capture Mode Event Masked Interrupt
10
11
TIMER_MIS_CBMMIS
GPTM Timer B Capture Mode Match Masked Interrupt
9
10
TIMER_MIS_RTCMIS
GPTM RTC Masked Interrupt
3
4
TIMER_MIS_TAMMIS
GPTM Timer A Match Masked Interrupt
4
5
TIMER_MIS_TATOMIS
GPTM Timer A Time-Out Masked Interrupt
0
1
TIMER_MIS_TBMMIS
GPTM Timer B Match Masked Interrupt
11
12
TIMER_MIS_TBTOMIS
GPTM Timer B Time-Out Masked Interrupt
8
9
TIMER_MIS_WUEMIS
32/64-Bit Wide GPTM Write Update Error Masked Interrupt Status
16
17
TIMER0PP
GPTM Peripheral Properties
0xFC0
read-write
n
0x0
0x0
TIMER_PP_SIZE
Count Size
0
4
TIMER_PP_SIZE_16
Timer A and Timer B counters are 16 bits each with an 8-bit prescale counter
0x0
TIMER_PP_SIZE_32
Timer A and Timer B counters are 32 bits each with a 16-bit prescale counter
0x1
TIMER0RIS
GPTM Raw Interrupt Status
0x1C
read-write
n
0x0
0x0
TIMER_RIS_CAERIS
GPTM Timer A Capture Mode Event Raw Interrupt
2
3
TIMER_RIS_CAMRIS
GPTM Timer A Capture Mode Match Raw Interrupt
1
2
TIMER_RIS_CBERIS
GPTM Timer B Capture Mode Event Raw Interrupt
10
11
TIMER_RIS_CBMRIS
GPTM Timer B Capture Mode Match Raw Interrupt
9
10
TIMER_RIS_RTCRIS
GPTM RTC Raw Interrupt
3
4
TIMER_RIS_TAMRIS
GPTM Timer A Match Raw Interrupt
4
5
TIMER_RIS_TATORIS
GPTM Timer A Time-Out Raw Interrupt
0
1
TIMER_RIS_TBMRIS
GPTM Timer B Match Raw Interrupt
11
12
TIMER_RIS_TBTORIS
GPTM Timer B Time-Out Raw Interrupt
8
9
TIMER_RIS_WUERIS
32/64-Bit Wide GPTM Write Update Error Raw Interrupt Status
16
17
TIMER0RTCPD
GPTM RTC Predivide
0x58
read-write
n
0x0
0x0
TIMER_RTCPD_RTCPD
RTC Predivide Counter Value
0
16
TIMER0SYNC
GPTM Synchronize
0x10
read-write
n
0x0
0x0
TIMER_SYNC_SYNCT0
Synchronize GPTM Timer 0
0
2
TIMER_SYNC_SYNCT0_NONE
GPTM0 is not affected
0x0
TIMER_SYNC_SYNCT0_TA
A timeout event for Timer A of GPTM0 is triggered
0x1
TIMER_SYNC_SYNCT0_TB
A timeout event for Timer B of GPTM0 is triggered
0x2
TIMER_SYNC_SYNCT0_TATB
A timeout event for both Timer A and Timer B of GPTM0 is triggered
0x3
TIMER_SYNC_SYNCT1
Synchronize GPTM Timer 1
2
4
TIMER_SYNC_SYNCT1_NONE
GPTM1 is not affected
0x0
TIMER_SYNC_SYNCT1_TA
A timeout event for Timer A of GPTM1 is triggered
0x1
TIMER_SYNC_SYNCT1_TB
A timeout event for Timer B of GPTM1 is triggered
0x2
TIMER_SYNC_SYNCT1_TATB
A timeout event for both Timer A and Timer B of GPTM1 is triggered
0x3
TIMER_SYNC_SYNCT2
Synchronize GPTM Timer 2
4
6
TIMER_SYNC_SYNCT2_NONE
GPTM2 is not affected
0x0
TIMER_SYNC_SYNCT2_TA
A timeout event for Timer A of GPTM2 is triggered
0x1
TIMER_SYNC_SYNCT2_TB
A timeout event for Timer B of GPTM2 is triggered
0x2
TIMER_SYNC_SYNCT2_TATB
A timeout event for both Timer A and Timer B of GPTM2 is triggered
0x3
TIMER_SYNC_SYNCT3
Synchronize GPTM Timer 3
6
8
TIMER_SYNC_SYNCT3_NONE
GPTM3 is not affected
0x0
TIMER_SYNC_SYNCT3_TA
A timeout event for Timer A of GPTM3 is triggered
0x1
TIMER_SYNC_SYNCT3_TB
A timeout event for Timer B of GPTM3 is triggered
0x2
TIMER_SYNC_SYNCT3_TATB
A timeout event for both Timer A and Timer B of GPTM3 is triggered
0x3
TIMER_SYNC_SYNCT4
Synchronize GPTM Timer 4
8
10
TIMER_SYNC_SYNCT4_NONE
GPTM4 is not affected
0x0
TIMER_SYNC_SYNCT4_TA
A timeout event for Timer A of GPTM4 is triggered
0x1
TIMER_SYNC_SYNCT4_TB
A timeout event for Timer B of GPTM4 is triggered
0x2
TIMER_SYNC_SYNCT4_TATB
A timeout event for both Timer A and Timer B of GPTM4 is triggered
0x3
TIMER_SYNC_SYNCT5
Synchronize GPTM Timer 5
10
12
TIMER_SYNC_SYNCT5_NONE
GPTM5 is not affected
0x0
TIMER_SYNC_SYNCT5_TA
A timeout event for Timer A of GPTM5 is triggered
0x1
TIMER_SYNC_SYNCT5_TB
A timeout event for Timer B of GPTM5 is triggered
0x2
TIMER_SYNC_SYNCT5_TATB
A timeout event for both Timer A and Timer B of GPTM5 is triggered
0x3
TIMER_SYNC_SYNCWT0
Synchronize GPTM 32/64-Bit Timer 0
12
14
TIMER_SYNC_SYNCWT0_NONE
GPTM 32/64-Bit Timer 0 is not affected
0x0
TIMER_SYNC_SYNCWT0_TA
A timeout event for Timer A of GPTM 32/64-Bit Timer 0 is triggered
0x1
TIMER_SYNC_SYNCWT0_TB
A timeout event for Timer B of GPTM 32/64-Bit Timer 0 is triggered
0x2
TIMER_SYNC_SYNCWT0_TATB
A timeout event for both Timer A and Timer B of GPTM 32/64-Bit Timer 0 is triggered
0x3
TIMER_SYNC_SYNCWT1
Synchronize GPTM 32/64-Bit Timer 1
14
16
TIMER_SYNC_SYNCWT1_NONE
GPTM 32/64-Bit Timer 1 is not affected
0x0
TIMER_SYNC_SYNCWT1_TA
A timeout event for Timer A of GPTM 32/64-Bit Timer 1 is triggered
0x1
TIMER_SYNC_SYNCWT1_TB
A timeout event for Timer B of GPTM 32/64-Bit Timer 1 is triggered
0x2
TIMER_SYNC_SYNCWT1_TATB
A timeout event for both Timer A and Timer B of GPTM 32/64-Bit Timer 1 is triggered
0x3
TIMER_SYNC_SYNCWT2
Synchronize GPTM 32/64-Bit Timer 2
16
18
TIMER_SYNC_SYNCWT2_NONE
GPTM 32/64-Bit Timer 2 is not affected
0x0
TIMER_SYNC_SYNCWT2_TA
A timeout event for Timer A of GPTM 32/64-Bit Timer 2 is triggered
0x1
TIMER_SYNC_SYNCWT2_TB
A timeout event for Timer B of GPTM 32/64-Bit Timer 2 is triggered
0x2
TIMER_SYNC_SYNCWT2_TATB
A timeout event for both Timer A and Timer B of GPTM 32/64-Bit Timer 2 is triggered
0x3
TIMER_SYNC_SYNCWT3
Synchronize GPTM 32/64-Bit Timer 3
18
20
TIMER_SYNC_SYNCWT3_NONE
GPTM 32/64-Bit Timer 3 is not affected
0x0
TIMER_SYNC_SYNCWT3_TA
A timeout event for Timer A of GPTM 32/64-Bit Timer 3 is triggered
0x1
TIMER_SYNC_SYNCWT3_TB
A timeout event for Timer B of GPTM 32/64-Bit Timer 3 is triggered
0x2
TIMER_SYNC_SYNCWT3_TATB
A timeout event for both Timer A and Timer B of GPTM 32/64-Bit Timer 3 is triggered
0x3
TIMER_SYNC_SYNCWT4
Synchronize GPTM 32/64-Bit Timer 4
20
22
TIMER_SYNC_SYNCWT4_NONE
GPTM 32/64-Bit Timer 4 is not affected
0x0
TIMER_SYNC_SYNCWT4_TA
A timeout event for Timer A of GPTM 32/64-Bit Timer 4 is triggered
0x1
TIMER_SYNC_SYNCWT4_TB
A timeout event for Timer B of GPTM 32/64-Bit Timer 4 is triggered
0x2
TIMER_SYNC_SYNCWT4_TATB
A timeout event for both Timer A and Timer B of GPTM 32/64-Bit Timer 4 is triggered
0x3
TIMER_SYNC_SYNCWT5
Synchronize GPTM 32/64-Bit Timer 5
22
24
TIMER_SYNC_SYNCWT5_NONE
GPTM 32/64-Bit Timer 5 is not affected
0x0
TIMER_SYNC_SYNCWT5_TA
A timeout event for Timer A of GPTM 32/64-Bit Timer 5 is triggered
0x1
TIMER_SYNC_SYNCWT5_TB
A timeout event for Timer B of GPTM 32/64-Bit Timer 5 is triggered
0x2
TIMER_SYNC_SYNCWT5_TATB
A timeout event for both Timer A and Timer B of GPTM 32/64-Bit Timer 5 is triggered
0x3
TIMER0TAILR
GPTM Timer A Interval Load
0x28
read-write
n
0x0
0x0
TIMER0TAMATCHR
GPTM Timer A Match
0x30
read-write
n
0x0
0x0
TIMER0TAMR
GPTM Timer A Mode
0x4
read-write
n
0x0
0x0
TIMER_TAMR_TAAMS
GPTM Timer A Alternate Mode Select
3
4
TIMER_TAMR_TACDIR
GPTM Timer A Count Direction
4
5
TIMER_TAMR_TACMR
GPTM Timer A Capture Mode
2
3
TIMER_TAMR_TAILD
GPTM Timer A Interval Load Write
8
9
TIMER_TAMR_TAMIE
GPTM Timer A Match Interrupt Enable
5
6
TIMER_TAMR_TAMR
GPTM Timer A Mode
0
2
TIMER_TAMR_TAMR_1_SHOT
One-Shot Timer mode
0x1
TIMER_TAMR_TAMR_PERIOD
Periodic Timer mode
0x2
TIMER_TAMR_TAMR_CAP
Capture mode
0x3
TIMER_TAMR_TAMRSU
GPTM Timer A Match Register Update
10
11
TIMER_TAMR_TAPLO
GPTM Timer A PWM Legacy Operation
11
12
TIMER_TAMR_TAPWMIE
GPTM Timer A PWM Interrupt Enable
9
10
TIMER_TAMR_TASNAPS
GPTM Timer A Snap-Shot Mode
7
8
TIMER_TAMR_TAWOT
GPTM Timer A Wait-on-Trigger
6
7
TIMER0TAPMR
GPTM TimerA Prescale Match
0x40
read-write
n
0x0
0x0
TIMER_TAPMR_TAPSMR
GPTM TimerA Prescale Match
0
8
TIMER_TAPMR_TAPSMRH
GPTM Timer A Prescale Match High Byte
8
16
TIMER0TAPR
GPTM Timer A Prescale
0x38
read-write
n
0x0
0x0
TIMER_TAPR_TAPSR
GPTM Timer A Prescale
0
8
TIMER_TAPR_TAPSRH
GPTM Timer A Prescale High Byte
8
16
TIMER0TAPS
GPTM Timer A Prescale Snapshot
0x5C
read-write
n
0x0
0x0
TIMER_TAPS_PSS
GPTM Timer A Prescaler Snapshot
0
16
TIMER0TAPV
GPTM Timer A Prescale Value
0x64
read-write
n
0x0
0x0
TIMER_TAPV_PSV
GPTM Timer A Prescaler Value
0
16
TIMER0TAR
GPTM Timer A
0x48
read-write
n
0x0
0x0
TIMER0TAV
GPTM Timer A Value
0x50
read-write
n
0x0
0x0
TIMER0TBILR
GPTM Timer B Interval Load
0x2C
read-write
n
0x0
0x0
TIMER0TBMATCHR
GPTM Timer B Match
0x34
read-write
n
0x0
0x0
TIMER0TBMR
GPTM Timer B Mode
0x8
read-write
n
0x0
0x0
TIMER_TBMR_TBAMS
GPTM Timer B Alternate Mode Select
3
4
TIMER_TBMR_TBCDIR
GPTM Timer B Count Direction
4
5
TIMER_TBMR_TBCMR
GPTM Timer B Capture Mode
2
3
TIMER_TBMR_TBILD
GPTM Timer B Interval Load Write
8
9
TIMER_TBMR_TBMIE
GPTM Timer B Match Interrupt Enable
5
6
TIMER_TBMR_TBMR
GPTM Timer B Mode
0
2
TIMER_TBMR_TBMR_1_SHOT
One-Shot Timer mode
0x1
TIMER_TBMR_TBMR_PERIOD
Periodic Timer mode
0x2
TIMER_TBMR_TBMR_CAP
Capture mode
0x3
TIMER_TBMR_TBMRSU
GPTM Timer B Match Register Update
10
11
TIMER_TBMR_TBPLO
GPTM Timer B PWM Legacy Operation
11
12
TIMER_TBMR_TBPWMIE
GPTM Timer B PWM Interrupt Enable
9
10
TIMER_TBMR_TBSNAPS
GPTM Timer B Snap-Shot Mode
7
8
TIMER_TBMR_TBWOT
GPTM Timer B Wait-on-Trigger
6
7
TIMER0TBPMR
GPTM TimerB Prescale Match
0x44
read-write
n
0x0
0x0
TIMER_TBPMR_TBPSMR
GPTM TimerB Prescale Match
0
8
TIMER_TBPMR_TBPSMRH
GPTM Timer B Prescale Match High Byte
8
16
TIMER0TBPR
GPTM Timer B Prescale
0x3C
read-write
n
0x0
0x0
TIMER_TBPR_TBPSR
GPTM Timer B Prescale
0
8
TIMER_TBPR_TBPSRH
GPTM Timer B Prescale High Byte
8
16
TIMER0TBPS
GPTM Timer B Prescale Snapshot
0x60
read-write
n
0x0
0x0
TIMER_TBPS_PSS
GPTM Timer A Prescaler Value
0
16
TIMER0TBPV
GPTM Timer B Prescale Value
0x68
read-write
n
0x0
0x0
TIMER_TBPV_PSV
GPTM Timer B Prescaler Value
0
16
TIMER0TBR
GPTM Timer B
0x4C
read-write
n
0x0
0x0
TIMER0TBV
GPTM Timer B Value
0x54
read-write
n
0x0
0x0
WTIMER3
Register map for TIMER0 peripheral
TIMER
0x0
0x0
0x1000
registers
n
WTIMER3A
100
WTIMER3B
101
CFG
GPTM Configuration
0x0
-1
read-write
n
0x0
0x0
TIMER_CFG
GPTM Configuration
0
3
TIMER_CFG_32_BIT_TIMER
For a 16/32-bit timer, this value selects the 32-bit timer configuration
0x0
TIMER_CFG_32_BIT_RTC
For a 16/32-bit timer, this value selects the 32-bit real-time clock (RTC) counter configuration
0x1
TIMER_CFG_16_BIT
For a 16/32-bit timer, this value selects the 16-bit timer configuration
0x4
CTL
GPTM Control
0xC
-1
read-write
n
0x0
0x0
TIMER_CTL_RTCEN
GPTM RTC Stall Enable
4
5
TIMER_CTL_TAEN
GPTM Timer A Enable
0
1
TIMER_CTL_TAEVENT
GPTM Timer A Event Mode
2
4
TIMER_CTL_TAEVENT_POS
Positive edge
0x0
TIMER_CTL_TAEVENT_NEG
Negative edge
0x1
TIMER_CTL_TAEVENT_BOTH
Both edges
0x3
TIMER_CTL_TAOTE
GPTM Timer A Output Trigger Enable
5
6
TIMER_CTL_TAPWML
GPTM Timer A PWM Output Level
6
7
TIMER_CTL_TASTALL
GPTM Timer A Stall Enable
1
2
TIMER_CTL_TBEN
GPTM Timer B Enable
8
9
TIMER_CTL_TBEVENT
GPTM Timer B Event Mode
10
12
TIMER_CTL_TBEVENT_POS
Positive edge
0x0
TIMER_CTL_TBEVENT_NEG
Negative edge
0x1
TIMER_CTL_TBEVENT_BOTH
Both edges
0x3
TIMER_CTL_TBOTE
GPTM Timer B Output Trigger Enable
13
14
TIMER_CTL_TBPWML
GPTM Timer B PWM Output Level
14
15
TIMER_CTL_TBSTALL
GPTM Timer B Stall Enable
9
10
ICR
GPTM Interrupt Clear
0x24
-1
write-only
n
0x0
0x0
TIMER_ICR_CAECINT
GPTM Timer A Capture Mode Event Interrupt Clear
2
3
write-only
TIMER_ICR_CAMCINT
GPTM Timer A Capture Mode Match Interrupt Clear
1
2
write-only
TIMER_ICR_CBECINT
GPTM Timer B Capture Mode Event Interrupt Clear
10
11
write-only
TIMER_ICR_CBMCINT
GPTM Timer B Capture Mode Match Interrupt Clear
9
10
write-only
TIMER_ICR_RTCCINT
GPTM RTC Interrupt Clear
3
4
write-only
TIMER_ICR_TAMCINT
GPTM Timer A Match Interrupt Clear
4
5
write-only
TIMER_ICR_TATOCINT
GPTM Timer A Time-Out Raw Interrupt
0
1
write-only
TIMER_ICR_TBMCINT
GPTM Timer B Match Interrupt Clear
11
12
write-only
TIMER_ICR_TBTOCINT
GPTM Timer B Time-Out Interrupt Clear
8
9
write-only
TIMER_ICR_WUECINT
32/64-Bit Wide GPTM Write Update Error Interrupt Clear
16
17
write-only
IMR
GPTM Interrupt Mask
0x18
-1
read-write
n
0x0
0x0
TIMER_IMR_CAEIM
GPTM Timer A Capture Mode Event Interrupt Mask
2
3
TIMER_IMR_CAMIM
GPTM Timer A Capture Mode Match Interrupt Mask
1
2
TIMER_IMR_CBEIM
GPTM Timer B Capture Mode Event Interrupt Mask
10
11
TIMER_IMR_CBMIM
GPTM Timer B Capture Mode Match Interrupt Mask
9
10
TIMER_IMR_RTCIM
GPTM RTC Interrupt Mask
3
4
TIMER_IMR_TAMIM
GPTM Timer A Match Interrupt Mask
4
5
TIMER_IMR_TATOIM
GPTM Timer A Time-Out Interrupt Mask
0
1
TIMER_IMR_TBMIM
GPTM Timer B Match Interrupt Mask
11
12
TIMER_IMR_TBTOIM
GPTM Timer B Time-Out Interrupt Mask
8
9
TIMER_IMR_WUEIM
32/64-Bit Wide GPTM Write Update Error Interrupt Mask
16
17
MIS
GPTM Masked Interrupt Status
0x20
-1
read-write
n
0x0
0x0
TIMER_MIS_CAEMIS
GPTM Timer A Capture Mode Event Masked Interrupt
2
3
TIMER_MIS_CAMMIS
GPTM Timer A Capture Mode Match Masked Interrupt
1
2
TIMER_MIS_CBEMIS
GPTM Timer B Capture Mode Event Masked Interrupt
10
11
TIMER_MIS_CBMMIS
GPTM Timer B Capture Mode Match Masked Interrupt
9
10
TIMER_MIS_RTCMIS
GPTM RTC Masked Interrupt
3
4
TIMER_MIS_TAMMIS
GPTM Timer A Match Masked Interrupt
4
5
TIMER_MIS_TATOMIS
GPTM Timer A Time-Out Masked Interrupt
0
1
TIMER_MIS_TBMMIS
GPTM Timer B Match Masked Interrupt
11
12
TIMER_MIS_TBTOMIS
GPTM Timer B Time-Out Masked Interrupt
8
9
TIMER_MIS_WUEMIS
32/64-Bit Wide GPTM Write Update Error Masked Interrupt Status
16
17
PP
GPTM Peripheral Properties
0xFC0
-1
read-write
n
0x0
0x0
TIMER_PP_SIZE
Count Size
0
4
TIMER_PP_SIZE_16
Timer A and Timer B counters are 16 bits each with an 8-bit prescale counter
0x0
TIMER_PP_SIZE_32
Timer A and Timer B counters are 32 bits each with a 16-bit prescale counter
0x1
RIS
GPTM Raw Interrupt Status
0x1C
-1
read-write
n
0x0
0x0
TIMER_RIS_CAERIS
GPTM Timer A Capture Mode Event Raw Interrupt
2
3
TIMER_RIS_CAMRIS
GPTM Timer A Capture Mode Match Raw Interrupt
1
2
TIMER_RIS_CBERIS
GPTM Timer B Capture Mode Event Raw Interrupt
10
11
TIMER_RIS_CBMRIS
GPTM Timer B Capture Mode Match Raw Interrupt
9
10
TIMER_RIS_RTCRIS
GPTM RTC Raw Interrupt
3
4
TIMER_RIS_TAMRIS
GPTM Timer A Match Raw Interrupt
4
5
TIMER_RIS_TATORIS
GPTM Timer A Time-Out Raw Interrupt
0
1
TIMER_RIS_TBMRIS
GPTM Timer B Match Raw Interrupt
11
12
TIMER_RIS_TBTORIS
GPTM Timer B Time-Out Raw Interrupt
8
9
TIMER_RIS_WUERIS
32/64-Bit Wide GPTM Write Update Error Raw Interrupt Status
16
17
RTCPD
GPTM RTC Predivide
0x58
-1
read-write
n
0x0
0x0
TIMER_RTCPD_RTCPD
RTC Predivide Counter Value
0
16
SYNC
GPTM Synchronize
0x10
-1
read-write
n
0x0
0x0
TIMER_SYNC_SYNCT0
Synchronize GPTM Timer 0
0
2
TIMER_SYNC_SYNCT0_NONE
GPTM0 is not affected
0x0
TIMER_SYNC_SYNCT0_TA
A timeout event for Timer A of GPTM0 is triggered
0x1
TIMER_SYNC_SYNCT0_TB
A timeout event for Timer B of GPTM0 is triggered
0x2
TIMER_SYNC_SYNCT0_TATB
A timeout event for both Timer A and Timer B of GPTM0 is triggered
0x3
TIMER_SYNC_SYNCT1
Synchronize GPTM Timer 1
2
4
TIMER_SYNC_SYNCT1_NONE
GPTM1 is not affected
0x0
TIMER_SYNC_SYNCT1_TA
A timeout event for Timer A of GPTM1 is triggered
0x1
TIMER_SYNC_SYNCT1_TB
A timeout event for Timer B of GPTM1 is triggered
0x2
TIMER_SYNC_SYNCT1_TATB
A timeout event for both Timer A and Timer B of GPTM1 is triggered
0x3
TIMER_SYNC_SYNCT2
Synchronize GPTM Timer 2
4
6
TIMER_SYNC_SYNCT2_NONE
GPTM2 is not affected
0x0
TIMER_SYNC_SYNCT2_TA
A timeout event for Timer A of GPTM2 is triggered
0x1
TIMER_SYNC_SYNCT2_TB
A timeout event for Timer B of GPTM2 is triggered
0x2
TIMER_SYNC_SYNCT2_TATB
A timeout event for both Timer A and Timer B of GPTM2 is triggered
0x3
TIMER_SYNC_SYNCT3
Synchronize GPTM Timer 3
6
8
TIMER_SYNC_SYNCT3_NONE
GPTM3 is not affected
0x0
TIMER_SYNC_SYNCT3_TA
A timeout event for Timer A of GPTM3 is triggered
0x1
TIMER_SYNC_SYNCT3_TB
A timeout event for Timer B of GPTM3 is triggered
0x2
TIMER_SYNC_SYNCT3_TATB
A timeout event for both Timer A and Timer B of GPTM3 is triggered
0x3
TIMER_SYNC_SYNCT4
Synchronize GPTM Timer 4
8
10
TIMER_SYNC_SYNCT4_NONE
GPTM4 is not affected
0x0
TIMER_SYNC_SYNCT4_TA
A timeout event for Timer A of GPTM4 is triggered
0x1
TIMER_SYNC_SYNCT4_TB
A timeout event for Timer B of GPTM4 is triggered
0x2
TIMER_SYNC_SYNCT4_TATB
A timeout event for both Timer A and Timer B of GPTM4 is triggered
0x3
TIMER_SYNC_SYNCT5
Synchronize GPTM Timer 5
10
12
TIMER_SYNC_SYNCT5_NONE
GPTM5 is not affected
0x0
TIMER_SYNC_SYNCT5_TA
A timeout event for Timer A of GPTM5 is triggered
0x1
TIMER_SYNC_SYNCT5_TB
A timeout event for Timer B of GPTM5 is triggered
0x2
TIMER_SYNC_SYNCT5_TATB
A timeout event for both Timer A and Timer B of GPTM5 is triggered
0x3
TIMER_SYNC_SYNCWT0
Synchronize GPTM 32/64-Bit Timer 0
12
14
TIMER_SYNC_SYNCWT0_NONE
GPTM 32/64-Bit Timer 0 is not affected
0x0
TIMER_SYNC_SYNCWT0_TA
A timeout event for Timer A of GPTM 32/64-Bit Timer 0 is triggered
0x1
TIMER_SYNC_SYNCWT0_TB
A timeout event for Timer B of GPTM 32/64-Bit Timer 0 is triggered
0x2
TIMER_SYNC_SYNCWT0_TATB
A timeout event for both Timer A and Timer B of GPTM 32/64-Bit Timer 0 is triggered
0x3
TIMER_SYNC_SYNCWT1
Synchronize GPTM 32/64-Bit Timer 1
14
16
TIMER_SYNC_SYNCWT1_NONE
GPTM 32/64-Bit Timer 1 is not affected
0x0
TIMER_SYNC_SYNCWT1_TA
A timeout event for Timer A of GPTM 32/64-Bit Timer 1 is triggered
0x1
TIMER_SYNC_SYNCWT1_TB
A timeout event for Timer B of GPTM 32/64-Bit Timer 1 is triggered
0x2
TIMER_SYNC_SYNCWT1_TATB
A timeout event for both Timer A and Timer B of GPTM 32/64-Bit Timer 1 is triggered
0x3
TIMER_SYNC_SYNCWT2
Synchronize GPTM 32/64-Bit Timer 2
16
18
TIMER_SYNC_SYNCWT2_NONE
GPTM 32/64-Bit Timer 2 is not affected
0x0
TIMER_SYNC_SYNCWT2_TA
A timeout event for Timer A of GPTM 32/64-Bit Timer 2 is triggered
0x1
TIMER_SYNC_SYNCWT2_TB
A timeout event for Timer B of GPTM 32/64-Bit Timer 2 is triggered
0x2
TIMER_SYNC_SYNCWT2_TATB
A timeout event for both Timer A and Timer B of GPTM 32/64-Bit Timer 2 is triggered
0x3
TIMER_SYNC_SYNCWT3
Synchronize GPTM 32/64-Bit Timer 3
18
20
TIMER_SYNC_SYNCWT3_NONE
GPTM 32/64-Bit Timer 3 is not affected
0x0
TIMER_SYNC_SYNCWT3_TA
A timeout event for Timer A of GPTM 32/64-Bit Timer 3 is triggered
0x1
TIMER_SYNC_SYNCWT3_TB
A timeout event for Timer B of GPTM 32/64-Bit Timer 3 is triggered
0x2
TIMER_SYNC_SYNCWT3_TATB
A timeout event for both Timer A and Timer B of GPTM 32/64-Bit Timer 3 is triggered
0x3
TIMER_SYNC_SYNCWT4
Synchronize GPTM 32/64-Bit Timer 4
20
22
TIMER_SYNC_SYNCWT4_NONE
GPTM 32/64-Bit Timer 4 is not affected
0x0
TIMER_SYNC_SYNCWT4_TA
A timeout event for Timer A of GPTM 32/64-Bit Timer 4 is triggered
0x1
TIMER_SYNC_SYNCWT4_TB
A timeout event for Timer B of GPTM 32/64-Bit Timer 4 is triggered
0x2
TIMER_SYNC_SYNCWT4_TATB
A timeout event for both Timer A and Timer B of GPTM 32/64-Bit Timer 4 is triggered
0x3
TIMER_SYNC_SYNCWT5
Synchronize GPTM 32/64-Bit Timer 5
22
24
TIMER_SYNC_SYNCWT5_NONE
GPTM 32/64-Bit Timer 5 is not affected
0x0
TIMER_SYNC_SYNCWT5_TA
A timeout event for Timer A of GPTM 32/64-Bit Timer 5 is triggered
0x1
TIMER_SYNC_SYNCWT5_TB
A timeout event for Timer B of GPTM 32/64-Bit Timer 5 is triggered
0x2
TIMER_SYNC_SYNCWT5_TATB
A timeout event for both Timer A and Timer B of GPTM 32/64-Bit Timer 5 is triggered
0x3
TAILR
GPTM Timer A Interval Load
0x28
-1
read-write
n
0x0
0x0
TAMATCHR
GPTM Timer A Match
0x30
-1
read-write
n
0x0
0x0
TAMR
GPTM Timer A Mode
0x4
-1
read-write
n
0x0
0x0
TIMER_TAMR_TAAMS
GPTM Timer A Alternate Mode Select
3
4
TIMER_TAMR_TACDIR
GPTM Timer A Count Direction
4
5
TIMER_TAMR_TACMR
GPTM Timer A Capture Mode
2
3
TIMER_TAMR_TAILD
GPTM Timer A Interval Load Write
8
9
TIMER_TAMR_TAMIE
GPTM Timer A Match Interrupt Enable
5
6
TIMER_TAMR_TAMR
GPTM Timer A Mode
0
2
TIMER_TAMR_TAMR_1_SHOT
One-Shot Timer mode
0x1
TIMER_TAMR_TAMR_PERIOD
Periodic Timer mode
0x2
TIMER_TAMR_TAMR_CAP
Capture mode
0x3
TIMER_TAMR_TAMRSU
GPTM Timer A Match Register Update
10
11
TIMER_TAMR_TAPLO
GPTM Timer A PWM Legacy Operation
11
12
TIMER_TAMR_TAPWMIE
GPTM Timer A PWM Interrupt Enable
9
10
TIMER_TAMR_TASNAPS
GPTM Timer A Snap-Shot Mode
7
8
TIMER_TAMR_TAWOT
GPTM Timer A Wait-on-Trigger
6
7
TAPMR
GPTM TimerA Prescale Match
0x40
-1
read-write
n
0x0
0x0
TIMER_TAPMR_TAPSMR
GPTM TimerA Prescale Match
0
8
TIMER_TAPMR_TAPSMRH
GPTM Timer A Prescale Match High Byte
8
16
TAPR
GPTM Timer A Prescale
0x38
-1
read-write
n
0x0
0x0
TIMER_TAPR_TAPSR
GPTM Timer A Prescale
0
8
TIMER_TAPR_TAPSRH
GPTM Timer A Prescale High Byte
8
16
TAPS
GPTM Timer A Prescale Snapshot
0x5C
-1
read-write
n
0x0
0x0
TIMER_TAPS_PSS
GPTM Timer A Prescaler Snapshot
0
16
TAPV
GPTM Timer A Prescale Value
0x64
-1
read-write
n
0x0
0x0
TIMER_TAPV_PSV
GPTM Timer A Prescaler Value
0
16
TAR
GPTM Timer A
0x48
-1
read-write
n
0x0
0x0
TAV
GPTM Timer A Value
0x50
-1
read-write
n
0x0
0x0
TBILR
GPTM Timer B Interval Load
0x2C
-1
read-write
n
0x0
0x0
TBMATCHR
GPTM Timer B Match
0x34
-1
read-write
n
0x0
0x0
TBMR
GPTM Timer B Mode
0x8
-1
read-write
n
0x0
0x0
TIMER_TBMR_TBAMS
GPTM Timer B Alternate Mode Select
3
4
TIMER_TBMR_TBCDIR
GPTM Timer B Count Direction
4
5
TIMER_TBMR_TBCMR
GPTM Timer B Capture Mode
2
3
TIMER_TBMR_TBILD
GPTM Timer B Interval Load Write
8
9
TIMER_TBMR_TBMIE
GPTM Timer B Match Interrupt Enable
5
6
TIMER_TBMR_TBMR
GPTM Timer B Mode
0
2
TIMER_TBMR_TBMR_1_SHOT
One-Shot Timer mode
0x1
TIMER_TBMR_TBMR_PERIOD
Periodic Timer mode
0x2
TIMER_TBMR_TBMR_CAP
Capture mode
0x3
TIMER_TBMR_TBMRSU
GPTM Timer B Match Register Update
10
11
TIMER_TBMR_TBPLO
GPTM Timer B PWM Legacy Operation
11
12
TIMER_TBMR_TBPWMIE
GPTM Timer B PWM Interrupt Enable
9
10
TIMER_TBMR_TBSNAPS
GPTM Timer B Snap-Shot Mode
7
8
TIMER_TBMR_TBWOT
GPTM Timer B Wait-on-Trigger
6
7
TBPMR
GPTM TimerB Prescale Match
0x44
-1
read-write
n
0x0
0x0
TIMER_TBPMR_TBPSMR
GPTM TimerB Prescale Match
0
8
TIMER_TBPMR_TBPSMRH
GPTM Timer B Prescale Match High Byte
8
16
TBPR
GPTM Timer B Prescale
0x3C
-1
read-write
n
0x0
0x0
TIMER_TBPR_TBPSR
GPTM Timer B Prescale
0
8
TIMER_TBPR_TBPSRH
GPTM Timer B Prescale High Byte
8
16
TBPS
GPTM Timer B Prescale Snapshot
0x60
-1
read-write
n
0x0
0x0
TIMER_TBPS_PSS
GPTM Timer A Prescaler Value
0
16
TBPV
GPTM Timer B Prescale Value
0x68
-1
read-write
n
0x0
0x0
TIMER_TBPV_PSV
GPTM Timer B Prescaler Value
0
16
TBR
GPTM Timer B
0x4C
-1
read-write
n
0x0
0x0
TBV
GPTM Timer B Value
0x54
-1
read-write
n
0x0
0x0
TIMER0CFG
GPTM Configuration
0x0
read-write
n
0x0
0x0
TIMER_CFG
GPTM Configuration
0
3
TIMER_CFG_32_BIT_TIMER
For a 16/32-bit timer, this value selects the 32-bit timer configuration
0x0
TIMER_CFG_32_BIT_RTC
For a 16/32-bit timer, this value selects the 32-bit real-time clock (RTC) counter configuration
0x1
TIMER_CFG_16_BIT
For a 16/32-bit timer, this value selects the 16-bit timer configuration
0x4
TIMER0CTL
GPTM Control
0xC
read-write
n
0x0
0x0
TIMER_CTL_RTCEN
GPTM RTC Stall Enable
4
5
TIMER_CTL_TAEN
GPTM Timer A Enable
0
1
TIMER_CTL_TAEVENT
GPTM Timer A Event Mode
2
4
TIMER_CTL_TAEVENT_POS
Positive edge
0x0
TIMER_CTL_TAEVENT_NEG
Negative edge
0x1
TIMER_CTL_TAEVENT_BOTH
Both edges
0x3
TIMER_CTL_TAOTE
GPTM Timer A Output Trigger Enable
5
6
TIMER_CTL_TAPWML
GPTM Timer A PWM Output Level
6
7
TIMER_CTL_TASTALL
GPTM Timer A Stall Enable
1
2
TIMER_CTL_TBEN
GPTM Timer B Enable
8
9
TIMER_CTL_TBEVENT
GPTM Timer B Event Mode
10
12
TIMER_CTL_TBEVENT_POS
Positive edge
0x0
TIMER_CTL_TBEVENT_NEG
Negative edge
0x1
TIMER_CTL_TBEVENT_BOTH
Both edges
0x3
TIMER_CTL_TBOTE
GPTM Timer B Output Trigger Enable
13
14
TIMER_CTL_TBPWML
GPTM Timer B PWM Output Level
14
15
TIMER_CTL_TBSTALL
GPTM Timer B Stall Enable
9
10
TIMER0ICR
GPTM Interrupt Clear
0x24
write-only
n
0x0
0x0
TIMER_ICR_CAECINT
GPTM Timer A Capture Mode Event Interrupt Clear
2
3
write-only
TIMER_ICR_CAMCINT
GPTM Timer A Capture Mode Match Interrupt Clear
1
2
write-only
TIMER_ICR_CBECINT
GPTM Timer B Capture Mode Event Interrupt Clear
10
11
write-only
TIMER_ICR_CBMCINT
GPTM Timer B Capture Mode Match Interrupt Clear
9
10
write-only
TIMER_ICR_RTCCINT
GPTM RTC Interrupt Clear
3
4
write-only
TIMER_ICR_TAMCINT
GPTM Timer A Match Interrupt Clear
4
5
write-only
TIMER_ICR_TATOCINT
GPTM Timer A Time-Out Raw Interrupt
0
1
write-only
TIMER_ICR_TBMCINT
GPTM Timer B Match Interrupt Clear
11
12
write-only
TIMER_ICR_TBTOCINT
GPTM Timer B Time-Out Interrupt Clear
8
9
write-only
TIMER_ICR_WUECINT
32/64-Bit Wide GPTM Write Update Error Interrupt Clear
16
17
write-only
TIMER0IMR
GPTM Interrupt Mask
0x18
read-write
n
0x0
0x0
TIMER_IMR_CAEIM
GPTM Timer A Capture Mode Event Interrupt Mask
2
3
TIMER_IMR_CAMIM
GPTM Timer A Capture Mode Match Interrupt Mask
1
2
TIMER_IMR_CBEIM
GPTM Timer B Capture Mode Event Interrupt Mask
10
11
TIMER_IMR_CBMIM
GPTM Timer B Capture Mode Match Interrupt Mask
9
10
TIMER_IMR_RTCIM
GPTM RTC Interrupt Mask
3
4
TIMER_IMR_TAMIM
GPTM Timer A Match Interrupt Mask
4
5
TIMER_IMR_TATOIM
GPTM Timer A Time-Out Interrupt Mask
0
1
TIMER_IMR_TBMIM
GPTM Timer B Match Interrupt Mask
11
12
TIMER_IMR_TBTOIM
GPTM Timer B Time-Out Interrupt Mask
8
9
TIMER_IMR_WUEIM
32/64-Bit Wide GPTM Write Update Error Interrupt Mask
16
17
TIMER0MIS
GPTM Masked Interrupt Status
0x20
read-write
n
0x0
0x0
TIMER_MIS_CAEMIS
GPTM Timer A Capture Mode Event Masked Interrupt
2
3
TIMER_MIS_CAMMIS
GPTM Timer A Capture Mode Match Masked Interrupt
1
2
TIMER_MIS_CBEMIS
GPTM Timer B Capture Mode Event Masked Interrupt
10
11
TIMER_MIS_CBMMIS
GPTM Timer B Capture Mode Match Masked Interrupt
9
10
TIMER_MIS_RTCMIS
GPTM RTC Masked Interrupt
3
4
TIMER_MIS_TAMMIS
GPTM Timer A Match Masked Interrupt
4
5
TIMER_MIS_TATOMIS
GPTM Timer A Time-Out Masked Interrupt
0
1
TIMER_MIS_TBMMIS
GPTM Timer B Match Masked Interrupt
11
12
TIMER_MIS_TBTOMIS
GPTM Timer B Time-Out Masked Interrupt
8
9
TIMER_MIS_WUEMIS
32/64-Bit Wide GPTM Write Update Error Masked Interrupt Status
16
17
TIMER0PP
GPTM Peripheral Properties
0xFC0
read-write
n
0x0
0x0
TIMER_PP_SIZE
Count Size
0
4
TIMER_PP_SIZE_16
Timer A and Timer B counters are 16 bits each with an 8-bit prescale counter
0x0
TIMER_PP_SIZE_32
Timer A and Timer B counters are 32 bits each with a 16-bit prescale counter
0x1
TIMER0RIS
GPTM Raw Interrupt Status
0x1C
read-write
n
0x0
0x0
TIMER_RIS_CAERIS
GPTM Timer A Capture Mode Event Raw Interrupt
2
3
TIMER_RIS_CAMRIS
GPTM Timer A Capture Mode Match Raw Interrupt
1
2
TIMER_RIS_CBERIS
GPTM Timer B Capture Mode Event Raw Interrupt
10
11
TIMER_RIS_CBMRIS
GPTM Timer B Capture Mode Match Raw Interrupt
9
10
TIMER_RIS_RTCRIS
GPTM RTC Raw Interrupt
3
4
TIMER_RIS_TAMRIS
GPTM Timer A Match Raw Interrupt
4
5
TIMER_RIS_TATORIS
GPTM Timer A Time-Out Raw Interrupt
0
1
TIMER_RIS_TBMRIS
GPTM Timer B Match Raw Interrupt
11
12
TIMER_RIS_TBTORIS
GPTM Timer B Time-Out Raw Interrupt
8
9
TIMER_RIS_WUERIS
32/64-Bit Wide GPTM Write Update Error Raw Interrupt Status
16
17
TIMER0RTCPD
GPTM RTC Predivide
0x58
read-write
n
0x0
0x0
TIMER_RTCPD_RTCPD
RTC Predivide Counter Value
0
16
TIMER0SYNC
GPTM Synchronize
0x10
read-write
n
0x0
0x0
TIMER_SYNC_SYNCT0
Synchronize GPTM Timer 0
0
2
TIMER_SYNC_SYNCT0_NONE
GPTM0 is not affected
0x0
TIMER_SYNC_SYNCT0_TA
A timeout event for Timer A of GPTM0 is triggered
0x1
TIMER_SYNC_SYNCT0_TB
A timeout event for Timer B of GPTM0 is triggered
0x2
TIMER_SYNC_SYNCT0_TATB
A timeout event for both Timer A and Timer B of GPTM0 is triggered
0x3
TIMER_SYNC_SYNCT1
Synchronize GPTM Timer 1
2
4
TIMER_SYNC_SYNCT1_NONE
GPTM1 is not affected
0x0
TIMER_SYNC_SYNCT1_TA
A timeout event for Timer A of GPTM1 is triggered
0x1
TIMER_SYNC_SYNCT1_TB
A timeout event for Timer B of GPTM1 is triggered
0x2
TIMER_SYNC_SYNCT1_TATB
A timeout event for both Timer A and Timer B of GPTM1 is triggered
0x3
TIMER_SYNC_SYNCT2
Synchronize GPTM Timer 2
4
6
TIMER_SYNC_SYNCT2_NONE
GPTM2 is not affected
0x0
TIMER_SYNC_SYNCT2_TA
A timeout event for Timer A of GPTM2 is triggered
0x1
TIMER_SYNC_SYNCT2_TB
A timeout event for Timer B of GPTM2 is triggered
0x2
TIMER_SYNC_SYNCT2_TATB
A timeout event for both Timer A and Timer B of GPTM2 is triggered
0x3
TIMER_SYNC_SYNCT3
Synchronize GPTM Timer 3
6
8
TIMER_SYNC_SYNCT3_NONE
GPTM3 is not affected
0x0
TIMER_SYNC_SYNCT3_TA
A timeout event for Timer A of GPTM3 is triggered
0x1
TIMER_SYNC_SYNCT3_TB
A timeout event for Timer B of GPTM3 is triggered
0x2
TIMER_SYNC_SYNCT3_TATB
A timeout event for both Timer A and Timer B of GPTM3 is triggered
0x3
TIMER_SYNC_SYNCT4
Synchronize GPTM Timer 4
8
10
TIMER_SYNC_SYNCT4_NONE
GPTM4 is not affected
0x0
TIMER_SYNC_SYNCT4_TA
A timeout event for Timer A of GPTM4 is triggered
0x1
TIMER_SYNC_SYNCT4_TB
A timeout event for Timer B of GPTM4 is triggered
0x2
TIMER_SYNC_SYNCT4_TATB
A timeout event for both Timer A and Timer B of GPTM4 is triggered
0x3
TIMER_SYNC_SYNCT5
Synchronize GPTM Timer 5
10
12
TIMER_SYNC_SYNCT5_NONE
GPTM5 is not affected
0x0
TIMER_SYNC_SYNCT5_TA
A timeout event for Timer A of GPTM5 is triggered
0x1
TIMER_SYNC_SYNCT5_TB
A timeout event for Timer B of GPTM5 is triggered
0x2
TIMER_SYNC_SYNCT5_TATB
A timeout event for both Timer A and Timer B of GPTM5 is triggered
0x3
TIMER_SYNC_SYNCWT0
Synchronize GPTM 32/64-Bit Timer 0
12
14
TIMER_SYNC_SYNCWT0_NONE
GPTM 32/64-Bit Timer 0 is not affected
0x0
TIMER_SYNC_SYNCWT0_TA
A timeout event for Timer A of GPTM 32/64-Bit Timer 0 is triggered
0x1
TIMER_SYNC_SYNCWT0_TB
A timeout event for Timer B of GPTM 32/64-Bit Timer 0 is triggered
0x2
TIMER_SYNC_SYNCWT0_TATB
A timeout event for both Timer A and Timer B of GPTM 32/64-Bit Timer 0 is triggered
0x3
TIMER_SYNC_SYNCWT1
Synchronize GPTM 32/64-Bit Timer 1
14
16
TIMER_SYNC_SYNCWT1_NONE
GPTM 32/64-Bit Timer 1 is not affected
0x0
TIMER_SYNC_SYNCWT1_TA
A timeout event for Timer A of GPTM 32/64-Bit Timer 1 is triggered
0x1
TIMER_SYNC_SYNCWT1_TB
A timeout event for Timer B of GPTM 32/64-Bit Timer 1 is triggered
0x2
TIMER_SYNC_SYNCWT1_TATB
A timeout event for both Timer A and Timer B of GPTM 32/64-Bit Timer 1 is triggered
0x3
TIMER_SYNC_SYNCWT2
Synchronize GPTM 32/64-Bit Timer 2
16
18
TIMER_SYNC_SYNCWT2_NONE
GPTM 32/64-Bit Timer 2 is not affected
0x0
TIMER_SYNC_SYNCWT2_TA
A timeout event for Timer A of GPTM 32/64-Bit Timer 2 is triggered
0x1
TIMER_SYNC_SYNCWT2_TB
A timeout event for Timer B of GPTM 32/64-Bit Timer 2 is triggered
0x2
TIMER_SYNC_SYNCWT2_TATB
A timeout event for both Timer A and Timer B of GPTM 32/64-Bit Timer 2 is triggered
0x3
TIMER_SYNC_SYNCWT3
Synchronize GPTM 32/64-Bit Timer 3
18
20
TIMER_SYNC_SYNCWT3_NONE
GPTM 32/64-Bit Timer 3 is not affected
0x0
TIMER_SYNC_SYNCWT3_TA
A timeout event for Timer A of GPTM 32/64-Bit Timer 3 is triggered
0x1
TIMER_SYNC_SYNCWT3_TB
A timeout event for Timer B of GPTM 32/64-Bit Timer 3 is triggered
0x2
TIMER_SYNC_SYNCWT3_TATB
A timeout event for both Timer A and Timer B of GPTM 32/64-Bit Timer 3 is triggered
0x3
TIMER_SYNC_SYNCWT4
Synchronize GPTM 32/64-Bit Timer 4
20
22
TIMER_SYNC_SYNCWT4_NONE
GPTM 32/64-Bit Timer 4 is not affected
0x0
TIMER_SYNC_SYNCWT4_TA
A timeout event for Timer A of GPTM 32/64-Bit Timer 4 is triggered
0x1
TIMER_SYNC_SYNCWT4_TB
A timeout event for Timer B of GPTM 32/64-Bit Timer 4 is triggered
0x2
TIMER_SYNC_SYNCWT4_TATB
A timeout event for both Timer A and Timer B of GPTM 32/64-Bit Timer 4 is triggered
0x3
TIMER_SYNC_SYNCWT5
Synchronize GPTM 32/64-Bit Timer 5
22
24
TIMER_SYNC_SYNCWT5_NONE
GPTM 32/64-Bit Timer 5 is not affected
0x0
TIMER_SYNC_SYNCWT5_TA
A timeout event for Timer A of GPTM 32/64-Bit Timer 5 is triggered
0x1
TIMER_SYNC_SYNCWT5_TB
A timeout event for Timer B of GPTM 32/64-Bit Timer 5 is triggered
0x2
TIMER_SYNC_SYNCWT5_TATB
A timeout event for both Timer A and Timer B of GPTM 32/64-Bit Timer 5 is triggered
0x3
TIMER0TAILR
GPTM Timer A Interval Load
0x28
read-write
n
0x0
0x0
TIMER0TAMATCHR
GPTM Timer A Match
0x30
read-write
n
0x0
0x0
TIMER0TAMR
GPTM Timer A Mode
0x4
read-write
n
0x0
0x0
TIMER_TAMR_TAAMS
GPTM Timer A Alternate Mode Select
3
4
TIMER_TAMR_TACDIR
GPTM Timer A Count Direction
4
5
TIMER_TAMR_TACMR
GPTM Timer A Capture Mode
2
3
TIMER_TAMR_TAILD
GPTM Timer A Interval Load Write
8
9
TIMER_TAMR_TAMIE
GPTM Timer A Match Interrupt Enable
5
6
TIMER_TAMR_TAMR
GPTM Timer A Mode
0
2
TIMER_TAMR_TAMR_1_SHOT
One-Shot Timer mode
0x1
TIMER_TAMR_TAMR_PERIOD
Periodic Timer mode
0x2
TIMER_TAMR_TAMR_CAP
Capture mode
0x3
TIMER_TAMR_TAMRSU
GPTM Timer A Match Register Update
10
11
TIMER_TAMR_TAPLO
GPTM Timer A PWM Legacy Operation
11
12
TIMER_TAMR_TAPWMIE
GPTM Timer A PWM Interrupt Enable
9
10
TIMER_TAMR_TASNAPS
GPTM Timer A Snap-Shot Mode
7
8
TIMER_TAMR_TAWOT
GPTM Timer A Wait-on-Trigger
6
7
TIMER0TAPMR
GPTM TimerA Prescale Match
0x40
read-write
n
0x0
0x0
TIMER_TAPMR_TAPSMR
GPTM TimerA Prescale Match
0
8
TIMER_TAPMR_TAPSMRH
GPTM Timer A Prescale Match High Byte
8
16
TIMER0TAPR
GPTM Timer A Prescale
0x38
read-write
n
0x0
0x0
TIMER_TAPR_TAPSR
GPTM Timer A Prescale
0
8
TIMER_TAPR_TAPSRH
GPTM Timer A Prescale High Byte
8
16
TIMER0TAPS
GPTM Timer A Prescale Snapshot
0x5C
read-write
n
0x0
0x0
TIMER_TAPS_PSS
GPTM Timer A Prescaler Snapshot
0
16
TIMER0TAPV
GPTM Timer A Prescale Value
0x64
read-write
n
0x0
0x0
TIMER_TAPV_PSV
GPTM Timer A Prescaler Value
0
16
TIMER0TAR
GPTM Timer A
0x48
read-write
n
0x0
0x0
TIMER0TAV
GPTM Timer A Value
0x50
read-write
n
0x0
0x0
TIMER0TBILR
GPTM Timer B Interval Load
0x2C
read-write
n
0x0
0x0
TIMER0TBMATCHR
GPTM Timer B Match
0x34
read-write
n
0x0
0x0
TIMER0TBMR
GPTM Timer B Mode
0x8
read-write
n
0x0
0x0
TIMER_TBMR_TBAMS
GPTM Timer B Alternate Mode Select
3
4
TIMER_TBMR_TBCDIR
GPTM Timer B Count Direction
4
5
TIMER_TBMR_TBCMR
GPTM Timer B Capture Mode
2
3
TIMER_TBMR_TBILD
GPTM Timer B Interval Load Write
8
9
TIMER_TBMR_TBMIE
GPTM Timer B Match Interrupt Enable
5
6
TIMER_TBMR_TBMR
GPTM Timer B Mode
0
2
TIMER_TBMR_TBMR_1_SHOT
One-Shot Timer mode
0x1
TIMER_TBMR_TBMR_PERIOD
Periodic Timer mode
0x2
TIMER_TBMR_TBMR_CAP
Capture mode
0x3
TIMER_TBMR_TBMRSU
GPTM Timer B Match Register Update
10
11
TIMER_TBMR_TBPLO
GPTM Timer B PWM Legacy Operation
11
12
TIMER_TBMR_TBPWMIE
GPTM Timer B PWM Interrupt Enable
9
10
TIMER_TBMR_TBSNAPS
GPTM Timer B Snap-Shot Mode
7
8
TIMER_TBMR_TBWOT
GPTM Timer B Wait-on-Trigger
6
7
TIMER0TBPMR
GPTM TimerB Prescale Match
0x44
read-write
n
0x0
0x0
TIMER_TBPMR_TBPSMR
GPTM TimerB Prescale Match
0
8
TIMER_TBPMR_TBPSMRH
GPTM Timer B Prescale Match High Byte
8
16
TIMER0TBPR
GPTM Timer B Prescale
0x3C
read-write
n
0x0
0x0
TIMER_TBPR_TBPSR
GPTM Timer B Prescale
0
8
TIMER_TBPR_TBPSRH
GPTM Timer B Prescale High Byte
8
16
TIMER0TBPS
GPTM Timer B Prescale Snapshot
0x60
read-write
n
0x0
0x0
TIMER_TBPS_PSS
GPTM Timer A Prescaler Value
0
16
TIMER0TBPV
GPTM Timer B Prescale Value
0x68
read-write
n
0x0
0x0
TIMER_TBPV_PSV
GPTM Timer B Prescaler Value
0
16
TIMER0TBR
GPTM Timer B
0x4C
read-write
n
0x0
0x0
TIMER0TBV
GPTM Timer B Value
0x54
read-write
n
0x0
0x0
WTIMER4
Register map for TIMER0 peripheral
TIMER
0x0
0x0
0x1000
registers
n
WTIMER4A
102
WTIMER4B
103
CFG
GPTM Configuration
0x0
-1
read-write
n
0x0
0x0
TIMER_CFG
GPTM Configuration
0
3
TIMER_CFG_32_BIT_TIMER
For a 16/32-bit timer, this value selects the 32-bit timer configuration
0x0
TIMER_CFG_32_BIT_RTC
For a 16/32-bit timer, this value selects the 32-bit real-time clock (RTC) counter configuration
0x1
TIMER_CFG_16_BIT
For a 16/32-bit timer, this value selects the 16-bit timer configuration
0x4
CTL
GPTM Control
0xC
-1
read-write
n
0x0
0x0
TIMER_CTL_RTCEN
GPTM RTC Stall Enable
4
5
TIMER_CTL_TAEN
GPTM Timer A Enable
0
1
TIMER_CTL_TAEVENT
GPTM Timer A Event Mode
2
4
TIMER_CTL_TAEVENT_POS
Positive edge
0x0
TIMER_CTL_TAEVENT_NEG
Negative edge
0x1
TIMER_CTL_TAEVENT_BOTH
Both edges
0x3
TIMER_CTL_TAOTE
GPTM Timer A Output Trigger Enable
5
6
TIMER_CTL_TAPWML
GPTM Timer A PWM Output Level
6
7
TIMER_CTL_TASTALL
GPTM Timer A Stall Enable
1
2
TIMER_CTL_TBEN
GPTM Timer B Enable
8
9
TIMER_CTL_TBEVENT
GPTM Timer B Event Mode
10
12
TIMER_CTL_TBEVENT_POS
Positive edge
0x0
TIMER_CTL_TBEVENT_NEG
Negative edge
0x1
TIMER_CTL_TBEVENT_BOTH
Both edges
0x3
TIMER_CTL_TBOTE
GPTM Timer B Output Trigger Enable
13
14
TIMER_CTL_TBPWML
GPTM Timer B PWM Output Level
14
15
TIMER_CTL_TBSTALL
GPTM Timer B Stall Enable
9
10
ICR
GPTM Interrupt Clear
0x24
-1
write-only
n
0x0
0x0
TIMER_ICR_CAECINT
GPTM Timer A Capture Mode Event Interrupt Clear
2
3
write-only
TIMER_ICR_CAMCINT
GPTM Timer A Capture Mode Match Interrupt Clear
1
2
write-only
TIMER_ICR_CBECINT
GPTM Timer B Capture Mode Event Interrupt Clear
10
11
write-only
TIMER_ICR_CBMCINT
GPTM Timer B Capture Mode Match Interrupt Clear
9
10
write-only
TIMER_ICR_RTCCINT
GPTM RTC Interrupt Clear
3
4
write-only
TIMER_ICR_TAMCINT
GPTM Timer A Match Interrupt Clear
4
5
write-only
TIMER_ICR_TATOCINT
GPTM Timer A Time-Out Raw Interrupt
0
1
write-only
TIMER_ICR_TBMCINT
GPTM Timer B Match Interrupt Clear
11
12
write-only
TIMER_ICR_TBTOCINT
GPTM Timer B Time-Out Interrupt Clear
8
9
write-only
TIMER_ICR_WUECINT
32/64-Bit Wide GPTM Write Update Error Interrupt Clear
16
17
write-only
IMR
GPTM Interrupt Mask
0x18
-1
read-write
n
0x0
0x0
TIMER_IMR_CAEIM
GPTM Timer A Capture Mode Event Interrupt Mask
2
3
TIMER_IMR_CAMIM
GPTM Timer A Capture Mode Match Interrupt Mask
1
2
TIMER_IMR_CBEIM
GPTM Timer B Capture Mode Event Interrupt Mask
10
11
TIMER_IMR_CBMIM
GPTM Timer B Capture Mode Match Interrupt Mask
9
10
TIMER_IMR_RTCIM
GPTM RTC Interrupt Mask
3
4
TIMER_IMR_TAMIM
GPTM Timer A Match Interrupt Mask
4
5
TIMER_IMR_TATOIM
GPTM Timer A Time-Out Interrupt Mask
0
1
TIMER_IMR_TBMIM
GPTM Timer B Match Interrupt Mask
11
12
TIMER_IMR_TBTOIM
GPTM Timer B Time-Out Interrupt Mask
8
9
TIMER_IMR_WUEIM
32/64-Bit Wide GPTM Write Update Error Interrupt Mask
16
17
MIS
GPTM Masked Interrupt Status
0x20
-1
read-write
n
0x0
0x0
TIMER_MIS_CAEMIS
GPTM Timer A Capture Mode Event Masked Interrupt
2
3
TIMER_MIS_CAMMIS
GPTM Timer A Capture Mode Match Masked Interrupt
1
2
TIMER_MIS_CBEMIS
GPTM Timer B Capture Mode Event Masked Interrupt
10
11
TIMER_MIS_CBMMIS
GPTM Timer B Capture Mode Match Masked Interrupt
9
10
TIMER_MIS_RTCMIS
GPTM RTC Masked Interrupt
3
4
TIMER_MIS_TAMMIS
GPTM Timer A Match Masked Interrupt
4
5
TIMER_MIS_TATOMIS
GPTM Timer A Time-Out Masked Interrupt
0
1
TIMER_MIS_TBMMIS
GPTM Timer B Match Masked Interrupt
11
12
TIMER_MIS_TBTOMIS
GPTM Timer B Time-Out Masked Interrupt
8
9
TIMER_MIS_WUEMIS
32/64-Bit Wide GPTM Write Update Error Masked Interrupt Status
16
17
PP
GPTM Peripheral Properties
0xFC0
-1
read-write
n
0x0
0x0
TIMER_PP_SIZE
Count Size
0
4
TIMER_PP_SIZE_16
Timer A and Timer B counters are 16 bits each with an 8-bit prescale counter
0x0
TIMER_PP_SIZE_32
Timer A and Timer B counters are 32 bits each with a 16-bit prescale counter
0x1
RIS
GPTM Raw Interrupt Status
0x1C
-1
read-write
n
0x0
0x0
TIMER_RIS_CAERIS
GPTM Timer A Capture Mode Event Raw Interrupt
2
3
TIMER_RIS_CAMRIS
GPTM Timer A Capture Mode Match Raw Interrupt
1
2
TIMER_RIS_CBERIS
GPTM Timer B Capture Mode Event Raw Interrupt
10
11
TIMER_RIS_CBMRIS
GPTM Timer B Capture Mode Match Raw Interrupt
9
10
TIMER_RIS_RTCRIS
GPTM RTC Raw Interrupt
3
4
TIMER_RIS_TAMRIS
GPTM Timer A Match Raw Interrupt
4
5
TIMER_RIS_TATORIS
GPTM Timer A Time-Out Raw Interrupt
0
1
TIMER_RIS_TBMRIS
GPTM Timer B Match Raw Interrupt
11
12
TIMER_RIS_TBTORIS
GPTM Timer B Time-Out Raw Interrupt
8
9
TIMER_RIS_WUERIS
32/64-Bit Wide GPTM Write Update Error Raw Interrupt Status
16
17
RTCPD
GPTM RTC Predivide
0x58
-1
read-write
n
0x0
0x0
TIMER_RTCPD_RTCPD
RTC Predivide Counter Value
0
16
SYNC
GPTM Synchronize
0x10
-1
read-write
n
0x0
0x0
TIMER_SYNC_SYNCT0
Synchronize GPTM Timer 0
0
2
TIMER_SYNC_SYNCT0_NONE
GPTM0 is not affected
0x0
TIMER_SYNC_SYNCT0_TA
A timeout event for Timer A of GPTM0 is triggered
0x1
TIMER_SYNC_SYNCT0_TB
A timeout event for Timer B of GPTM0 is triggered
0x2
TIMER_SYNC_SYNCT0_TATB
A timeout event for both Timer A and Timer B of GPTM0 is triggered
0x3
TIMER_SYNC_SYNCT1
Synchronize GPTM Timer 1
2
4
TIMER_SYNC_SYNCT1_NONE
GPTM1 is not affected
0x0
TIMER_SYNC_SYNCT1_TA
A timeout event for Timer A of GPTM1 is triggered
0x1
TIMER_SYNC_SYNCT1_TB
A timeout event for Timer B of GPTM1 is triggered
0x2
TIMER_SYNC_SYNCT1_TATB
A timeout event for both Timer A and Timer B of GPTM1 is triggered
0x3
TIMER_SYNC_SYNCT2
Synchronize GPTM Timer 2
4
6
TIMER_SYNC_SYNCT2_NONE
GPTM2 is not affected
0x0
TIMER_SYNC_SYNCT2_TA
A timeout event for Timer A of GPTM2 is triggered
0x1
TIMER_SYNC_SYNCT2_TB
A timeout event for Timer B of GPTM2 is triggered
0x2
TIMER_SYNC_SYNCT2_TATB
A timeout event for both Timer A and Timer B of GPTM2 is triggered
0x3
TIMER_SYNC_SYNCT3
Synchronize GPTM Timer 3
6
8
TIMER_SYNC_SYNCT3_NONE
GPTM3 is not affected
0x0
TIMER_SYNC_SYNCT3_TA
A timeout event for Timer A of GPTM3 is triggered
0x1
TIMER_SYNC_SYNCT3_TB
A timeout event for Timer B of GPTM3 is triggered
0x2
TIMER_SYNC_SYNCT3_TATB
A timeout event for both Timer A and Timer B of GPTM3 is triggered
0x3
TIMER_SYNC_SYNCT4
Synchronize GPTM Timer 4
8
10
TIMER_SYNC_SYNCT4_NONE
GPTM4 is not affected
0x0
TIMER_SYNC_SYNCT4_TA
A timeout event for Timer A of GPTM4 is triggered
0x1
TIMER_SYNC_SYNCT4_TB
A timeout event for Timer B of GPTM4 is triggered
0x2
TIMER_SYNC_SYNCT4_TATB
A timeout event for both Timer A and Timer B of GPTM4 is triggered
0x3
TIMER_SYNC_SYNCT5
Synchronize GPTM Timer 5
10
12
TIMER_SYNC_SYNCT5_NONE
GPTM5 is not affected
0x0
TIMER_SYNC_SYNCT5_TA
A timeout event for Timer A of GPTM5 is triggered
0x1
TIMER_SYNC_SYNCT5_TB
A timeout event for Timer B of GPTM5 is triggered
0x2
TIMER_SYNC_SYNCT5_TATB
A timeout event for both Timer A and Timer B of GPTM5 is triggered
0x3
TIMER_SYNC_SYNCWT0
Synchronize GPTM 32/64-Bit Timer 0
12
14
TIMER_SYNC_SYNCWT0_NONE
GPTM 32/64-Bit Timer 0 is not affected
0x0
TIMER_SYNC_SYNCWT0_TA
A timeout event for Timer A of GPTM 32/64-Bit Timer 0 is triggered
0x1
TIMER_SYNC_SYNCWT0_TB
A timeout event for Timer B of GPTM 32/64-Bit Timer 0 is triggered
0x2
TIMER_SYNC_SYNCWT0_TATB
A timeout event for both Timer A and Timer B of GPTM 32/64-Bit Timer 0 is triggered
0x3
TIMER_SYNC_SYNCWT1
Synchronize GPTM 32/64-Bit Timer 1
14
16
TIMER_SYNC_SYNCWT1_NONE
GPTM 32/64-Bit Timer 1 is not affected
0x0
TIMER_SYNC_SYNCWT1_TA
A timeout event for Timer A of GPTM 32/64-Bit Timer 1 is triggered
0x1
TIMER_SYNC_SYNCWT1_TB
A timeout event for Timer B of GPTM 32/64-Bit Timer 1 is triggered
0x2
TIMER_SYNC_SYNCWT1_TATB
A timeout event for both Timer A and Timer B of GPTM 32/64-Bit Timer 1 is triggered
0x3
TIMER_SYNC_SYNCWT2
Synchronize GPTM 32/64-Bit Timer 2
16
18
TIMER_SYNC_SYNCWT2_NONE
GPTM 32/64-Bit Timer 2 is not affected
0x0
TIMER_SYNC_SYNCWT2_TA
A timeout event for Timer A of GPTM 32/64-Bit Timer 2 is triggered
0x1
TIMER_SYNC_SYNCWT2_TB
A timeout event for Timer B of GPTM 32/64-Bit Timer 2 is triggered
0x2
TIMER_SYNC_SYNCWT2_TATB
A timeout event for both Timer A and Timer B of GPTM 32/64-Bit Timer 2 is triggered
0x3
TIMER_SYNC_SYNCWT3
Synchronize GPTM 32/64-Bit Timer 3
18
20
TIMER_SYNC_SYNCWT3_NONE
GPTM 32/64-Bit Timer 3 is not affected
0x0
TIMER_SYNC_SYNCWT3_TA
A timeout event for Timer A of GPTM 32/64-Bit Timer 3 is triggered
0x1
TIMER_SYNC_SYNCWT3_TB
A timeout event for Timer B of GPTM 32/64-Bit Timer 3 is triggered
0x2
TIMER_SYNC_SYNCWT3_TATB
A timeout event for both Timer A and Timer B of GPTM 32/64-Bit Timer 3 is triggered
0x3
TIMER_SYNC_SYNCWT4
Synchronize GPTM 32/64-Bit Timer 4
20
22
TIMER_SYNC_SYNCWT4_NONE
GPTM 32/64-Bit Timer 4 is not affected
0x0
TIMER_SYNC_SYNCWT4_TA
A timeout event for Timer A of GPTM 32/64-Bit Timer 4 is triggered
0x1
TIMER_SYNC_SYNCWT4_TB
A timeout event for Timer B of GPTM 32/64-Bit Timer 4 is triggered
0x2
TIMER_SYNC_SYNCWT4_TATB
A timeout event for both Timer A and Timer B of GPTM 32/64-Bit Timer 4 is triggered
0x3
TIMER_SYNC_SYNCWT5
Synchronize GPTM 32/64-Bit Timer 5
22
24
TIMER_SYNC_SYNCWT5_NONE
GPTM 32/64-Bit Timer 5 is not affected
0x0
TIMER_SYNC_SYNCWT5_TA
A timeout event for Timer A of GPTM 32/64-Bit Timer 5 is triggered
0x1
TIMER_SYNC_SYNCWT5_TB
A timeout event for Timer B of GPTM 32/64-Bit Timer 5 is triggered
0x2
TIMER_SYNC_SYNCWT5_TATB
A timeout event for both Timer A and Timer B of GPTM 32/64-Bit Timer 5 is triggered
0x3
TAILR
GPTM Timer A Interval Load
0x28
-1
read-write
n
0x0
0x0
TAMATCHR
GPTM Timer A Match
0x30
-1
read-write
n
0x0
0x0
TAMR
GPTM Timer A Mode
0x4
-1
read-write
n
0x0
0x0
TIMER_TAMR_TAAMS
GPTM Timer A Alternate Mode Select
3
4
TIMER_TAMR_TACDIR
GPTM Timer A Count Direction
4
5
TIMER_TAMR_TACMR
GPTM Timer A Capture Mode
2
3
TIMER_TAMR_TAILD
GPTM Timer A Interval Load Write
8
9
TIMER_TAMR_TAMIE
GPTM Timer A Match Interrupt Enable
5
6
TIMER_TAMR_TAMR
GPTM Timer A Mode
0
2
TIMER_TAMR_TAMR_1_SHOT
One-Shot Timer mode
0x1
TIMER_TAMR_TAMR_PERIOD
Periodic Timer mode
0x2
TIMER_TAMR_TAMR_CAP
Capture mode
0x3
TIMER_TAMR_TAMRSU
GPTM Timer A Match Register Update
10
11
TIMER_TAMR_TAPLO
GPTM Timer A PWM Legacy Operation
11
12
TIMER_TAMR_TAPWMIE
GPTM Timer A PWM Interrupt Enable
9
10
TIMER_TAMR_TASNAPS
GPTM Timer A Snap-Shot Mode
7
8
TIMER_TAMR_TAWOT
GPTM Timer A Wait-on-Trigger
6
7
TAPMR
GPTM TimerA Prescale Match
0x40
-1
read-write
n
0x0
0x0
TIMER_TAPMR_TAPSMR
GPTM TimerA Prescale Match
0
8
TIMER_TAPMR_TAPSMRH
GPTM Timer A Prescale Match High Byte
8
16
TAPR
GPTM Timer A Prescale
0x38
-1
read-write
n
0x0
0x0
TIMER_TAPR_TAPSR
GPTM Timer A Prescale
0
8
TIMER_TAPR_TAPSRH
GPTM Timer A Prescale High Byte
8
16
TAPS
GPTM Timer A Prescale Snapshot
0x5C
-1
read-write
n
0x0
0x0
TIMER_TAPS_PSS
GPTM Timer A Prescaler Snapshot
0
16
TAPV
GPTM Timer A Prescale Value
0x64
-1
read-write
n
0x0
0x0
TIMER_TAPV_PSV
GPTM Timer A Prescaler Value
0
16
TAR
GPTM Timer A
0x48
-1
read-write
n
0x0
0x0
TAV
GPTM Timer A Value
0x50
-1
read-write
n
0x0
0x0
TBILR
GPTM Timer B Interval Load
0x2C
-1
read-write
n
0x0
0x0
TBMATCHR
GPTM Timer B Match
0x34
-1
read-write
n
0x0
0x0
TBMR
GPTM Timer B Mode
0x8
-1
read-write
n
0x0
0x0
TIMER_TBMR_TBAMS
GPTM Timer B Alternate Mode Select
3
4
TIMER_TBMR_TBCDIR
GPTM Timer B Count Direction
4
5
TIMER_TBMR_TBCMR
GPTM Timer B Capture Mode
2
3
TIMER_TBMR_TBILD
GPTM Timer B Interval Load Write
8
9
TIMER_TBMR_TBMIE
GPTM Timer B Match Interrupt Enable
5
6
TIMER_TBMR_TBMR
GPTM Timer B Mode
0
2
TIMER_TBMR_TBMR_1_SHOT
One-Shot Timer mode
0x1
TIMER_TBMR_TBMR_PERIOD
Periodic Timer mode
0x2
TIMER_TBMR_TBMR_CAP
Capture mode
0x3
TIMER_TBMR_TBMRSU
GPTM Timer B Match Register Update
10
11
TIMER_TBMR_TBPLO
GPTM Timer B PWM Legacy Operation
11
12
TIMER_TBMR_TBPWMIE
GPTM Timer B PWM Interrupt Enable
9
10
TIMER_TBMR_TBSNAPS
GPTM Timer B Snap-Shot Mode
7
8
TIMER_TBMR_TBWOT
GPTM Timer B Wait-on-Trigger
6
7
TBPMR
GPTM TimerB Prescale Match
0x44
-1
read-write
n
0x0
0x0
TIMER_TBPMR_TBPSMR
GPTM TimerB Prescale Match
0
8
TIMER_TBPMR_TBPSMRH
GPTM Timer B Prescale Match High Byte
8
16
TBPR
GPTM Timer B Prescale
0x3C
-1
read-write
n
0x0
0x0
TIMER_TBPR_TBPSR
GPTM Timer B Prescale
0
8
TIMER_TBPR_TBPSRH
GPTM Timer B Prescale High Byte
8
16
TBPS
GPTM Timer B Prescale Snapshot
0x60
-1
read-write
n
0x0
0x0
TIMER_TBPS_PSS
GPTM Timer A Prescaler Value
0
16
TBPV
GPTM Timer B Prescale Value
0x68
-1
read-write
n
0x0
0x0
TIMER_TBPV_PSV
GPTM Timer B Prescaler Value
0
16
TBR
GPTM Timer B
0x4C
-1
read-write
n
0x0
0x0
TBV
GPTM Timer B Value
0x54
-1
read-write
n
0x0
0x0
TIMER0CFG
GPTM Configuration
0x0
read-write
n
0x0
0x0
TIMER_CFG
GPTM Configuration
0
3
TIMER_CFG_32_BIT_TIMER
For a 16/32-bit timer, this value selects the 32-bit timer configuration
0x0
TIMER_CFG_32_BIT_RTC
For a 16/32-bit timer, this value selects the 32-bit real-time clock (RTC) counter configuration
0x1
TIMER_CFG_16_BIT
For a 16/32-bit timer, this value selects the 16-bit timer configuration
0x4
TIMER0CTL
GPTM Control
0xC
read-write
n
0x0
0x0
TIMER_CTL_RTCEN
GPTM RTC Stall Enable
4
5
TIMER_CTL_TAEN
GPTM Timer A Enable
0
1
TIMER_CTL_TAEVENT
GPTM Timer A Event Mode
2
4
TIMER_CTL_TAEVENT_POS
Positive edge
0x0
TIMER_CTL_TAEVENT_NEG
Negative edge
0x1
TIMER_CTL_TAEVENT_BOTH
Both edges
0x3
TIMER_CTL_TAOTE
GPTM Timer A Output Trigger Enable
5
6
TIMER_CTL_TAPWML
GPTM Timer A PWM Output Level
6
7
TIMER_CTL_TASTALL
GPTM Timer A Stall Enable
1
2
TIMER_CTL_TBEN
GPTM Timer B Enable
8
9
TIMER_CTL_TBEVENT
GPTM Timer B Event Mode
10
12
TIMER_CTL_TBEVENT_POS
Positive edge
0x0
TIMER_CTL_TBEVENT_NEG
Negative edge
0x1
TIMER_CTL_TBEVENT_BOTH
Both edges
0x3
TIMER_CTL_TBOTE
GPTM Timer B Output Trigger Enable
13
14
TIMER_CTL_TBPWML
GPTM Timer B PWM Output Level
14
15
TIMER_CTL_TBSTALL
GPTM Timer B Stall Enable
9
10
TIMER0ICR
GPTM Interrupt Clear
0x24
write-only
n
0x0
0x0
TIMER_ICR_CAECINT
GPTM Timer A Capture Mode Event Interrupt Clear
2
3
write-only
TIMER_ICR_CAMCINT
GPTM Timer A Capture Mode Match Interrupt Clear
1
2
write-only
TIMER_ICR_CBECINT
GPTM Timer B Capture Mode Event Interrupt Clear
10
11
write-only
TIMER_ICR_CBMCINT
GPTM Timer B Capture Mode Match Interrupt Clear
9
10
write-only
TIMER_ICR_RTCCINT
GPTM RTC Interrupt Clear
3
4
write-only
TIMER_ICR_TAMCINT
GPTM Timer A Match Interrupt Clear
4
5
write-only
TIMER_ICR_TATOCINT
GPTM Timer A Time-Out Raw Interrupt
0
1
write-only
TIMER_ICR_TBMCINT
GPTM Timer B Match Interrupt Clear
11
12
write-only
TIMER_ICR_TBTOCINT
GPTM Timer B Time-Out Interrupt Clear
8
9
write-only
TIMER_ICR_WUECINT
32/64-Bit Wide GPTM Write Update Error Interrupt Clear
16
17
write-only
TIMER0IMR
GPTM Interrupt Mask
0x18
read-write
n
0x0
0x0
TIMER_IMR_CAEIM
GPTM Timer A Capture Mode Event Interrupt Mask
2
3
TIMER_IMR_CAMIM
GPTM Timer A Capture Mode Match Interrupt Mask
1
2
TIMER_IMR_CBEIM
GPTM Timer B Capture Mode Event Interrupt Mask
10
11
TIMER_IMR_CBMIM
GPTM Timer B Capture Mode Match Interrupt Mask
9
10
TIMER_IMR_RTCIM
GPTM RTC Interrupt Mask
3
4
TIMER_IMR_TAMIM
GPTM Timer A Match Interrupt Mask
4
5
TIMER_IMR_TATOIM
GPTM Timer A Time-Out Interrupt Mask
0
1
TIMER_IMR_TBMIM
GPTM Timer B Match Interrupt Mask
11
12
TIMER_IMR_TBTOIM
GPTM Timer B Time-Out Interrupt Mask
8
9
TIMER_IMR_WUEIM
32/64-Bit Wide GPTM Write Update Error Interrupt Mask
16
17
TIMER0MIS
GPTM Masked Interrupt Status
0x20
read-write
n
0x0
0x0
TIMER_MIS_CAEMIS
GPTM Timer A Capture Mode Event Masked Interrupt
2
3
TIMER_MIS_CAMMIS
GPTM Timer A Capture Mode Match Masked Interrupt
1
2
TIMER_MIS_CBEMIS
GPTM Timer B Capture Mode Event Masked Interrupt
10
11
TIMER_MIS_CBMMIS
GPTM Timer B Capture Mode Match Masked Interrupt
9
10
TIMER_MIS_RTCMIS
GPTM RTC Masked Interrupt
3
4
TIMER_MIS_TAMMIS
GPTM Timer A Match Masked Interrupt
4
5
TIMER_MIS_TATOMIS
GPTM Timer A Time-Out Masked Interrupt
0
1
TIMER_MIS_TBMMIS
GPTM Timer B Match Masked Interrupt
11
12
TIMER_MIS_TBTOMIS
GPTM Timer B Time-Out Masked Interrupt
8
9
TIMER_MIS_WUEMIS
32/64-Bit Wide GPTM Write Update Error Masked Interrupt Status
16
17
TIMER0PP
GPTM Peripheral Properties
0xFC0
read-write
n
0x0
0x0
TIMER_PP_SIZE
Count Size
0
4
TIMER_PP_SIZE_16
Timer A and Timer B counters are 16 bits each with an 8-bit prescale counter
0x0
TIMER_PP_SIZE_32
Timer A and Timer B counters are 32 bits each with a 16-bit prescale counter
0x1
TIMER0RIS
GPTM Raw Interrupt Status
0x1C
read-write
n
0x0
0x0
TIMER_RIS_CAERIS
GPTM Timer A Capture Mode Event Raw Interrupt
2
3
TIMER_RIS_CAMRIS
GPTM Timer A Capture Mode Match Raw Interrupt
1
2
TIMER_RIS_CBERIS
GPTM Timer B Capture Mode Event Raw Interrupt
10
11
TIMER_RIS_CBMRIS
GPTM Timer B Capture Mode Match Raw Interrupt
9
10
TIMER_RIS_RTCRIS
GPTM RTC Raw Interrupt
3
4
TIMER_RIS_TAMRIS
GPTM Timer A Match Raw Interrupt
4
5
TIMER_RIS_TATORIS
GPTM Timer A Time-Out Raw Interrupt
0
1
TIMER_RIS_TBMRIS
GPTM Timer B Match Raw Interrupt
11
12
TIMER_RIS_TBTORIS
GPTM Timer B Time-Out Raw Interrupt
8
9
TIMER_RIS_WUERIS
32/64-Bit Wide GPTM Write Update Error Raw Interrupt Status
16
17
TIMER0RTCPD
GPTM RTC Predivide
0x58
read-write
n
0x0
0x0
TIMER_RTCPD_RTCPD
RTC Predivide Counter Value
0
16
TIMER0SYNC
GPTM Synchronize
0x10
read-write
n
0x0
0x0
TIMER_SYNC_SYNCT0
Synchronize GPTM Timer 0
0
2
TIMER_SYNC_SYNCT0_NONE
GPTM0 is not affected
0x0
TIMER_SYNC_SYNCT0_TA
A timeout event for Timer A of GPTM0 is triggered
0x1
TIMER_SYNC_SYNCT0_TB
A timeout event for Timer B of GPTM0 is triggered
0x2
TIMER_SYNC_SYNCT0_TATB
A timeout event for both Timer A and Timer B of GPTM0 is triggered
0x3
TIMER_SYNC_SYNCT1
Synchronize GPTM Timer 1
2
4
TIMER_SYNC_SYNCT1_NONE
GPTM1 is not affected
0x0
TIMER_SYNC_SYNCT1_TA
A timeout event for Timer A of GPTM1 is triggered
0x1
TIMER_SYNC_SYNCT1_TB
A timeout event for Timer B of GPTM1 is triggered
0x2
TIMER_SYNC_SYNCT1_TATB
A timeout event for both Timer A and Timer B of GPTM1 is triggered
0x3
TIMER_SYNC_SYNCT2
Synchronize GPTM Timer 2
4
6
TIMER_SYNC_SYNCT2_NONE
GPTM2 is not affected
0x0
TIMER_SYNC_SYNCT2_TA
A timeout event for Timer A of GPTM2 is triggered
0x1
TIMER_SYNC_SYNCT2_TB
A timeout event for Timer B of GPTM2 is triggered
0x2
TIMER_SYNC_SYNCT2_TATB
A timeout event for both Timer A and Timer B of GPTM2 is triggered
0x3
TIMER_SYNC_SYNCT3
Synchronize GPTM Timer 3
6
8
TIMER_SYNC_SYNCT3_NONE
GPTM3 is not affected
0x0
TIMER_SYNC_SYNCT3_TA
A timeout event for Timer A of GPTM3 is triggered
0x1
TIMER_SYNC_SYNCT3_TB
A timeout event for Timer B of GPTM3 is triggered
0x2
TIMER_SYNC_SYNCT3_TATB
A timeout event for both Timer A and Timer B of GPTM3 is triggered
0x3
TIMER_SYNC_SYNCT4
Synchronize GPTM Timer 4
8
10
TIMER_SYNC_SYNCT4_NONE
GPTM4 is not affected
0x0
TIMER_SYNC_SYNCT4_TA
A timeout event for Timer A of GPTM4 is triggered
0x1
TIMER_SYNC_SYNCT4_TB
A timeout event for Timer B of GPTM4 is triggered
0x2
TIMER_SYNC_SYNCT4_TATB
A timeout event for both Timer A and Timer B of GPTM4 is triggered
0x3
TIMER_SYNC_SYNCT5
Synchronize GPTM Timer 5
10
12
TIMER_SYNC_SYNCT5_NONE
GPTM5 is not affected
0x0
TIMER_SYNC_SYNCT5_TA
A timeout event for Timer A of GPTM5 is triggered
0x1
TIMER_SYNC_SYNCT5_TB
A timeout event for Timer B of GPTM5 is triggered
0x2
TIMER_SYNC_SYNCT5_TATB
A timeout event for both Timer A and Timer B of GPTM5 is triggered
0x3
TIMER_SYNC_SYNCWT0
Synchronize GPTM 32/64-Bit Timer 0
12
14
TIMER_SYNC_SYNCWT0_NONE
GPTM 32/64-Bit Timer 0 is not affected
0x0
TIMER_SYNC_SYNCWT0_TA
A timeout event for Timer A of GPTM 32/64-Bit Timer 0 is triggered
0x1
TIMER_SYNC_SYNCWT0_TB
A timeout event for Timer B of GPTM 32/64-Bit Timer 0 is triggered
0x2
TIMER_SYNC_SYNCWT0_TATB
A timeout event for both Timer A and Timer B of GPTM 32/64-Bit Timer 0 is triggered
0x3
TIMER_SYNC_SYNCWT1
Synchronize GPTM 32/64-Bit Timer 1
14
16
TIMER_SYNC_SYNCWT1_NONE
GPTM 32/64-Bit Timer 1 is not affected
0x0
TIMER_SYNC_SYNCWT1_TA
A timeout event for Timer A of GPTM 32/64-Bit Timer 1 is triggered
0x1
TIMER_SYNC_SYNCWT1_TB
A timeout event for Timer B of GPTM 32/64-Bit Timer 1 is triggered
0x2
TIMER_SYNC_SYNCWT1_TATB
A timeout event for both Timer A and Timer B of GPTM 32/64-Bit Timer 1 is triggered
0x3
TIMER_SYNC_SYNCWT2
Synchronize GPTM 32/64-Bit Timer 2
16
18
TIMER_SYNC_SYNCWT2_NONE
GPTM 32/64-Bit Timer 2 is not affected
0x0
TIMER_SYNC_SYNCWT2_TA
A timeout event for Timer A of GPTM 32/64-Bit Timer 2 is triggered
0x1
TIMER_SYNC_SYNCWT2_TB
A timeout event for Timer B of GPTM 32/64-Bit Timer 2 is triggered
0x2
TIMER_SYNC_SYNCWT2_TATB
A timeout event for both Timer A and Timer B of GPTM 32/64-Bit Timer 2 is triggered
0x3
TIMER_SYNC_SYNCWT3
Synchronize GPTM 32/64-Bit Timer 3
18
20
TIMER_SYNC_SYNCWT3_NONE
GPTM 32/64-Bit Timer 3 is not affected
0x0
TIMER_SYNC_SYNCWT3_TA
A timeout event for Timer A of GPTM 32/64-Bit Timer 3 is triggered
0x1
TIMER_SYNC_SYNCWT3_TB
A timeout event for Timer B of GPTM 32/64-Bit Timer 3 is triggered
0x2
TIMER_SYNC_SYNCWT3_TATB
A timeout event for both Timer A and Timer B of GPTM 32/64-Bit Timer 3 is triggered
0x3
TIMER_SYNC_SYNCWT4
Synchronize GPTM 32/64-Bit Timer 4
20
22
TIMER_SYNC_SYNCWT4_NONE
GPTM 32/64-Bit Timer 4 is not affected
0x0
TIMER_SYNC_SYNCWT4_TA
A timeout event for Timer A of GPTM 32/64-Bit Timer 4 is triggered
0x1
TIMER_SYNC_SYNCWT4_TB
A timeout event for Timer B of GPTM 32/64-Bit Timer 4 is triggered
0x2
TIMER_SYNC_SYNCWT4_TATB
A timeout event for both Timer A and Timer B of GPTM 32/64-Bit Timer 4 is triggered
0x3
TIMER_SYNC_SYNCWT5
Synchronize GPTM 32/64-Bit Timer 5
22
24
TIMER_SYNC_SYNCWT5_NONE
GPTM 32/64-Bit Timer 5 is not affected
0x0
TIMER_SYNC_SYNCWT5_TA
A timeout event for Timer A of GPTM 32/64-Bit Timer 5 is triggered
0x1
TIMER_SYNC_SYNCWT5_TB
A timeout event for Timer B of GPTM 32/64-Bit Timer 5 is triggered
0x2
TIMER_SYNC_SYNCWT5_TATB
A timeout event for both Timer A and Timer B of GPTM 32/64-Bit Timer 5 is triggered
0x3
TIMER0TAILR
GPTM Timer A Interval Load
0x28
read-write
n
0x0
0x0
TIMER0TAMATCHR
GPTM Timer A Match
0x30
read-write
n
0x0
0x0
TIMER0TAMR
GPTM Timer A Mode
0x4
read-write
n
0x0
0x0
TIMER_TAMR_TAAMS
GPTM Timer A Alternate Mode Select
3
4
TIMER_TAMR_TACDIR
GPTM Timer A Count Direction
4
5
TIMER_TAMR_TACMR
GPTM Timer A Capture Mode
2
3
TIMER_TAMR_TAILD
GPTM Timer A Interval Load Write
8
9
TIMER_TAMR_TAMIE
GPTM Timer A Match Interrupt Enable
5
6
TIMER_TAMR_TAMR
GPTM Timer A Mode
0
2
TIMER_TAMR_TAMR_1_SHOT
One-Shot Timer mode
0x1
TIMER_TAMR_TAMR_PERIOD
Periodic Timer mode
0x2
TIMER_TAMR_TAMR_CAP
Capture mode
0x3
TIMER_TAMR_TAMRSU
GPTM Timer A Match Register Update
10
11
TIMER_TAMR_TAPLO
GPTM Timer A PWM Legacy Operation
11
12
TIMER_TAMR_TAPWMIE
GPTM Timer A PWM Interrupt Enable
9
10
TIMER_TAMR_TASNAPS
GPTM Timer A Snap-Shot Mode
7
8
TIMER_TAMR_TAWOT
GPTM Timer A Wait-on-Trigger
6
7
TIMER0TAPMR
GPTM TimerA Prescale Match
0x40
read-write
n
0x0
0x0
TIMER_TAPMR_TAPSMR
GPTM TimerA Prescale Match
0
8
TIMER_TAPMR_TAPSMRH
GPTM Timer A Prescale Match High Byte
8
16
TIMER0TAPR
GPTM Timer A Prescale
0x38
read-write
n
0x0
0x0
TIMER_TAPR_TAPSR
GPTM Timer A Prescale
0
8
TIMER_TAPR_TAPSRH
GPTM Timer A Prescale High Byte
8
16
TIMER0TAPS
GPTM Timer A Prescale Snapshot
0x5C
read-write
n
0x0
0x0
TIMER_TAPS_PSS
GPTM Timer A Prescaler Snapshot
0
16
TIMER0TAPV
GPTM Timer A Prescale Value
0x64
read-write
n
0x0
0x0
TIMER_TAPV_PSV
GPTM Timer A Prescaler Value
0
16
TIMER0TAR
GPTM Timer A
0x48
read-write
n
0x0
0x0
TIMER0TAV
GPTM Timer A Value
0x50
read-write
n
0x0
0x0
TIMER0TBILR
GPTM Timer B Interval Load
0x2C
read-write
n
0x0
0x0
TIMER0TBMATCHR
GPTM Timer B Match
0x34
read-write
n
0x0
0x0
TIMER0TBMR
GPTM Timer B Mode
0x8
read-write
n
0x0
0x0
TIMER_TBMR_TBAMS
GPTM Timer B Alternate Mode Select
3
4
TIMER_TBMR_TBCDIR
GPTM Timer B Count Direction
4
5
TIMER_TBMR_TBCMR
GPTM Timer B Capture Mode
2
3
TIMER_TBMR_TBILD
GPTM Timer B Interval Load Write
8
9
TIMER_TBMR_TBMIE
GPTM Timer B Match Interrupt Enable
5
6
TIMER_TBMR_TBMR
GPTM Timer B Mode
0
2
TIMER_TBMR_TBMR_1_SHOT
One-Shot Timer mode
0x1
TIMER_TBMR_TBMR_PERIOD
Periodic Timer mode
0x2
TIMER_TBMR_TBMR_CAP
Capture mode
0x3
TIMER_TBMR_TBMRSU
GPTM Timer B Match Register Update
10
11
TIMER_TBMR_TBPLO
GPTM Timer B PWM Legacy Operation
11
12
TIMER_TBMR_TBPWMIE
GPTM Timer B PWM Interrupt Enable
9
10
TIMER_TBMR_TBSNAPS
GPTM Timer B Snap-Shot Mode
7
8
TIMER_TBMR_TBWOT
GPTM Timer B Wait-on-Trigger
6
7
TIMER0TBPMR
GPTM TimerB Prescale Match
0x44
read-write
n
0x0
0x0
TIMER_TBPMR_TBPSMR
GPTM TimerB Prescale Match
0
8
TIMER_TBPMR_TBPSMRH
GPTM Timer B Prescale Match High Byte
8
16
TIMER0TBPR
GPTM Timer B Prescale
0x3C
read-write
n
0x0
0x0
TIMER_TBPR_TBPSR
GPTM Timer B Prescale
0
8
TIMER_TBPR_TBPSRH
GPTM Timer B Prescale High Byte
8
16
TIMER0TBPS
GPTM Timer B Prescale Snapshot
0x60
read-write
n
0x0
0x0
TIMER_TBPS_PSS
GPTM Timer A Prescaler Value
0
16
TIMER0TBPV
GPTM Timer B Prescale Value
0x68
read-write
n
0x0
0x0
TIMER_TBPV_PSV
GPTM Timer B Prescaler Value
0
16
TIMER0TBR
GPTM Timer B
0x4C
read-write
n
0x0
0x0
TIMER0TBV
GPTM Timer B Value
0x54
read-write
n
0x0
0x0
WTIMER5
Register map for TIMER0 peripheral
TIMER
0x0
0x0
0x1000
registers
n
WTIMER5A
104
WTIMER5B
105
CFG
GPTM Configuration
0x0
-1
read-write
n
0x0
0x0
TIMER_CFG
GPTM Configuration
0
3
TIMER_CFG_32_BIT_TIMER
For a 16/32-bit timer, this value selects the 32-bit timer configuration
0x0
TIMER_CFG_32_BIT_RTC
For a 16/32-bit timer, this value selects the 32-bit real-time clock (RTC) counter configuration
0x1
TIMER_CFG_16_BIT
For a 16/32-bit timer, this value selects the 16-bit timer configuration
0x4
CTL
GPTM Control
0xC
-1
read-write
n
0x0
0x0
TIMER_CTL_RTCEN
GPTM RTC Stall Enable
4
5
TIMER_CTL_TAEN
GPTM Timer A Enable
0
1
TIMER_CTL_TAEVENT
GPTM Timer A Event Mode
2
4
TIMER_CTL_TAEVENT_POS
Positive edge
0x0
TIMER_CTL_TAEVENT_NEG
Negative edge
0x1
TIMER_CTL_TAEVENT_BOTH
Both edges
0x3
TIMER_CTL_TAOTE
GPTM Timer A Output Trigger Enable
5
6
TIMER_CTL_TAPWML
GPTM Timer A PWM Output Level
6
7
TIMER_CTL_TASTALL
GPTM Timer A Stall Enable
1
2
TIMER_CTL_TBEN
GPTM Timer B Enable
8
9
TIMER_CTL_TBEVENT
GPTM Timer B Event Mode
10
12
TIMER_CTL_TBEVENT_POS
Positive edge
0x0
TIMER_CTL_TBEVENT_NEG
Negative edge
0x1
TIMER_CTL_TBEVENT_BOTH
Both edges
0x3
TIMER_CTL_TBOTE
GPTM Timer B Output Trigger Enable
13
14
TIMER_CTL_TBPWML
GPTM Timer B PWM Output Level
14
15
TIMER_CTL_TBSTALL
GPTM Timer B Stall Enable
9
10
ICR
GPTM Interrupt Clear
0x24
-1
write-only
n
0x0
0x0
TIMER_ICR_CAECINT
GPTM Timer A Capture Mode Event Interrupt Clear
2
3
write-only
TIMER_ICR_CAMCINT
GPTM Timer A Capture Mode Match Interrupt Clear
1
2
write-only
TIMER_ICR_CBECINT
GPTM Timer B Capture Mode Event Interrupt Clear
10
11
write-only
TIMER_ICR_CBMCINT
GPTM Timer B Capture Mode Match Interrupt Clear
9
10
write-only
TIMER_ICR_RTCCINT
GPTM RTC Interrupt Clear
3
4
write-only
TIMER_ICR_TAMCINT
GPTM Timer A Match Interrupt Clear
4
5
write-only
TIMER_ICR_TATOCINT
GPTM Timer A Time-Out Raw Interrupt
0
1
write-only
TIMER_ICR_TBMCINT
GPTM Timer B Match Interrupt Clear
11
12
write-only
TIMER_ICR_TBTOCINT
GPTM Timer B Time-Out Interrupt Clear
8
9
write-only
TIMER_ICR_WUECINT
32/64-Bit Wide GPTM Write Update Error Interrupt Clear
16
17
write-only
IMR
GPTM Interrupt Mask
0x18
-1
read-write
n
0x0
0x0
TIMER_IMR_CAEIM
GPTM Timer A Capture Mode Event Interrupt Mask
2
3
TIMER_IMR_CAMIM
GPTM Timer A Capture Mode Match Interrupt Mask
1
2
TIMER_IMR_CBEIM
GPTM Timer B Capture Mode Event Interrupt Mask
10
11
TIMER_IMR_CBMIM
GPTM Timer B Capture Mode Match Interrupt Mask
9
10
TIMER_IMR_RTCIM
GPTM RTC Interrupt Mask
3
4
TIMER_IMR_TAMIM
GPTM Timer A Match Interrupt Mask
4
5
TIMER_IMR_TATOIM
GPTM Timer A Time-Out Interrupt Mask
0
1
TIMER_IMR_TBMIM
GPTM Timer B Match Interrupt Mask
11
12
TIMER_IMR_TBTOIM
GPTM Timer B Time-Out Interrupt Mask
8
9
TIMER_IMR_WUEIM
32/64-Bit Wide GPTM Write Update Error Interrupt Mask
16
17
MIS
GPTM Masked Interrupt Status
0x20
-1
read-write
n
0x0
0x0
TIMER_MIS_CAEMIS
GPTM Timer A Capture Mode Event Masked Interrupt
2
3
TIMER_MIS_CAMMIS
GPTM Timer A Capture Mode Match Masked Interrupt
1
2
TIMER_MIS_CBEMIS
GPTM Timer B Capture Mode Event Masked Interrupt
10
11
TIMER_MIS_CBMMIS
GPTM Timer B Capture Mode Match Masked Interrupt
9
10
TIMER_MIS_RTCMIS
GPTM RTC Masked Interrupt
3
4
TIMER_MIS_TAMMIS
GPTM Timer A Match Masked Interrupt
4
5
TIMER_MIS_TATOMIS
GPTM Timer A Time-Out Masked Interrupt
0
1
TIMER_MIS_TBMMIS
GPTM Timer B Match Masked Interrupt
11
12
TIMER_MIS_TBTOMIS
GPTM Timer B Time-Out Masked Interrupt
8
9
TIMER_MIS_WUEMIS
32/64-Bit Wide GPTM Write Update Error Masked Interrupt Status
16
17
PP
GPTM Peripheral Properties
0xFC0
-1
read-write
n
0x0
0x0
TIMER_PP_SIZE
Count Size
0
4
TIMER_PP_SIZE_16
Timer A and Timer B counters are 16 bits each with an 8-bit prescale counter
0x0
TIMER_PP_SIZE_32
Timer A and Timer B counters are 32 bits each with a 16-bit prescale counter
0x1
RIS
GPTM Raw Interrupt Status
0x1C
-1
read-write
n
0x0
0x0
TIMER_RIS_CAERIS
GPTM Timer A Capture Mode Event Raw Interrupt
2
3
TIMER_RIS_CAMRIS
GPTM Timer A Capture Mode Match Raw Interrupt
1
2
TIMER_RIS_CBERIS
GPTM Timer B Capture Mode Event Raw Interrupt
10
11
TIMER_RIS_CBMRIS
GPTM Timer B Capture Mode Match Raw Interrupt
9
10
TIMER_RIS_RTCRIS
GPTM RTC Raw Interrupt
3
4
TIMER_RIS_TAMRIS
GPTM Timer A Match Raw Interrupt
4
5
TIMER_RIS_TATORIS
GPTM Timer A Time-Out Raw Interrupt
0
1
TIMER_RIS_TBMRIS
GPTM Timer B Match Raw Interrupt
11
12
TIMER_RIS_TBTORIS
GPTM Timer B Time-Out Raw Interrupt
8
9
TIMER_RIS_WUERIS
32/64-Bit Wide GPTM Write Update Error Raw Interrupt Status
16
17
RTCPD
GPTM RTC Predivide
0x58
-1
read-write
n
0x0
0x0
TIMER_RTCPD_RTCPD
RTC Predivide Counter Value
0
16
SYNC
GPTM Synchronize
0x10
-1
read-write
n
0x0
0x0
TIMER_SYNC_SYNCT0
Synchronize GPTM Timer 0
0
2
TIMER_SYNC_SYNCT0_NONE
GPTM0 is not affected
0x0
TIMER_SYNC_SYNCT0_TA
A timeout event for Timer A of GPTM0 is triggered
0x1
TIMER_SYNC_SYNCT0_TB
A timeout event for Timer B of GPTM0 is triggered
0x2
TIMER_SYNC_SYNCT0_TATB
A timeout event for both Timer A and Timer B of GPTM0 is triggered
0x3
TIMER_SYNC_SYNCT1
Synchronize GPTM Timer 1
2
4
TIMER_SYNC_SYNCT1_NONE
GPTM1 is not affected
0x0
TIMER_SYNC_SYNCT1_TA
A timeout event for Timer A of GPTM1 is triggered
0x1
TIMER_SYNC_SYNCT1_TB
A timeout event for Timer B of GPTM1 is triggered
0x2
TIMER_SYNC_SYNCT1_TATB
A timeout event for both Timer A and Timer B of GPTM1 is triggered
0x3
TIMER_SYNC_SYNCT2
Synchronize GPTM Timer 2
4
6
TIMER_SYNC_SYNCT2_NONE
GPTM2 is not affected
0x0
TIMER_SYNC_SYNCT2_TA
A timeout event for Timer A of GPTM2 is triggered
0x1
TIMER_SYNC_SYNCT2_TB
A timeout event for Timer B of GPTM2 is triggered
0x2
TIMER_SYNC_SYNCT2_TATB
A timeout event for both Timer A and Timer B of GPTM2 is triggered
0x3
TIMER_SYNC_SYNCT3
Synchronize GPTM Timer 3
6
8
TIMER_SYNC_SYNCT3_NONE
GPTM3 is not affected
0x0
TIMER_SYNC_SYNCT3_TA
A timeout event for Timer A of GPTM3 is triggered
0x1
TIMER_SYNC_SYNCT3_TB
A timeout event for Timer B of GPTM3 is triggered
0x2
TIMER_SYNC_SYNCT3_TATB
A timeout event for both Timer A and Timer B of GPTM3 is triggered
0x3
TIMER_SYNC_SYNCT4
Synchronize GPTM Timer 4
8
10
TIMER_SYNC_SYNCT4_NONE
GPTM4 is not affected
0x0
TIMER_SYNC_SYNCT4_TA
A timeout event for Timer A of GPTM4 is triggered
0x1
TIMER_SYNC_SYNCT4_TB
A timeout event for Timer B of GPTM4 is triggered
0x2
TIMER_SYNC_SYNCT4_TATB
A timeout event for both Timer A and Timer B of GPTM4 is triggered
0x3
TIMER_SYNC_SYNCT5
Synchronize GPTM Timer 5
10
12
TIMER_SYNC_SYNCT5_NONE
GPTM5 is not affected
0x0
TIMER_SYNC_SYNCT5_TA
A timeout event for Timer A of GPTM5 is triggered
0x1
TIMER_SYNC_SYNCT5_TB
A timeout event for Timer B of GPTM5 is triggered
0x2
TIMER_SYNC_SYNCT5_TATB
A timeout event for both Timer A and Timer B of GPTM5 is triggered
0x3
TIMER_SYNC_SYNCWT0
Synchronize GPTM 32/64-Bit Timer 0
12
14
TIMER_SYNC_SYNCWT0_NONE
GPTM 32/64-Bit Timer 0 is not affected
0x0
TIMER_SYNC_SYNCWT0_TA
A timeout event for Timer A of GPTM 32/64-Bit Timer 0 is triggered
0x1
TIMER_SYNC_SYNCWT0_TB
A timeout event for Timer B of GPTM 32/64-Bit Timer 0 is triggered
0x2
TIMER_SYNC_SYNCWT0_TATB
A timeout event for both Timer A and Timer B of GPTM 32/64-Bit Timer 0 is triggered
0x3
TIMER_SYNC_SYNCWT1
Synchronize GPTM 32/64-Bit Timer 1
14
16
TIMER_SYNC_SYNCWT1_NONE
GPTM 32/64-Bit Timer 1 is not affected
0x0
TIMER_SYNC_SYNCWT1_TA
A timeout event for Timer A of GPTM 32/64-Bit Timer 1 is triggered
0x1
TIMER_SYNC_SYNCWT1_TB
A timeout event for Timer B of GPTM 32/64-Bit Timer 1 is triggered
0x2
TIMER_SYNC_SYNCWT1_TATB
A timeout event for both Timer A and Timer B of GPTM 32/64-Bit Timer 1 is triggered
0x3
TIMER_SYNC_SYNCWT2
Synchronize GPTM 32/64-Bit Timer 2
16
18
TIMER_SYNC_SYNCWT2_NONE
GPTM 32/64-Bit Timer 2 is not affected
0x0
TIMER_SYNC_SYNCWT2_TA
A timeout event for Timer A of GPTM 32/64-Bit Timer 2 is triggered
0x1
TIMER_SYNC_SYNCWT2_TB
A timeout event for Timer B of GPTM 32/64-Bit Timer 2 is triggered
0x2
TIMER_SYNC_SYNCWT2_TATB
A timeout event for both Timer A and Timer B of GPTM 32/64-Bit Timer 2 is triggered
0x3
TIMER_SYNC_SYNCWT3
Synchronize GPTM 32/64-Bit Timer 3
18
20
TIMER_SYNC_SYNCWT3_NONE
GPTM 32/64-Bit Timer 3 is not affected
0x0
TIMER_SYNC_SYNCWT3_TA
A timeout event for Timer A of GPTM 32/64-Bit Timer 3 is triggered
0x1
TIMER_SYNC_SYNCWT3_TB
A timeout event for Timer B of GPTM 32/64-Bit Timer 3 is triggered
0x2
TIMER_SYNC_SYNCWT3_TATB
A timeout event for both Timer A and Timer B of GPTM 32/64-Bit Timer 3 is triggered
0x3
TIMER_SYNC_SYNCWT4
Synchronize GPTM 32/64-Bit Timer 4
20
22
TIMER_SYNC_SYNCWT4_NONE
GPTM 32/64-Bit Timer 4 is not affected
0x0
TIMER_SYNC_SYNCWT4_TA
A timeout event for Timer A of GPTM 32/64-Bit Timer 4 is triggered
0x1
TIMER_SYNC_SYNCWT4_TB
A timeout event for Timer B of GPTM 32/64-Bit Timer 4 is triggered
0x2
TIMER_SYNC_SYNCWT4_TATB
A timeout event for both Timer A and Timer B of GPTM 32/64-Bit Timer 4 is triggered
0x3
TIMER_SYNC_SYNCWT5
Synchronize GPTM 32/64-Bit Timer 5
22
24
TIMER_SYNC_SYNCWT5_NONE
GPTM 32/64-Bit Timer 5 is not affected
0x0
TIMER_SYNC_SYNCWT5_TA
A timeout event for Timer A of GPTM 32/64-Bit Timer 5 is triggered
0x1
TIMER_SYNC_SYNCWT5_TB
A timeout event for Timer B of GPTM 32/64-Bit Timer 5 is triggered
0x2
TIMER_SYNC_SYNCWT5_TATB
A timeout event for both Timer A and Timer B of GPTM 32/64-Bit Timer 5 is triggered
0x3
TAILR
GPTM Timer A Interval Load
0x28
-1
read-write
n
0x0
0x0
TAMATCHR
GPTM Timer A Match
0x30
-1
read-write
n
0x0
0x0
TAMR
GPTM Timer A Mode
0x4
-1
read-write
n
0x0
0x0
TIMER_TAMR_TAAMS
GPTM Timer A Alternate Mode Select
3
4
TIMER_TAMR_TACDIR
GPTM Timer A Count Direction
4
5
TIMER_TAMR_TACMR
GPTM Timer A Capture Mode
2
3
TIMER_TAMR_TAILD
GPTM Timer A Interval Load Write
8
9
TIMER_TAMR_TAMIE
GPTM Timer A Match Interrupt Enable
5
6
TIMER_TAMR_TAMR
GPTM Timer A Mode
0
2
TIMER_TAMR_TAMR_1_SHOT
One-Shot Timer mode
0x1
TIMER_TAMR_TAMR_PERIOD
Periodic Timer mode
0x2
TIMER_TAMR_TAMR_CAP
Capture mode
0x3
TIMER_TAMR_TAMRSU
GPTM Timer A Match Register Update
10
11
TIMER_TAMR_TAPLO
GPTM Timer A PWM Legacy Operation
11
12
TIMER_TAMR_TAPWMIE
GPTM Timer A PWM Interrupt Enable
9
10
TIMER_TAMR_TASNAPS
GPTM Timer A Snap-Shot Mode
7
8
TIMER_TAMR_TAWOT
GPTM Timer A Wait-on-Trigger
6
7
TAPMR
GPTM TimerA Prescale Match
0x40
-1
read-write
n
0x0
0x0
TIMER_TAPMR_TAPSMR
GPTM TimerA Prescale Match
0
8
TIMER_TAPMR_TAPSMRH
GPTM Timer A Prescale Match High Byte
8
16
TAPR
GPTM Timer A Prescale
0x38
-1
read-write
n
0x0
0x0
TIMER_TAPR_TAPSR
GPTM Timer A Prescale
0
8
TIMER_TAPR_TAPSRH
GPTM Timer A Prescale High Byte
8
16
TAPS
GPTM Timer A Prescale Snapshot
0x5C
-1
read-write
n
0x0
0x0
TIMER_TAPS_PSS
GPTM Timer A Prescaler Snapshot
0
16
TAPV
GPTM Timer A Prescale Value
0x64
-1
read-write
n
0x0
0x0
TIMER_TAPV_PSV
GPTM Timer A Prescaler Value
0
16
TAR
GPTM Timer A
0x48
-1
read-write
n
0x0
0x0
TAV
GPTM Timer A Value
0x50
-1
read-write
n
0x0
0x0
TBILR
GPTM Timer B Interval Load
0x2C
-1
read-write
n
0x0
0x0
TBMATCHR
GPTM Timer B Match
0x34
-1
read-write
n
0x0
0x0
TBMR
GPTM Timer B Mode
0x8
-1
read-write
n
0x0
0x0
TIMER_TBMR_TBAMS
GPTM Timer B Alternate Mode Select
3
4
TIMER_TBMR_TBCDIR
GPTM Timer B Count Direction
4
5
TIMER_TBMR_TBCMR
GPTM Timer B Capture Mode
2
3
TIMER_TBMR_TBILD
GPTM Timer B Interval Load Write
8
9
TIMER_TBMR_TBMIE
GPTM Timer B Match Interrupt Enable
5
6
TIMER_TBMR_TBMR
GPTM Timer B Mode
0
2
TIMER_TBMR_TBMR_1_SHOT
One-Shot Timer mode
0x1
TIMER_TBMR_TBMR_PERIOD
Periodic Timer mode
0x2
TIMER_TBMR_TBMR_CAP
Capture mode
0x3
TIMER_TBMR_TBMRSU
GPTM Timer B Match Register Update
10
11
TIMER_TBMR_TBPLO
GPTM Timer B PWM Legacy Operation
11
12
TIMER_TBMR_TBPWMIE
GPTM Timer B PWM Interrupt Enable
9
10
TIMER_TBMR_TBSNAPS
GPTM Timer B Snap-Shot Mode
7
8
TIMER_TBMR_TBWOT
GPTM Timer B Wait-on-Trigger
6
7
TBPMR
GPTM TimerB Prescale Match
0x44
-1
read-write
n
0x0
0x0
TIMER_TBPMR_TBPSMR
GPTM TimerB Prescale Match
0
8
TIMER_TBPMR_TBPSMRH
GPTM Timer B Prescale Match High Byte
8
16
TBPR
GPTM Timer B Prescale
0x3C
-1
read-write
n
0x0
0x0
TIMER_TBPR_TBPSR
GPTM Timer B Prescale
0
8
TIMER_TBPR_TBPSRH
GPTM Timer B Prescale High Byte
8
16
TBPS
GPTM Timer B Prescale Snapshot
0x60
-1
read-write
n
0x0
0x0
TIMER_TBPS_PSS
GPTM Timer A Prescaler Value
0
16
TBPV
GPTM Timer B Prescale Value
0x68
-1
read-write
n
0x0
0x0
TIMER_TBPV_PSV
GPTM Timer B Prescaler Value
0
16
TBR
GPTM Timer B
0x4C
-1
read-write
n
0x0
0x0
TBV
GPTM Timer B Value
0x54
-1
read-write
n
0x0
0x0
TIMER0CFG
GPTM Configuration
0x0
read-write
n
0x0
0x0
TIMER_CFG
GPTM Configuration
0
3
TIMER_CFG_32_BIT_TIMER
For a 16/32-bit timer, this value selects the 32-bit timer configuration
0x0
TIMER_CFG_32_BIT_RTC
For a 16/32-bit timer, this value selects the 32-bit real-time clock (RTC) counter configuration
0x1
TIMER_CFG_16_BIT
For a 16/32-bit timer, this value selects the 16-bit timer configuration
0x4
TIMER0CTL
GPTM Control
0xC
read-write
n
0x0
0x0
TIMER_CTL_RTCEN
GPTM RTC Stall Enable
4
5
TIMER_CTL_TAEN
GPTM Timer A Enable
0
1
TIMER_CTL_TAEVENT
GPTM Timer A Event Mode
2
4
TIMER_CTL_TAEVENT_POS
Positive edge
0x0
TIMER_CTL_TAEVENT_NEG
Negative edge
0x1
TIMER_CTL_TAEVENT_BOTH
Both edges
0x3
TIMER_CTL_TAOTE
GPTM Timer A Output Trigger Enable
5
6
TIMER_CTL_TAPWML
GPTM Timer A PWM Output Level
6
7
TIMER_CTL_TASTALL
GPTM Timer A Stall Enable
1
2
TIMER_CTL_TBEN
GPTM Timer B Enable
8
9
TIMER_CTL_TBEVENT
GPTM Timer B Event Mode
10
12
TIMER_CTL_TBEVENT_POS
Positive edge
0x0
TIMER_CTL_TBEVENT_NEG
Negative edge
0x1
TIMER_CTL_TBEVENT_BOTH
Both edges
0x3
TIMER_CTL_TBOTE
GPTM Timer B Output Trigger Enable
13
14
TIMER_CTL_TBPWML
GPTM Timer B PWM Output Level
14
15
TIMER_CTL_TBSTALL
GPTM Timer B Stall Enable
9
10
TIMER0ICR
GPTM Interrupt Clear
0x24
write-only
n
0x0
0x0
TIMER_ICR_CAECINT
GPTM Timer A Capture Mode Event Interrupt Clear
2
3
write-only
TIMER_ICR_CAMCINT
GPTM Timer A Capture Mode Match Interrupt Clear
1
2
write-only
TIMER_ICR_CBECINT
GPTM Timer B Capture Mode Event Interrupt Clear
10
11
write-only
TIMER_ICR_CBMCINT
GPTM Timer B Capture Mode Match Interrupt Clear
9
10
write-only
TIMER_ICR_RTCCINT
GPTM RTC Interrupt Clear
3
4
write-only
TIMER_ICR_TAMCINT
GPTM Timer A Match Interrupt Clear
4
5
write-only
TIMER_ICR_TATOCINT
GPTM Timer A Time-Out Raw Interrupt
0
1
write-only
TIMER_ICR_TBMCINT
GPTM Timer B Match Interrupt Clear
11
12
write-only
TIMER_ICR_TBTOCINT
GPTM Timer B Time-Out Interrupt Clear
8
9
write-only
TIMER_ICR_WUECINT
32/64-Bit Wide GPTM Write Update Error Interrupt Clear
16
17
write-only
TIMER0IMR
GPTM Interrupt Mask
0x18
read-write
n
0x0
0x0
TIMER_IMR_CAEIM
GPTM Timer A Capture Mode Event Interrupt Mask
2
3
TIMER_IMR_CAMIM
GPTM Timer A Capture Mode Match Interrupt Mask
1
2
TIMER_IMR_CBEIM
GPTM Timer B Capture Mode Event Interrupt Mask
10
11
TIMER_IMR_CBMIM
GPTM Timer B Capture Mode Match Interrupt Mask
9
10
TIMER_IMR_RTCIM
GPTM RTC Interrupt Mask
3
4
TIMER_IMR_TAMIM
GPTM Timer A Match Interrupt Mask
4
5
TIMER_IMR_TATOIM
GPTM Timer A Time-Out Interrupt Mask
0
1
TIMER_IMR_TBMIM
GPTM Timer B Match Interrupt Mask
11
12
TIMER_IMR_TBTOIM
GPTM Timer B Time-Out Interrupt Mask
8
9
TIMER_IMR_WUEIM
32/64-Bit Wide GPTM Write Update Error Interrupt Mask
16
17
TIMER0MIS
GPTM Masked Interrupt Status
0x20
read-write
n
0x0
0x0
TIMER_MIS_CAEMIS
GPTM Timer A Capture Mode Event Masked Interrupt
2
3
TIMER_MIS_CAMMIS
GPTM Timer A Capture Mode Match Masked Interrupt
1
2
TIMER_MIS_CBEMIS
GPTM Timer B Capture Mode Event Masked Interrupt
10
11
TIMER_MIS_CBMMIS
GPTM Timer B Capture Mode Match Masked Interrupt
9
10
TIMER_MIS_RTCMIS
GPTM RTC Masked Interrupt
3
4
TIMER_MIS_TAMMIS
GPTM Timer A Match Masked Interrupt
4
5
TIMER_MIS_TATOMIS
GPTM Timer A Time-Out Masked Interrupt
0
1
TIMER_MIS_TBMMIS
GPTM Timer B Match Masked Interrupt
11
12
TIMER_MIS_TBTOMIS
GPTM Timer B Time-Out Masked Interrupt
8
9
TIMER_MIS_WUEMIS
32/64-Bit Wide GPTM Write Update Error Masked Interrupt Status
16
17
TIMER0PP
GPTM Peripheral Properties
0xFC0
read-write
n
0x0
0x0
TIMER_PP_SIZE
Count Size
0
4
TIMER_PP_SIZE_16
Timer A and Timer B counters are 16 bits each with an 8-bit prescale counter
0x0
TIMER_PP_SIZE_32
Timer A and Timer B counters are 32 bits each with a 16-bit prescale counter
0x1
TIMER0RIS
GPTM Raw Interrupt Status
0x1C
read-write
n
0x0
0x0
TIMER_RIS_CAERIS
GPTM Timer A Capture Mode Event Raw Interrupt
2
3
TIMER_RIS_CAMRIS
GPTM Timer A Capture Mode Match Raw Interrupt
1
2
TIMER_RIS_CBERIS
GPTM Timer B Capture Mode Event Raw Interrupt
10
11
TIMER_RIS_CBMRIS
GPTM Timer B Capture Mode Match Raw Interrupt
9
10
TIMER_RIS_RTCRIS
GPTM RTC Raw Interrupt
3
4
TIMER_RIS_TAMRIS
GPTM Timer A Match Raw Interrupt
4
5
TIMER_RIS_TATORIS
GPTM Timer A Time-Out Raw Interrupt
0
1
TIMER_RIS_TBMRIS
GPTM Timer B Match Raw Interrupt
11
12
TIMER_RIS_TBTORIS
GPTM Timer B Time-Out Raw Interrupt
8
9
TIMER_RIS_WUERIS
32/64-Bit Wide GPTM Write Update Error Raw Interrupt Status
16
17
TIMER0RTCPD
GPTM RTC Predivide
0x58
read-write
n
0x0
0x0
TIMER_RTCPD_RTCPD
RTC Predivide Counter Value
0
16
TIMER0SYNC
GPTM Synchronize
0x10
read-write
n
0x0
0x0
TIMER_SYNC_SYNCT0
Synchronize GPTM Timer 0
0
2
TIMER_SYNC_SYNCT0_NONE
GPTM0 is not affected
0x0
TIMER_SYNC_SYNCT0_TA
A timeout event for Timer A of GPTM0 is triggered
0x1
TIMER_SYNC_SYNCT0_TB
A timeout event for Timer B of GPTM0 is triggered
0x2
TIMER_SYNC_SYNCT0_TATB
A timeout event for both Timer A and Timer B of GPTM0 is triggered
0x3
TIMER_SYNC_SYNCT1
Synchronize GPTM Timer 1
2
4
TIMER_SYNC_SYNCT1_NONE
GPTM1 is not affected
0x0
TIMER_SYNC_SYNCT1_TA
A timeout event for Timer A of GPTM1 is triggered
0x1
TIMER_SYNC_SYNCT1_TB
A timeout event for Timer B of GPTM1 is triggered
0x2
TIMER_SYNC_SYNCT1_TATB
A timeout event for both Timer A and Timer B of GPTM1 is triggered
0x3
TIMER_SYNC_SYNCT2
Synchronize GPTM Timer 2
4
6
TIMER_SYNC_SYNCT2_NONE
GPTM2 is not affected
0x0
TIMER_SYNC_SYNCT2_TA
A timeout event for Timer A of GPTM2 is triggered
0x1
TIMER_SYNC_SYNCT2_TB
A timeout event for Timer B of GPTM2 is triggered
0x2
TIMER_SYNC_SYNCT2_TATB
A timeout event for both Timer A and Timer B of GPTM2 is triggered
0x3
TIMER_SYNC_SYNCT3
Synchronize GPTM Timer 3
6
8
TIMER_SYNC_SYNCT3_NONE
GPTM3 is not affected
0x0
TIMER_SYNC_SYNCT3_TA
A timeout event for Timer A of GPTM3 is triggered
0x1
TIMER_SYNC_SYNCT3_TB
A timeout event for Timer B of GPTM3 is triggered
0x2
TIMER_SYNC_SYNCT3_TATB
A timeout event for both Timer A and Timer B of GPTM3 is triggered
0x3
TIMER_SYNC_SYNCT4
Synchronize GPTM Timer 4
8
10
TIMER_SYNC_SYNCT4_NONE
GPTM4 is not affected
0x0
TIMER_SYNC_SYNCT4_TA
A timeout event for Timer A of GPTM4 is triggered
0x1
TIMER_SYNC_SYNCT4_TB
A timeout event for Timer B of GPTM4 is triggered
0x2
TIMER_SYNC_SYNCT4_TATB
A timeout event for both Timer A and Timer B of GPTM4 is triggered
0x3
TIMER_SYNC_SYNCT5
Synchronize GPTM Timer 5
10
12
TIMER_SYNC_SYNCT5_NONE
GPTM5 is not affected
0x0
TIMER_SYNC_SYNCT5_TA
A timeout event for Timer A of GPTM5 is triggered
0x1
TIMER_SYNC_SYNCT5_TB
A timeout event for Timer B of GPTM5 is triggered
0x2
TIMER_SYNC_SYNCT5_TATB
A timeout event for both Timer A and Timer B of GPTM5 is triggered
0x3
TIMER_SYNC_SYNCWT0
Synchronize GPTM 32/64-Bit Timer 0
12
14
TIMER_SYNC_SYNCWT0_NONE
GPTM 32/64-Bit Timer 0 is not affected
0x0
TIMER_SYNC_SYNCWT0_TA
A timeout event for Timer A of GPTM 32/64-Bit Timer 0 is triggered
0x1
TIMER_SYNC_SYNCWT0_TB
A timeout event for Timer B of GPTM 32/64-Bit Timer 0 is triggered
0x2
TIMER_SYNC_SYNCWT0_TATB
A timeout event for both Timer A and Timer B of GPTM 32/64-Bit Timer 0 is triggered
0x3
TIMER_SYNC_SYNCWT1
Synchronize GPTM 32/64-Bit Timer 1
14
16
TIMER_SYNC_SYNCWT1_NONE
GPTM 32/64-Bit Timer 1 is not affected
0x0
TIMER_SYNC_SYNCWT1_TA
A timeout event for Timer A of GPTM 32/64-Bit Timer 1 is triggered
0x1
TIMER_SYNC_SYNCWT1_TB
A timeout event for Timer B of GPTM 32/64-Bit Timer 1 is triggered
0x2
TIMER_SYNC_SYNCWT1_TATB
A timeout event for both Timer A and Timer B of GPTM 32/64-Bit Timer 1 is triggered
0x3
TIMER_SYNC_SYNCWT2
Synchronize GPTM 32/64-Bit Timer 2
16
18
TIMER_SYNC_SYNCWT2_NONE
GPTM 32/64-Bit Timer 2 is not affected
0x0
TIMER_SYNC_SYNCWT2_TA
A timeout event for Timer A of GPTM 32/64-Bit Timer 2 is triggered
0x1
TIMER_SYNC_SYNCWT2_TB
A timeout event for Timer B of GPTM 32/64-Bit Timer 2 is triggered
0x2
TIMER_SYNC_SYNCWT2_TATB
A timeout event for both Timer A and Timer B of GPTM 32/64-Bit Timer 2 is triggered
0x3
TIMER_SYNC_SYNCWT3
Synchronize GPTM 32/64-Bit Timer 3
18
20
TIMER_SYNC_SYNCWT3_NONE
GPTM 32/64-Bit Timer 3 is not affected
0x0
TIMER_SYNC_SYNCWT3_TA
A timeout event for Timer A of GPTM 32/64-Bit Timer 3 is triggered
0x1
TIMER_SYNC_SYNCWT3_TB
A timeout event for Timer B of GPTM 32/64-Bit Timer 3 is triggered
0x2
TIMER_SYNC_SYNCWT3_TATB
A timeout event for both Timer A and Timer B of GPTM 32/64-Bit Timer 3 is triggered
0x3
TIMER_SYNC_SYNCWT4
Synchronize GPTM 32/64-Bit Timer 4
20
22
TIMER_SYNC_SYNCWT4_NONE
GPTM 32/64-Bit Timer 4 is not affected
0x0
TIMER_SYNC_SYNCWT4_TA
A timeout event for Timer A of GPTM 32/64-Bit Timer 4 is triggered
0x1
TIMER_SYNC_SYNCWT4_TB
A timeout event for Timer B of GPTM 32/64-Bit Timer 4 is triggered
0x2
TIMER_SYNC_SYNCWT4_TATB
A timeout event for both Timer A and Timer B of GPTM 32/64-Bit Timer 4 is triggered
0x3
TIMER_SYNC_SYNCWT5
Synchronize GPTM 32/64-Bit Timer 5
22
24
TIMER_SYNC_SYNCWT5_NONE
GPTM 32/64-Bit Timer 5 is not affected
0x0
TIMER_SYNC_SYNCWT5_TA
A timeout event for Timer A of GPTM 32/64-Bit Timer 5 is triggered
0x1
TIMER_SYNC_SYNCWT5_TB
A timeout event for Timer B of GPTM 32/64-Bit Timer 5 is triggered
0x2
TIMER_SYNC_SYNCWT5_TATB
A timeout event for both Timer A and Timer B of GPTM 32/64-Bit Timer 5 is triggered
0x3
TIMER0TAILR
GPTM Timer A Interval Load
0x28
read-write
n
0x0
0x0
TIMER0TAMATCHR
GPTM Timer A Match
0x30
read-write
n
0x0
0x0
TIMER0TAMR
GPTM Timer A Mode
0x4
read-write
n
0x0
0x0
TIMER_TAMR_TAAMS
GPTM Timer A Alternate Mode Select
3
4
TIMER_TAMR_TACDIR
GPTM Timer A Count Direction
4
5
TIMER_TAMR_TACMR
GPTM Timer A Capture Mode
2
3
TIMER_TAMR_TAILD
GPTM Timer A Interval Load Write
8
9
TIMER_TAMR_TAMIE
GPTM Timer A Match Interrupt Enable
5
6
TIMER_TAMR_TAMR
GPTM Timer A Mode
0
2
TIMER_TAMR_TAMR_1_SHOT
One-Shot Timer mode
0x1
TIMER_TAMR_TAMR_PERIOD
Periodic Timer mode
0x2
TIMER_TAMR_TAMR_CAP
Capture mode
0x3
TIMER_TAMR_TAMRSU
GPTM Timer A Match Register Update
10
11
TIMER_TAMR_TAPLO
GPTM Timer A PWM Legacy Operation
11
12
TIMER_TAMR_TAPWMIE
GPTM Timer A PWM Interrupt Enable
9
10
TIMER_TAMR_TASNAPS
GPTM Timer A Snap-Shot Mode
7
8
TIMER_TAMR_TAWOT
GPTM Timer A Wait-on-Trigger
6
7
TIMER0TAPMR
GPTM TimerA Prescale Match
0x40
read-write
n
0x0
0x0
TIMER_TAPMR_TAPSMR
GPTM TimerA Prescale Match
0
8
TIMER_TAPMR_TAPSMRH
GPTM Timer A Prescale Match High Byte
8
16
TIMER0TAPR
GPTM Timer A Prescale
0x38
read-write
n
0x0
0x0
TIMER_TAPR_TAPSR
GPTM Timer A Prescale
0
8
TIMER_TAPR_TAPSRH
GPTM Timer A Prescale High Byte
8
16
TIMER0TAPS
GPTM Timer A Prescale Snapshot
0x5C
read-write
n
0x0
0x0
TIMER_TAPS_PSS
GPTM Timer A Prescaler Snapshot
0
16
TIMER0TAPV
GPTM Timer A Prescale Value
0x64
read-write
n
0x0
0x0
TIMER_TAPV_PSV
GPTM Timer A Prescaler Value
0
16
TIMER0TAR
GPTM Timer A
0x48
read-write
n
0x0
0x0
TIMER0TAV
GPTM Timer A Value
0x50
read-write
n
0x0
0x0
TIMER0TBILR
GPTM Timer B Interval Load
0x2C
read-write
n
0x0
0x0
TIMER0TBMATCHR
GPTM Timer B Match
0x34
read-write
n
0x0
0x0
TIMER0TBMR
GPTM Timer B Mode
0x8
read-write
n
0x0
0x0
TIMER_TBMR_TBAMS
GPTM Timer B Alternate Mode Select
3
4
TIMER_TBMR_TBCDIR
GPTM Timer B Count Direction
4
5
TIMER_TBMR_TBCMR
GPTM Timer B Capture Mode
2
3
TIMER_TBMR_TBILD
GPTM Timer B Interval Load Write
8
9
TIMER_TBMR_TBMIE
GPTM Timer B Match Interrupt Enable
5
6
TIMER_TBMR_TBMR
GPTM Timer B Mode
0
2
TIMER_TBMR_TBMR_1_SHOT
One-Shot Timer mode
0x1
TIMER_TBMR_TBMR_PERIOD
Periodic Timer mode
0x2
TIMER_TBMR_TBMR_CAP
Capture mode
0x3
TIMER_TBMR_TBMRSU
GPTM Timer B Match Register Update
10
11
TIMER_TBMR_TBPLO
GPTM Timer B PWM Legacy Operation
11
12
TIMER_TBMR_TBPWMIE
GPTM Timer B PWM Interrupt Enable
9
10
TIMER_TBMR_TBSNAPS
GPTM Timer B Snap-Shot Mode
7
8
TIMER_TBMR_TBWOT
GPTM Timer B Wait-on-Trigger
6
7
TIMER0TBPMR
GPTM TimerB Prescale Match
0x44
read-write
n
0x0
0x0
TIMER_TBPMR_TBPSMR
GPTM TimerB Prescale Match
0
8
TIMER_TBPMR_TBPSMRH
GPTM Timer B Prescale Match High Byte
8
16
TIMER0TBPR
GPTM Timer B Prescale
0x3C
read-write
n
0x0
0x0
TIMER_TBPR_TBPSR
GPTM Timer B Prescale
0
8
TIMER_TBPR_TBPSRH
GPTM Timer B Prescale High Byte
8
16
TIMER0TBPS
GPTM Timer B Prescale Snapshot
0x60
read-write
n
0x0
0x0
TIMER_TBPS_PSS
GPTM Timer A Prescaler Value
0
16
TIMER0TBPV
GPTM Timer B Prescale Value
0x68
read-write
n
0x0
0x0
TIMER_TBPV_PSV
GPTM Timer B Prescaler Value
0
16
TIMER0TBR
GPTM Timer B
0x4C
read-write
n
0x0
0x0
TIMER0TBV
GPTM Timer B Value
0x54
read-write
n
0x0
0x0